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ARM: dts: Mux XMMCnDATA[0] pad correctly for Exynos5420 boards
[linux-2.6-block.git] / arch / arm / boot / dts / exynos5422-odroidxu3.dts
CommitLineData
86a2d2ac
SS		 1/*
2 * Hardkernel Odroid XU3 board device tree source
3 *
4 * Copyright (c) 2014 Collabora Ltd.
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/dts-v1/;
14#include "exynos5800.dtsi"
15
16/ {
17 model = "Hardkernel Odroid XU3";
18 compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
19
20 memory {
6591a02e 21 reg = <0x40000000 0x7EA00000>;
86a2d2ac
SS		 22 };
23
24 chosen {
25 linux,stdout-path = &serial_2;
26 };
27
28 fimd@14400000 {
29 status = "okay";
30 };
31
32 firmware@02073000 {
33 compatible = "samsung,secure-firmware";
34 reg = <0x02073000 0x1000>;
35 };
36
37 fixed-rate-clocks {
38 oscclk {
39 compatible = "samsung,exynos5420-oscclk";
40 clock-frequency = <24000000>;
41 };
42 };
43
44 hsi2c_4: i2c@12CA0000 {
45 status = "okay";
46
47 s2mps11_pmic@66 {
48 compatible = "samsung,s2mps11-pmic";
49 reg = <0x66>;
50 s2mps11,buck2-ramp-delay = <12>;
51 s2mps11,buck34-ramp-delay = <12>;
52 s2mps11,buck16-ramp-delay = <12>;
53 s2mps11,buck6-ramp-enable = <1>;
54 s2mps11,buck2-ramp-enable = <1>;
55 s2mps11,buck3-ramp-enable = <1>;
56 s2mps11,buck4-ramp-enable = <1>;
57
58 s2mps11_osc: clocks {
59 #clock-cells = <1>;
60 clock-output-names = "s2mps11_ap",
61 "s2mps11_cp", "s2mps11_bt";
62 };
63
64 regulators {
65 ldo1_reg: LDO1 {
66 regulator-name = "vdd_ldo1";
67 regulator-min-microvolt = <1000000>;
68 regulator-max-microvolt = <1000000>;
69 regulator-always-on;
70 };
71
72 ldo3_reg: LDO3 {
73 regulator-name = "vdd_ldo3";
74 regulator-min-microvolt = <1800000>;
75 regulator-max-microvolt = <1800000>;
76 regulator-always-on;
77 };
78
79 ldo5_reg: LDO5 {
80 regulator-name = "vdd_ldo5";
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <1800000>;
83 regulator-always-on;
84 };
85
86 ldo6_reg: LDO6 {
87 regulator-name = "vdd_ldo6";
88 regulator-min-microvolt = <1000000>;
89 regulator-max-microvolt = <1000000>;
90 regulator-always-on;
91 };
92
93 ldo7_reg: LDO7 {
94 regulator-name = "vdd_ldo7";
95 regulator-min-microvolt = <1800000>;
96 regulator-max-microvolt = <1800000>;
97 regulator-always-on;
98 };
99
100 ldo8_reg: LDO8 {
101 regulator-name = "vdd_ldo8";
102 regulator-min-microvolt = <1800000>;
103 regulator-max-microvolt = <1800000>;
104 regulator-always-on;
105 };
106
107 ldo9_reg: LDO9 {
108 regulator-name = "vdd_ldo9";
109 regulator-min-microvolt = <3000000>;
110 regulator-max-microvolt = <3000000>;
111 regulator-always-on;
112 };
113
114 ldo10_reg: LDO10 {
115 regulator-name = "vdd_ldo10";
116 regulator-min-microvolt = <1800000>;
117 regulator-max-microvolt = <1800000>;
118 regulator-always-on;
119 };
120
121 ldo11_reg: LDO11 {
122 regulator-name = "vdd_ldo11";
123 regulator-min-microvolt = <1000000>;
124 regulator-max-microvolt = <1000000>;
125 regulator-always-on;
126 };
127
128 ldo12_reg: LDO12 {
129 regulator-name = "vdd_ldo12";
130 regulator-min-microvolt = <1800000>;
131 regulator-max-microvolt = <1800000>;
132 regulator-always-on;
133 };
134
135 ldo13_reg: LDO13 {
136 regulator-name = "vdd_ldo13";
137 regulator-min-microvolt = <2800000>;
138 regulator-max-microvolt = <2800000>;
139 regulator-always-on;
140 };
141
142 ldo15_reg: LDO15 {
143 regulator-name = "vdd_ldo15";
144 regulator-min-microvolt = <3100000>;
145 regulator-max-microvolt = <3100000>;
146 regulator-always-on;
147 };
148
149 ldo16_reg: LDO16 {
150 regulator-name = "vdd_ldo16";
151 regulator-min-microvolt = <2200000>;
152 regulator-max-microvolt = <2200000>;
153 regulator-always-on;
154 };
155
156 ldo17_reg: LDO17 {
157 regulator-name = "tsp_avdd";
158 regulator-min-microvolt = <3300000>;
159 regulator-max-microvolt = <3300000>;
160 regulator-always-on;
161 };
162
163 ldo19_reg: LDO19 {
164 regulator-name = "vdd_sd";
165 regulator-min-microvolt = <2800000>;
166 regulator-max-microvolt = <2800000>;
167 regulator-always-on;
168 };
169
170 ldo24_reg: LDO24 {
171 regulator-name = "tsp_io";
172 regulator-min-microvolt = <2800000>;
173 regulator-max-microvolt = <2800000>;
174 regulator-always-on;
175 };
176
e0fc8de6
KH		 177 ldo26_reg: LDO26 {
178 regulator-name = "vdd_ldo26";
179 regulator-min-microvolt = <3000000>;
180 regulator-max-microvolt = <3000000>;
181 regulator-always-on;
182 };
183
86a2d2ac
SS		 184 buck1_reg: BUCK1 {
185 regulator-name = "vdd_mif";
186 regulator-min-microvolt = <800000>;
187 regulator-max-microvolt = <1300000>;
188 regulator-always-on;
189 regulator-boot-on;
190 };
191
192 buck2_reg: BUCK2 {
193 regulator-name = "vdd_arm";
194 regulator-min-microvolt = <800000>;
195 regulator-max-microvolt = <1500000>;
196 regulator-always-on;
197 regulator-boot-on;
198 };
199
200 buck3_reg: BUCK3 {
201 regulator-name = "vdd_int";
202 regulator-min-microvolt = <800000>;
203 regulator-max-microvolt = <1400000>;
204 regulator-always-on;
205 regulator-boot-on;
206 };
207
208 buck4_reg: BUCK4 {
209 regulator-name = "vdd_g3d";
210 regulator-min-microvolt = <800000>;
211 regulator-max-microvolt = <1400000>;
212 regulator-always-on;
213 regulator-boot-on;
214 };
215
216 buck5_reg: BUCK5 {
217 regulator-name = "vdd_mem";
218 regulator-min-microvolt = <800000>;
219 regulator-max-microvolt = <1400000>;
220 regulator-always-on;
221 regulator-boot-on;
222 };
223
224 buck6_reg: BUCK6 {
225 regulator-name = "vdd_kfc";
226 regulator-min-microvolt = <800000>;
227 regulator-max-microvolt = <1500000>;
228 regulator-always-on;
229 regulator-boot-on;
230 };
231
232 buck7_reg: BUCK7 {
233 regulator-name = "vdd_1.0v_ldo";
234 regulator-min-microvolt = <800000>;
235 regulator-max-microvolt = <1500000>;
236 regulator-always-on;
237 regulator-boot-on;
238 };
239
240 buck8_reg: BUCK8 {
241 regulator-name = "vdd_1.8v_ldo";
242 regulator-min-microvolt = <800000>;
243 regulator-max-microvolt = <1500000>;
244 regulator-always-on;
245 regulator-boot-on;
246 };
247
248 buck9_reg: BUCK9 {
249 regulator-name = "vdd_2.8v_ldo";
250 regulator-min-microvolt = <3000000>;
251 regulator-max-microvolt = <3750000>;
252 regulator-always-on;
253 regulator-boot-on;
254 };
255
256 buck10_reg: BUCK10 {
257 regulator-name = "vdd_vmem";
258 regulator-min-microvolt = <2850000>;
259 regulator-max-microvolt = <2850000>;
260 regulator-always-on;
261 regulator-boot-on;
262 };
263 };
264 };
265 };
266
1056a273
MS		 267 emmc_pwrseq: pwrseq {
268 pinctrl-0 = <&emmc_nrst_pin>;
269 pinctrl-names = "default";
270 compatible = "mmc-pwrseq-emmc";
271 reset-gpios = <&gpd1 0 1>;
272 };
273
86a2d2ac
SS		 274 i2c_2: i2c@12C80000 {
275 samsung,i2c-sda-delay = <100>;
276 samsung,i2c-max-bus-freq = <66000>;
277 status = "okay";
278
279 hdmiddc@50 {
280 compatible = "samsung,exynos4210-hdmiddc";
281 reg = <0x50>;
282 };
283 };
284
285 rtc@101E0000 {
286 status = "okay";
287 };
288};
289
290&hdmi {
291 status = "okay";
292 hpd-gpio = <&gpx3 7 0>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&hdmi_hpd_irq>;
295
296 vdd_osc-supply = <&ldo7_reg>;
297 vdd_pll-supply = <&ldo6_reg>;
298 vdd-supply = <&ldo6_reg>;
299};
300
301&mfc {
302 samsung,mfc-r = <0x43000000 0x800000>;
303 samsung,mfc-l = <0x51000000 0x800000>;
304};
305
306&mmc_0 {
307 status = "okay";
1056a273 308 mmc-pwrseq = <&emmc_pwrseq>;
86a2d2ac
SS		 309 broken-cd;
310 card-detect-delay = <200>;
311 samsung,dw-mshc-ciu-div = <3>;
312 samsung,dw-mshc-sdr-timing = <0 4>;
313 samsung,dw-mshc-ddr-timing = <0 2>;
314 pinctrl-names = "default";
af6ad88a 315 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
86a2d2ac
SS		 316 bus-width = <8>;
317 cap-mmc-highspeed;
318};
319
320&mmc_2 {
321 status = "okay";
322 card-detect-delay = <200>;
323 samsung,dw-mshc-ciu-div = <3>;
324 samsung,dw-mshc-sdr-timing = <0 4>;
325 samsung,dw-mshc-ddr-timing = <0 2>;
326 pinctrl-names = "default";
af6ad88a 327 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
86a2d2ac
SS		 328 bus-width = <4>;
329 cap-sd-highspeed;
330};
331
332&pinctrl_0 {
333 hdmi_hpd_irq: hdmi-hpd-irq {
334 samsung,pins = "gpx3-7";
335 samsung,pin-function = <0>;
336 samsung,pin-pud = <1>;
337 samsung,pin-drv = <0>;
338 };
339};
340
1056a273
MS		 341&pinctrl_1 {
342 emmc_nrst_pin: emmc-nrst {
343 samsung,pins = "gpd1-0";
344 samsung,pin-function = <0>;
345 samsung,pin-pud = <0>;
346 samsung,pin-drv = <0>;
347 };
348};
349
86a2d2ac
SS		 350&usbdrd_dwc3_0 {
351 dr_mode = "host";
352};
353
354&usbdrd_dwc3_1 {
355 dr_mode = "otg";
356};
e0fc8de6
KH		 357
358&i2c_0 {
359 status = "okay";
360
361 /* A15 cluster: VDD_ARM */
362 ina231@40 {
363 compatible = "ti,ina231";
364 reg = <0x40>;
365 shunt-resistor = <10000>;
366 };
367
368 /* memory: VDD_MEM */
369 ina231@41 {
370 compatible = "ti,ina231";
371 reg = <0x41>;
372 shunt-resistor = <10000>;
373 };
374
375 /* GPU: VDD_G3D */
376 ina231@44 {
377 compatible = "ti,ina231";
378 reg = <0x44>;
379 shunt-resistor = <10000>;
380 };
381
382 /* A7 cluster: VDD_KFC */
383 ina231@45 {
384 compatible = "ti,ina231";
385 reg = <0x45>;
386 shunt-resistor = <10000>;
387 };
388};
Linux 6.x block layer and io_uring tree(s)