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ARM: dts: exynos: Remove Exynos5440
[linux-block.git] / arch / arm / boot / dts / exynos5422-odroid-core.dtsi
CommitLineData
cc4637f7 1// SPDX-License-Identifier: GPL-2.0
1ac49427
MS		 2/*
3 * Hardkernel Odroid XU3/XU4/HC1 boards core device tree source
4 *
5 * Copyright (c) 2017 Marek Szyprowski
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
7 * http://www.samsung.com
cc4637f7 8 */
1ac49427
MS		 9
10#include <dt-bindings/clock/samsung,s2mps11.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include "exynos5800.dtsi"
14#include "exynos5422-cpus.dtsi"
15
16/ {
17 memory@40000000 {
18 device_type = "memory";
19 reg = <0x40000000 0x7EA00000>;
20 };
21
22 chosen {
23 stdout-path = "serial2:115200n8";
24 };
25
26 firmware@02073000 {
27 compatible = "samsung,secure-firmware";
28 reg = <0x02073000 0x1000>;
29 };
30
31 fixed-rate-clocks {
32 oscclk {
33 compatible = "samsung,exynos5420-oscclk";
34 clock-frequency = <24000000>;
35 };
36 };
37};
38
39&bus_wcore {
40 devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
41 <&nocp_mem1_0>, <&nocp_mem1_1>;
42 vdd-supply = <&buck3_reg>;
43 exynos,saturation-ratio = <100>;
44 status = "okay";
45};
46
47&bus_noc {
48 devfreq = <&bus_wcore>;
49 status = "okay";
50};
51
52&bus_fsys_apb {
53 devfreq = <&bus_wcore>;
54 status = "okay";
55};
56
57&bus_fsys {
58 devfreq = <&bus_wcore>;
59 status = "okay";
60};
61
62&bus_fsys2 {
63 devfreq = <&bus_wcore>;
64 status = "okay";
65};
66
67&bus_mfc {
68 devfreq = <&bus_wcore>;
69 status = "okay";
70};
71
72&bus_gen {
73 devfreq = <&bus_wcore>;
74 status = "okay";
75};
76
77&bus_peri {
78 devfreq = <&bus_wcore>;
79 status = "okay";
80};
81
82&bus_g2d {
83 devfreq = <&bus_wcore>;
84 status = "okay";
85};
86
87&bus_g2d_acp {
88 devfreq = <&bus_wcore>;
89 status = "okay";
90};
91
92&bus_jpeg {
93 devfreq = <&bus_wcore>;
94 status = "okay";
95};
96
97&bus_jpeg_apb {
98 devfreq = <&bus_wcore>;
99 status = "okay";
100};
101
102&bus_disp1_fimd {
103 devfreq = <&bus_wcore>;
104 status = "okay";
105};
106
107&bus_disp1 {
108 devfreq = <&bus_wcore>;
109 status = "okay";
110};
111
112&bus_gscl_scaler {
113 devfreq = <&bus_wcore>;
114 status = "okay";
115};
116
117&bus_mscl {
118 devfreq = <&bus_wcore>;
119 status = "okay";
120};
121
122&cpu0 {
123 cpu-supply = <&buck6_reg>;
124};
125
126&cpu4 {
127 cpu-supply = <&buck2_reg>;
128};
129
130&hsi2c_4 {
131 status = "okay";
132
133 s2mps11_pmic@66 {
134 compatible = "samsung,s2mps11-pmic";
135 reg = <0x66>;
136 samsung,s2mps11-acokb-ground;
137
138 interrupt-parent = <&gpx0>;
139 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&s2mps11_irq>;
142
143 s2mps11_osc: clocks {
144 #clock-cells = <1>;
145 clock-output-names = "s2mps11_ap",
146 "s2mps11_cp", "s2mps11_bt";
147 };
148
149 regulators {
150 ldo1_reg: LDO1 {
151 regulator-name = "vdd_ldo1";
152 regulator-min-microvolt = <1000000>;
153 regulator-max-microvolt = <1000000>;
154 regulator-always-on;
155 };
156
157 ldo3_reg: LDO3 {
158 regulator-name = "vddq_mmc0";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <1800000>;
161 };
162
163 ldo4_reg: LDO4 {
164 regulator-name = "vdd_adc";
165 regulator-min-microvolt = <1800000>;
166 regulator-max-microvolt = <1800000>;
167 };
168
169 ldo5_reg: LDO5 {
170 regulator-name = "vdd_ldo5";
171 regulator-min-microvolt = <1800000>;
172 regulator-max-microvolt = <1800000>;
173 regulator-always-on;
174 };
175
176 ldo6_reg: LDO6 {
177 regulator-name = "vdd_ldo6";
178 regulator-min-microvolt = <1000000>;
179 regulator-max-microvolt = <1000000>;
180 regulator-always-on;
181 };
182
183 ldo7_reg: LDO7 {
184 regulator-name = "vdd_ldo7";
185 regulator-min-microvolt = <1800000>;
186 regulator-max-microvolt = <1800000>;
187 regulator-always-on;
188 };
189
190 ldo8_reg: LDO8 {
191 regulator-name = "vdd_ldo8";
192 regulator-min-microvolt = <1800000>;
193 regulator-max-microvolt = <1800000>;
194 regulator-always-on;
195 };
196
197 ldo9_reg: LDO9 {
198 regulator-name = "vdd_ldo9";
199 regulator-min-microvolt = <3000000>;
200 regulator-max-microvolt = <3000000>;
201 regulator-always-on;
202 };
203
204 ldo10_reg: LDO10 {
205 regulator-name = "vdd_ldo10";
206 regulator-min-microvolt = <1800000>;
207 regulator-max-microvolt = <1800000>;
208 regulator-always-on;
209 };
210
211 ldo11_reg: LDO11 {
212 regulator-name = "vdd_ldo11";
213 regulator-min-microvolt = <1000000>;
214 regulator-max-microvolt = <1000000>;
215 regulator-always-on;
216 };
217
218 ldo12_reg: LDO12 {
219 regulator-name = "vdd_ldo12";
220 regulator-min-microvolt = <1800000>;
221 regulator-max-microvolt = <1800000>;
222 regulator-always-on;
223 };
224
225 ldo13_reg: LDO13 {
226 regulator-name = "vddq_mmc2";
227 regulator-min-microvolt = <2800000>;
228 regulator-max-microvolt = <2800000>;
229 };
230
231 ldo15_reg: LDO15 {
232 regulator-name = "vdd_ldo15";
e4c1ea7b
DK		 233 regulator-min-microvolt = <3300000>;
234 regulator-max-microvolt = <3300000>;
1ac49427
MS		 235 regulator-always-on;
236 };
237
238 ldo16_reg: LDO16 {
239 regulator-name = "vdd_ldo16";
240 regulator-min-microvolt = <2200000>;
241 regulator-max-microvolt = <2200000>;
242 regulator-always-on;
243 };
244
245 ldo17_reg: LDO17 {
e4c1ea7b 246 regulator-name = "vdd_ldo17";
1ac49427
MS		 247 regulator-min-microvolt = <3300000>;
248 regulator-max-microvolt = <3300000>;
249 regulator-always-on;
250 };
251
252 ldo18_reg: LDO18 {
253 regulator-name = "vdd_emmc_1V8";
254 regulator-min-microvolt = <1800000>;
255 regulator-max-microvolt = <1800000>;
256 };
257
258 ldo19_reg: LDO19 {
259 regulator-name = "vdd_sd";
260 regulator-min-microvolt = <2800000>;
261 regulator-max-microvolt = <2800000>;
262 };
263
264 ldo24_reg: LDO24 {
265 regulator-name = "tsp_io";
266 regulator-min-microvolt = <2800000>;
267 regulator-max-microvolt = <2800000>;
268 regulator-always-on;
269 };
270
271 ldo26_reg: LDO26 {
272 regulator-name = "vdd_ldo26";
273 regulator-min-microvolt = <3000000>;
274 regulator-max-microvolt = <3000000>;
275 regulator-always-on;
276 };
277
278 buck1_reg: BUCK1 {
279 regulator-name = "vdd_mif";
280 regulator-min-microvolt = <800000>;
281 regulator-max-microvolt = <1300000>;
282 regulator-always-on;
283 regulator-boot-on;
284 };
285
286 buck2_reg: BUCK2 {
287 regulator-name = "vdd_arm";
288 regulator-min-microvolt = <800000>;
289 regulator-max-microvolt = <1500000>;
290 regulator-always-on;
291 regulator-boot-on;
292 };
293
294 buck3_reg: BUCK3 {
295 regulator-name = "vdd_int";
296 regulator-min-microvolt = <800000>;
297 regulator-max-microvolt = <1400000>;
298 regulator-always-on;
299 regulator-boot-on;
300 };
301
302 buck4_reg: BUCK4 {
303 regulator-name = "vdd_g3d";
304 regulator-min-microvolt = <800000>;
305 regulator-max-microvolt = <1400000>;
306 regulator-always-on;
307 regulator-boot-on;
308 };
309
310 buck5_reg: BUCK5 {
311 regulator-name = "vdd_mem";
312 regulator-min-microvolt = <800000>;
313 regulator-max-microvolt = <1400000>;
314 regulator-always-on;
315 regulator-boot-on;
316 };
317
318 buck6_reg: BUCK6 {
319 regulator-name = "vdd_kfc";
320 regulator-min-microvolt = <800000>;
321 regulator-max-microvolt = <1500000>;
322 regulator-always-on;
323 regulator-boot-on;
324 };
325
326 buck7_reg: BUCK7 {
327 regulator-name = "vdd_1.0v_ldo";
328 regulator-min-microvolt = <800000>;
329 regulator-max-microvolt = <1500000>;
330 regulator-always-on;
331 regulator-boot-on;
332 };
333
334 buck8_reg: BUCK8 {
335 regulator-name = "vdd_1.8v_ldo";
336 regulator-min-microvolt = <800000>;
337 regulator-max-microvolt = <1500000>;
338 regulator-always-on;
339 regulator-boot-on;
340 };
341
342 buck9_reg: BUCK9 {
343 regulator-name = "vdd_2.8v_ldo";
344 regulator-min-microvolt = <3000000>;
345 regulator-max-microvolt = <3750000>;
346 regulator-always-on;
347 regulator-boot-on;
348 };
349
350 buck10_reg: BUCK10 {
351 regulator-name = "vdd_vmem";
352 regulator-min-microvolt = <2850000>;
353 regulator-max-microvolt = <2850000>;
354 regulator-always-on;
355 regulator-boot-on;
356 };
357 };
358 };
359};
360
361&mmc_2 {
362 status = "okay";
363 card-detect-delay = <200>;
364 samsung,dw-mshc-ciu-div = <3>;
365 samsung,dw-mshc-sdr-timing = <0 4>;
366 samsung,dw-mshc-ddr-timing = <0 2>;
367 pinctrl-names = "default";
368 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
369 bus-width = <4>;
370 cap-sd-highspeed;
371 vmmc-supply = <&ldo19_reg>;
372 vqmmc-supply = <&ldo13_reg>;
373};
374
375&nocp_mem0_0 {
376 status = "okay";
377};
378
379&nocp_mem0_1 {
380 status = "okay";
381};
382
383&nocp_mem1_0 {
384 status = "okay";
385};
386
387&nocp_mem1_1 {
388 status = "okay";
389};
390
391&pinctrl_0 {
392 s2mps11_irq: s2mps11-irq {
393 samsung,pins = "gpx0-4";
394 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
395 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
396 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
397 };
398};
399
400&tmu_cpu0 {
401 vtmu-supply = <&ldo7_reg>;
402};
403
404&tmu_cpu1 {
405 vtmu-supply = <&ldo7_reg>;
406};
407
408&tmu_cpu2 {
409 vtmu-supply = <&ldo7_reg>;
410};
411
412&tmu_cpu3 {
413 vtmu-supply = <&ldo7_reg>;
414};
415
416&tmu_gpu {
417 vtmu-supply = <&ldo7_reg>;
418};
419
420&rtc {
421 status = "okay";
422 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
423 clock-names = "rtc", "rtc_src";
424};
425
426&usbdrd_dwc3_0 {
427 dr_mode = "host";
428};
429
430/* usbdrd_dwc3_1 mode customized in each board */
431
432&usbdrd3_0 {
433 vdd33-supply = <&ldo9_reg>;
434 vdd10-supply = <&ldo11_reg>;
435};
436
437&usbdrd3_1 {
438 vdd33-supply = <&ldo9_reg>;
439 vdd10-supply = <&ldo11_reg>;
440};
Linux 6.x block layer and io_uring tree(s)