ARM: dts: Add regulator entries to smdk5420
[linux-2.6-block.git] / arch / arm / boot / dts / exynos5420-smdk5420.dts
CommitLineData
34dcedfb
CK
1/*
2 * SAMSUNG SMDK5420 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12/dts-v1/;
13#include "exynos5420.dtsi"
14
15/ {
16 model = "Samsung SMDK5420 board based on EXYNOS5420";
17 compatible = "samsung,smdk5420", "samsung,exynos5420";
18
19 memory {
20 reg = <0x20000000 0x80000000>;
21 };
22
23 chosen {
24 bootargs = "console=ttySAC2,115200 init=/linuxrc";
25 };
26
27 fixed-rate-clocks {
28 oscclk {
29 compatible = "samsung,exynos5420-oscclk";
30 clock-frequency = <24000000>;
31 };
32 };
ee3381d4 33
0e2c5915
YK
34 mmc@12200000 {
35 status = "okay";
36 broken-cd;
37 supports-highspeed;
38 card-detect-delay = <200>;
39 samsung,dw-mshc-ciu-div = <3>;
40 samsung,dw-mshc-sdr-timing = <0 4>;
41 samsung,dw-mshc-ddr-timing = <0 2>;
42 pinctrl-names = "default";
43 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
44
45 slot@0 {
46 reg = <0>;
47 bus-width = <8>;
48 };
49 };
50
51 mmc@12220000 {
52 status = "okay";
53 supports-highspeed;
54 card-detect-delay = <200>;
55 samsung,dw-mshc-ciu-div = <3>;
56 samsung,dw-mshc-sdr-timing = <2 3>;
57 samsung,dw-mshc-ddr-timing = <1 2>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
60
61 slot@0 {
62 reg = <0>;
63 bus-width = <4>;
64 };
65 };
66
1339d33a 67 dp-controller@145B0000 {
4e780892
VS
68 pinctrl-names = "default";
69 pinctrl-0 = <&dp_hpd>;
1339d33a
VS
70 samsung,color-space = <0>;
71 samsung,dynamic-range = <0>;
72 samsung,ycbcr-coeff = <0>;
73 samsung,color-depth = <1>;
74 samsung,link-rate = <0x0a>;
75 samsung,lane-count = <4>;
76 status = "okay";
77 };
78
ee3381d4
VS
79 fimd@14400000 {
80 status = "okay";
81 display-timings {
82 native-mode = <&timing0>;
83 timing0: timing@0 {
84 clock-frequency = <50000>;
85 hactive = <2560>;
86 vactive = <1600>;
87 hfront-porch = <48>;
88 hback-porch = <80>;
89 hsync-len = <32>;
90 vback-porch = <16>;
91 vfront-porch = <8>;
92 vsync-len = <6>;
93 };
94 };
95 };
96
29f86661
RS
97 pinctrl@13400000 {
98 hdmi_hpd_irq: hdmi-hpd-irq {
99 samsung,pins = "gpx3-7";
100 samsung,pin-function = <0>;
101 samsung,pin-pud = <1>;
102 samsung,pin-drv = <0>;
103 };
104 };
105
106 hdmi@14530000 {
107 status = "okay";
108 hpd-gpio = <&gpx3 7 0>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&hdmi_hpd_irq>;
111 };
112
113 i2c_2: i2c@12C80000 {
114 samsung,i2c-sda-delay = <100>;
115 samsung,i2c-max-bus-freq = <66000>;
116 status = "okay";
117
118 hdmiddc@50 {
119 compatible = "samsung,exynos4210-hdmiddc";
120 reg = <0x50>;
121 };
122 };
c8c253fc
SK
123
124 hsi2c_4: i2c@12CA0000 {
125 status = "okay";
126
127 s2mps11_pmic@66 {
128 compatible = "samsung,s2mps11-pmic";
129 reg = <0x66>;
130 s2mps11,buck2-ramp-delay = <12>;
131 s2mps11,buck34-ramp-delay = <12>;
132 s2mps11,buck16-ramp-delay = <12>;
133 s2mps11,buck6-ramp-enable = <1>;
134 s2mps11,buck2-ramp-enable = <1>;
135 s2mps11,buck3-ramp-enable = <1>;
136 s2mps11,buck4-ramp-enable = <1>;
137
138 s2mps11_osc: clocks {
139 #clock-cells = <1>;
140 clock-output-names = "s2mps11_ap",
141 "s2mps11_cp", "s2mps11_bt";
142 };
143
144 regulators {
145 ldo1_reg: LDO1 {
146 regulator-name = "vdd_ldo1";
147 regulator-min-microvolt = <1000000>;
148 regulator-max-microvolt = <1000000>;
149 regulator-always-on;
150 };
151
152 ldo3_reg: LDO3 {
153 regulator-name = "vdd_ldo3";
154 regulator-min-microvolt = <1800000>;
155 regulator-max-microvolt = <1800000>;
156 regulator-always-on;
157 };
158
159 ldo5_reg: LDO5 {
160 regulator-name = "vdd_ldo5";
161 regulator-min-microvolt = <1800000>;
162 regulator-max-microvolt = <1800000>;
163 regulator-always-on;
164 };
165
166 ldo6_reg: LDO6 {
167 regulator-name = "vdd_ldo6";
168 regulator-min-microvolt = <1000000>;
169 regulator-max-microvolt = <1000000>;
170 regulator-always-on;
171 };
172
173 ldo7_reg: LDO7 {
174 regulator-name = "vdd_ldo7";
175 regulator-min-microvolt = <1800000>;
176 regulator-max-microvolt = <1800000>;
177 regulator-always-on;
178 };
179
180 ldo8_reg: LDO8 {
181 regulator-name = "vdd_ldo8";
182 regulator-min-microvolt = <1800000>;
183 regulator-max-microvolt = <1800000>;
184 regulator-always-on;
185 };
186
187 ldo9_reg: LDO9 {
188 regulator-name = "vdd_ldo9";
189 regulator-min-microvolt = <3000000>;
190 regulator-max-microvolt = <3000000>;
191 regulator-always-on;
192 };
193
194 ldo10_reg: LDO10 {
195 regulator-name = "vdd_ldo10";
196 regulator-min-microvolt = <1800000>;
197 regulator-max-microvolt = <1800000>;
198 regulator-always-on;
199 };
200
201 ldo11_reg: LDO11 {
202 regulator-name = "vdd_ldo11";
203 regulator-min-microvolt = <1000000>;
204 regulator-max-microvolt = <1000000>;
205 regulator-always-on;
206 };
207
208 ldo12_reg: LDO12 {
209 regulator-name = "vdd_ldo12";
210 regulator-min-microvolt = <1800000>;
211 regulator-max-microvolt = <1800000>;
212 regulator-always-on;
213 };
214
215 ldo13_reg: LDO13 {
216 regulator-name = "vdd_ldo13";
217 regulator-min-microvolt = <2800000>;
218 regulator-max-microvolt = <2800000>;
219 regulator-always-on;
220 };
221
222 ldo15_reg: LDO15 {
223 regulator-name = "vdd_ldo15";
224 regulator-min-microvolt = <3100000>;
225 regulator-max-microvolt = <3100000>;
226 regulator-always-on;
227 };
228
229 ldo16_reg: LDO16 {
230 regulator-name = "vdd_ldo16";
231 regulator-min-microvolt = <2200000>;
232 regulator-max-microvolt = <2200000>;
233 regulator-always-on;
234 };
235
236 ldo17_reg: LDO17 {
237 regulator-name = "tsp_avdd";
238 regulator-min-microvolt = <3300000>;
239 regulator-max-microvolt = <3300000>;
240 regulator-always-on;
241 };
242
243 ldo19_reg: LDO19 {
244 regulator-name = "vdd_sd";
245 regulator-min-microvolt = <2800000>;
246 regulator-max-microvolt = <2800000>;
247 regulator-always-on;
248 };
249
250 ldo24_reg: LDO24 {
251 regulator-name = "tsp_io";
252 regulator-min-microvolt = <2800000>;
253 regulator-max-microvolt = <2800000>;
254 regulator-always-on;
255 };
256
257 buck1_reg: BUCK1 {
258 regulator-name = "vdd_mif";
259 regulator-min-microvolt = <800000>;
260 regulator-max-microvolt = <1300000>;
261 regulator-always-on;
262 regulator-boot-on;
263 };
264
265 buck2_reg: BUCK2 {
266 regulator-name = "vdd_arm";
267 regulator-min-microvolt = <800000>;
268 regulator-max-microvolt = <1500000>;
269 regulator-always-on;
270 regulator-boot-on;
271 };
272
273 buck3_reg: BUCK3 {
274 regulator-name = "vdd_int";
275 regulator-min-microvolt = <800000>;
276 regulator-max-microvolt = <1400000>;
277 regulator-always-on;
278 regulator-boot-on;
279 };
280
281 buck4_reg: BUCK4 {
282 regulator-name = "vdd_g3d";
283 regulator-min-microvolt = <800000>;
284 regulator-max-microvolt = <1400000>;
285 regulator-always-on;
286 regulator-boot-on;
287 };
288
289 buck5_reg: BUCK5 {
290 regulator-name = "vdd_mem";
291 regulator-min-microvolt = <800000>;
292 regulator-max-microvolt = <1400000>;
293 regulator-always-on;
294 regulator-boot-on;
295 };
296
297 buck6_reg: BUCK6 {
298 regulator-name = "vdd_kfc";
299 regulator-min-microvolt = <800000>;
300 regulator-max-microvolt = <1500000>;
301 regulator-always-on;
302 regulator-boot-on;
303 };
304
305 buck7_reg: BUCK7 {
306 regulator-name = "vdd_1.0v_ldo";
307 regulator-min-microvolt = <800000>;
308 regulator-max-microvolt = <1500000>;
309 regulator-always-on;
310 regulator-boot-on;
311 };
312
313 buck8_reg: BUCK8 {
314 regulator-name = "vdd_1.8v_ldo";
315 regulator-min-microvolt = <800000>;
316 regulator-max-microvolt = <1500000>;
317 regulator-always-on;
318 regulator-boot-on;
319 };
320
321 buck9_reg: BUCK9 {
322 regulator-name = "vdd_2.8v_ldo";
323 regulator-min-microvolt = <3000000>;
324 regulator-max-microvolt = <3750000>;
325 regulator-always-on;
326 regulator-boot-on;
327 };
328
329 buck10_reg: BUCK10 {
330 regulator-name = "vdd_vmem";
331 regulator-min-microvolt = <2850000>;
332 regulator-max-microvolt = <2850000>;
333 regulator-always-on;
334 regulator-boot-on;
335 };
336 };
337 };
338 };
34dcedfb 339};