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34dcedfb CK |
1 | /* |
2 | * SAMSUNG SMDK5420 board device tree source | |
3 | * | |
4 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
13 | #include "exynos5420.dtsi" | |
14 | ||
15 | / { | |
16 | model = "Samsung SMDK5420 board based on EXYNOS5420"; | |
17 | compatible = "samsung,smdk5420", "samsung,exynos5420"; | |
18 | ||
19 | memory { | |
20 | reg = <0x20000000 0x80000000>; | |
21 | }; | |
22 | ||
23 | chosen { | |
24 | bootargs = "console=ttySAC2,115200 init=/linuxrc"; | |
25 | }; | |
26 | ||
27 | fixed-rate-clocks { | |
28 | oscclk { | |
29 | compatible = "samsung,exynos5420-oscclk"; | |
30 | clock-frequency = <24000000>; | |
31 | }; | |
32 | }; | |
ee3381d4 | 33 | |
451c402b SK |
34 | rtc@101E0000 { |
35 | status = "okay"; | |
36 | }; | |
37 | ||
0e2c5915 YK |
38 | mmc@12200000 { |
39 | status = "okay"; | |
40 | broken-cd; | |
41 | supports-highspeed; | |
42 | card-detect-delay = <200>; | |
43 | samsung,dw-mshc-ciu-div = <3>; | |
44 | samsung,dw-mshc-sdr-timing = <0 4>; | |
45 | samsung,dw-mshc-ddr-timing = <0 2>; | |
46 | pinctrl-names = "default"; | |
47 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; | |
48 | ||
49 | slot@0 { | |
50 | reg = <0>; | |
51 | bus-width = <8>; | |
52 | }; | |
53 | }; | |
54 | ||
55 | mmc@12220000 { | |
56 | status = "okay"; | |
57 | supports-highspeed; | |
58 | card-detect-delay = <200>; | |
59 | samsung,dw-mshc-ciu-div = <3>; | |
60 | samsung,dw-mshc-sdr-timing = <2 3>; | |
61 | samsung,dw-mshc-ddr-timing = <1 2>; | |
62 | pinctrl-names = "default"; | |
63 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; | |
64 | ||
65 | slot@0 { | |
66 | reg = <0>; | |
67 | bus-width = <4>; | |
68 | }; | |
69 | }; | |
70 | ||
1339d33a | 71 | dp-controller@145B0000 { |
4e780892 VS |
72 | pinctrl-names = "default"; |
73 | pinctrl-0 = <&dp_hpd>; | |
1339d33a VS |
74 | samsung,color-space = <0>; |
75 | samsung,dynamic-range = <0>; | |
76 | samsung,ycbcr-coeff = <0>; | |
77 | samsung,color-depth = <1>; | |
78 | samsung,link-rate = <0x0a>; | |
79 | samsung,lane-count = <4>; | |
80 | status = "okay"; | |
81 | }; | |
82 | ||
ee3381d4 VS |
83 | fimd@14400000 { |
84 | status = "okay"; | |
85 | display-timings { | |
86 | native-mode = <&timing0>; | |
87 | timing0: timing@0 { | |
88 | clock-frequency = <50000>; | |
89 | hactive = <2560>; | |
90 | vactive = <1600>; | |
91 | hfront-porch = <48>; | |
92 | hback-porch = <80>; | |
93 | hsync-len = <32>; | |
94 | vback-porch = <16>; | |
95 | vfront-porch = <8>; | |
96 | vsync-len = <6>; | |
97 | }; | |
98 | }; | |
99 | }; | |
100 | ||
29f86661 RS |
101 | pinctrl@13400000 { |
102 | hdmi_hpd_irq: hdmi-hpd-irq { | |
103 | samsung,pins = "gpx3-7"; | |
104 | samsung,pin-function = <0>; | |
105 | samsung,pin-pud = <1>; | |
106 | samsung,pin-drv = <0>; | |
107 | }; | |
108 | }; | |
109 | ||
110 | hdmi@14530000 { | |
111 | status = "okay"; | |
112 | hpd-gpio = <&gpx3 7 0>; | |
113 | pinctrl-names = "default"; | |
114 | pinctrl-0 = <&hdmi_hpd_irq>; | |
115 | }; | |
116 | ||
117 | i2c_2: i2c@12C80000 { | |
118 | samsung,i2c-sda-delay = <100>; | |
119 | samsung,i2c-max-bus-freq = <66000>; | |
120 | status = "okay"; | |
121 | ||
122 | hdmiddc@50 { | |
123 | compatible = "samsung,exynos4210-hdmiddc"; | |
124 | reg = <0x50>; | |
125 | }; | |
126 | }; | |
c8c253fc SK |
127 | |
128 | hsi2c_4: i2c@12CA0000 { | |
129 | status = "okay"; | |
130 | ||
131 | s2mps11_pmic@66 { | |
132 | compatible = "samsung,s2mps11-pmic"; | |
133 | reg = <0x66>; | |
134 | s2mps11,buck2-ramp-delay = <12>; | |
135 | s2mps11,buck34-ramp-delay = <12>; | |
136 | s2mps11,buck16-ramp-delay = <12>; | |
137 | s2mps11,buck6-ramp-enable = <1>; | |
138 | s2mps11,buck2-ramp-enable = <1>; | |
139 | s2mps11,buck3-ramp-enable = <1>; | |
140 | s2mps11,buck4-ramp-enable = <1>; | |
141 | ||
142 | s2mps11_osc: clocks { | |
143 | #clock-cells = <1>; | |
144 | clock-output-names = "s2mps11_ap", | |
145 | "s2mps11_cp", "s2mps11_bt"; | |
146 | }; | |
147 | ||
148 | regulators { | |
149 | ldo1_reg: LDO1 { | |
150 | regulator-name = "vdd_ldo1"; | |
151 | regulator-min-microvolt = <1000000>; | |
152 | regulator-max-microvolt = <1000000>; | |
153 | regulator-always-on; | |
154 | }; | |
155 | ||
156 | ldo3_reg: LDO3 { | |
157 | regulator-name = "vdd_ldo3"; | |
158 | regulator-min-microvolt = <1800000>; | |
159 | regulator-max-microvolt = <1800000>; | |
160 | regulator-always-on; | |
161 | }; | |
162 | ||
163 | ldo5_reg: LDO5 { | |
164 | regulator-name = "vdd_ldo5"; | |
165 | regulator-min-microvolt = <1800000>; | |
166 | regulator-max-microvolt = <1800000>; | |
167 | regulator-always-on; | |
168 | }; | |
169 | ||
170 | ldo6_reg: LDO6 { | |
171 | regulator-name = "vdd_ldo6"; | |
172 | regulator-min-microvolt = <1000000>; | |
173 | regulator-max-microvolt = <1000000>; | |
174 | regulator-always-on; | |
175 | }; | |
176 | ||
177 | ldo7_reg: LDO7 { | |
178 | regulator-name = "vdd_ldo7"; | |
179 | regulator-min-microvolt = <1800000>; | |
180 | regulator-max-microvolt = <1800000>; | |
181 | regulator-always-on; | |
182 | }; | |
183 | ||
184 | ldo8_reg: LDO8 { | |
185 | regulator-name = "vdd_ldo8"; | |
186 | regulator-min-microvolt = <1800000>; | |
187 | regulator-max-microvolt = <1800000>; | |
188 | regulator-always-on; | |
189 | }; | |
190 | ||
191 | ldo9_reg: LDO9 { | |
192 | regulator-name = "vdd_ldo9"; | |
193 | regulator-min-microvolt = <3000000>; | |
194 | regulator-max-microvolt = <3000000>; | |
195 | regulator-always-on; | |
196 | }; | |
197 | ||
198 | ldo10_reg: LDO10 { | |
199 | regulator-name = "vdd_ldo10"; | |
200 | regulator-min-microvolt = <1800000>; | |
201 | regulator-max-microvolt = <1800000>; | |
202 | regulator-always-on; | |
203 | }; | |
204 | ||
205 | ldo11_reg: LDO11 { | |
206 | regulator-name = "vdd_ldo11"; | |
207 | regulator-min-microvolt = <1000000>; | |
208 | regulator-max-microvolt = <1000000>; | |
209 | regulator-always-on; | |
210 | }; | |
211 | ||
212 | ldo12_reg: LDO12 { | |
213 | regulator-name = "vdd_ldo12"; | |
214 | regulator-min-microvolt = <1800000>; | |
215 | regulator-max-microvolt = <1800000>; | |
216 | regulator-always-on; | |
217 | }; | |
218 | ||
219 | ldo13_reg: LDO13 { | |
220 | regulator-name = "vdd_ldo13"; | |
221 | regulator-min-microvolt = <2800000>; | |
222 | regulator-max-microvolt = <2800000>; | |
223 | regulator-always-on; | |
224 | }; | |
225 | ||
226 | ldo15_reg: LDO15 { | |
227 | regulator-name = "vdd_ldo15"; | |
228 | regulator-min-microvolt = <3100000>; | |
229 | regulator-max-microvolt = <3100000>; | |
230 | regulator-always-on; | |
231 | }; | |
232 | ||
233 | ldo16_reg: LDO16 { | |
234 | regulator-name = "vdd_ldo16"; | |
235 | regulator-min-microvolt = <2200000>; | |
236 | regulator-max-microvolt = <2200000>; | |
237 | regulator-always-on; | |
238 | }; | |
239 | ||
240 | ldo17_reg: LDO17 { | |
241 | regulator-name = "tsp_avdd"; | |
242 | regulator-min-microvolt = <3300000>; | |
243 | regulator-max-microvolt = <3300000>; | |
244 | regulator-always-on; | |
245 | }; | |
246 | ||
247 | ldo19_reg: LDO19 { | |
248 | regulator-name = "vdd_sd"; | |
249 | regulator-min-microvolt = <2800000>; | |
250 | regulator-max-microvolt = <2800000>; | |
251 | regulator-always-on; | |
252 | }; | |
253 | ||
254 | ldo24_reg: LDO24 { | |
255 | regulator-name = "tsp_io"; | |
256 | regulator-min-microvolt = <2800000>; | |
257 | regulator-max-microvolt = <2800000>; | |
258 | regulator-always-on; | |
259 | }; | |
260 | ||
261 | buck1_reg: BUCK1 { | |
262 | regulator-name = "vdd_mif"; | |
263 | regulator-min-microvolt = <800000>; | |
264 | regulator-max-microvolt = <1300000>; | |
265 | regulator-always-on; | |
266 | regulator-boot-on; | |
267 | }; | |
268 | ||
269 | buck2_reg: BUCK2 { | |
270 | regulator-name = "vdd_arm"; | |
271 | regulator-min-microvolt = <800000>; | |
272 | regulator-max-microvolt = <1500000>; | |
273 | regulator-always-on; | |
274 | regulator-boot-on; | |
275 | }; | |
276 | ||
277 | buck3_reg: BUCK3 { | |
278 | regulator-name = "vdd_int"; | |
279 | regulator-min-microvolt = <800000>; | |
280 | regulator-max-microvolt = <1400000>; | |
281 | regulator-always-on; | |
282 | regulator-boot-on; | |
283 | }; | |
284 | ||
285 | buck4_reg: BUCK4 { | |
286 | regulator-name = "vdd_g3d"; | |
287 | regulator-min-microvolt = <800000>; | |
288 | regulator-max-microvolt = <1400000>; | |
289 | regulator-always-on; | |
290 | regulator-boot-on; | |
291 | }; | |
292 | ||
293 | buck5_reg: BUCK5 { | |
294 | regulator-name = "vdd_mem"; | |
295 | regulator-min-microvolt = <800000>; | |
296 | regulator-max-microvolt = <1400000>; | |
297 | regulator-always-on; | |
298 | regulator-boot-on; | |
299 | }; | |
300 | ||
301 | buck6_reg: BUCK6 { | |
302 | regulator-name = "vdd_kfc"; | |
303 | regulator-min-microvolt = <800000>; | |
304 | regulator-max-microvolt = <1500000>; | |
305 | regulator-always-on; | |
306 | regulator-boot-on; | |
307 | }; | |
308 | ||
309 | buck7_reg: BUCK7 { | |
310 | regulator-name = "vdd_1.0v_ldo"; | |
311 | regulator-min-microvolt = <800000>; | |
312 | regulator-max-microvolt = <1500000>; | |
313 | regulator-always-on; | |
314 | regulator-boot-on; | |
315 | }; | |
316 | ||
317 | buck8_reg: BUCK8 { | |
318 | regulator-name = "vdd_1.8v_ldo"; | |
319 | regulator-min-microvolt = <800000>; | |
320 | regulator-max-microvolt = <1500000>; | |
321 | regulator-always-on; | |
322 | regulator-boot-on; | |
323 | }; | |
324 | ||
325 | buck9_reg: BUCK9 { | |
326 | regulator-name = "vdd_2.8v_ldo"; | |
327 | regulator-min-microvolt = <3000000>; | |
328 | regulator-max-microvolt = <3750000>; | |
329 | regulator-always-on; | |
330 | regulator-boot-on; | |
331 | }; | |
332 | ||
333 | buck10_reg: BUCK10 { | |
334 | regulator-name = "vdd_vmem"; | |
335 | regulator-min-microvolt = <2850000>; | |
336 | regulator-max-microvolt = <2850000>; | |
337 | regulator-always-on; | |
338 | regulator-boot-on; | |
339 | }; | |
340 | }; | |
341 | }; | |
342 | }; | |
34dcedfb | 343 | }; |