projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge remote-tracking branch 'asoc/topic/core' into asoc-next
[linux-2.6-block.git] / arch / arm / boot / dts / exynos4412-trats2.dts
CommitLineData
15dfdfad
TF		 1/*
2 * Samsung's Exynos4412 based Trats 2 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Device tree source file for Samsung's Trats 2 board which is based on
8 * Samsung's Exynos4412 SoC.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/dts-v1/;
16#include "exynos4412.dtsi"
7eec1266 17#include <dt-bindings/gpio/gpio.h>
e8614292 18#include <dt-bindings/interrupt-controller/irq.h>
ce9940a9 19#include <dt-bindings/clock/maxim,max77686.h>
15dfdfad
TF		 20
21/ {
22 model = "Samsung Trats 2 based on Exynos4412";
8bdb31b4 23 compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4";
15dfdfad 24
9f1eaef2 25 aliases {
6af2ba90 26 i2c9 = &i2c_ak8975;
85cb4e0b 27 i2c10 = &i2c_cm36651;
7eec1266 28 i2c11 = &i2c_max77693;
e8614292 29 i2c12 = &i2c_max77693_fuel;
9f1eaef2
JA		 30 };
31
15dfdfad
TF		 32 memory {
33 reg = <0x40000000 0x40000000>;
34 };
35
36 chosen {
37 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
62d38099 38 stdout-path = &serial_2;
15dfdfad
TF		 39 };
40
41 firmware@0204F000 {
42 compatible = "samsung,secure-firmware";
43 reg = <0x0204F000 0x1000>;
44 };
45
46 fixed-rate-clocks {
47 xxti {
48 compatible = "samsung,clock-xxti", "fixed-clock";
49 clock-frequency = <0>;
50 };
51
52 xusbxti {
53 compatible = "samsung,clock-xusbxti", "fixed-clock";
54 clock-frequency = <24000000>;
55 };
56 };
57
58 regulators {
59 compatible = "simple-bus";
60 #address-cells = <1>;
61 #size-cells = <0>;
62
b4fec647
SN		 63 cam_io_reg: voltage-regulator-1 {
64 compatible = "regulator-fixed";
65 regulator-name = "CAM_SENSOR_A";
66 regulator-min-microvolt = <2800000>;
67 regulator-max-microvolt = <2800000>;
68 gpio = <&gpm0 2 0>;
69 enable-active-high;
70 };
71
420ae845
AH		 72 lcd_vdd3_reg: voltage-regulator-2 {
73 compatible = "regulator-fixed";
74 regulator-name = "LCD_VDD_2.2V";
75 regulator-min-microvolt = <2200000>;
76 regulator-max-microvolt = <2200000>;
77 gpio = <&gpc0 1 0>;
78 enable-active-high;
79 };
80
4cb37864
SN		 81 cam_af_reg: voltage-regulator-3 {
82 compatible = "regulator-fixed";
83 regulator-name = "CAM_AF";
84 regulator-min-microvolt = <2800000>;
85 regulator-max-microvolt = <2800000>;
86 gpio = <&gpm0 4 0>;
87 enable-active-high;
88 };
89
85cb4e0b
BS		 90 ps_als_reg: voltage-regulator-5 {
91 compatible = "regulator-fixed";
92 regulator-name = "LED_A_3.0V";
93 regulator-min-microvolt = <3000000>;
94 regulator-max-microvolt = <3000000>;
95 gpio = <&gpj0 5 0>;
96 enable-active-high;
97 };
15dfdfad
TF		 98 };
99
100 gpio-keys {
101 compatible = "gpio-keys";
102
103 key-down {
172ff6c6 104 gpios = <&gpx3 3 1>;
15dfdfad
TF		 105 linux,code = <114>;
106 label = "volume down";
107 debounce-interval = <10>;
108 };
109
110 key-up {
172ff6c6 111 gpios = <&gpx2 2 1>;
15dfdfad
TF		 112 linux,code = <115>;
113 label = "volume up";
114 debounce-interval = <10>;
115 };
116
117 key-power {
15dfdfad
TF		 118 gpios = <&gpx2 7 1>;
119 linux,code = <116>;
120 label = "power";
121 debounce-interval = <10>;
122 gpio-key,wakeup;
123 };
172ff6c6
BS		 124
125 key-ok {
126 gpios = <&gpx0 1 1>;
127 linux,code = <139>;
128 label = "ok";
129 debounce-inteval = <10>;
130 gpio-key,wakeup;
131 };
15dfdfad
TF		 132 };
133
7eec1266
KK		 134 i2c_max77693: i2c-gpio-1 {
135 compatible = "i2c-gpio";
136 gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>;
137 i2c-gpio,delay-us = <2>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 status = "okay";
141
142 max77693@66 {
143 compatible = "maxim,max77693";
144 interrupt-parent = <&gpx1>;
145 interrupts = <5 2>;
146 reg = <0x66>;
147
148 regulators {
149 esafeout1_reg: ESAFEOUT1@1 {
150 regulator-name = "ESAFEOUT1";
151 };
152 esafeout2_reg: ESAFEOUT2@2 {
153 regulator-name = "ESAFEOUT2";
154 };
155 charger_reg: CHARGER@0 {
156 regulator-name = "CHARGER";
157 regulator-min-microamp = <60000>;
158 regulator-max-microamp = <2580000>;
159 };
160 };
d9c68089
JK		 161
162 max77693_haptic {
163 compatible = "maxim,max77693-haptic";
164 haptic-supply = <&ldo26_reg>;
165 pwms = <&pwm 0 38022 0>;
166 };
043ef148
KK		 167
168 charger {
169 compatible = "maxim,max77693-charger";
170
171 maxim,constant-microvolt = <4350000>;
172 maxim,min-system-microvolt = <3600000>;
173 maxim,thermal-regulation-celsius = <100>;
174 maxim,battery-overcurrent-microamp = <3500000>;
175 maxim,charge-input-threshold-microvolt = <4300000>;
176 };
7eec1266
KK		 177 };
178 };
179
e8614292
KK		 180 i2c_max77693_fuel: i2c-gpio-3 {
181 compatible = "i2c-gpio";
182 gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>;
183 i2c-gpio,delay-us = <2>;
184 #address-cells = <1>;
185 #size-cells = <0>;
186 status = "okay";
187
188 max77693-fuel-gauge@36 {
189 compatible = "maxim,max17047";
190 interrupt-parent = <&gpx2>;
191 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
192 reg = <0x36>;
7eec1266
KK		 193 };
194 };
195
9f1eaef2
JA		 196 i2c_ak8975: i2c-gpio-0 {
197 compatible = "i2c-gpio";
198 gpios = <&gpy2 4 0>, <&gpy2 5 0>;
199 i2c-gpio,delay-us = <2>;
200 #address-cells = <1>;
201 #size-cells = <0>;
202 status = "okay";
203
204 ak8975@0c {
30cc798b 205 compatible = "asahi-kasei,ak8975";
9f1eaef2
JA		 206 reg = <0x0c>;
207 gpios = <&gpj0 7 0>;
208 };
209 };
b4fec647 210
85cb4e0b
BS		 211 i2c_cm36651: i2c-gpio-2 {
212 compatible = "i2c-gpio";
213 gpios = <&gpf0 0 1>, <&gpf0 1 1>;
214 i2c-gpio,delay-us = <2>;
215 #address-cells = <1>;
216 #size-cells = <0>;
217
218 cm36651@18 {
219 compatible = "capella,cm36651";
220 reg = <0x18>;
221 interrupt-parent = <&gpx0>;
222 interrupts = <2 2>;
223 vled-supply = <&ps_als_reg>;
224 };
225 };
226
4cb37864
SN		 227 camera: camera {
228 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
b4fec647
SN		 229 pinctrl-names = "default";
230 status = "okay";
0357a443
SN		 231 assigned-clocks = <&clock CLK_MOUT_CAM0>,
232 <&clock CLK_MOUT_CAM1>;
cfe3b893
SN		 233 assigned-clock-parents = <&clock CLK_XUSBXTI>,
234 <&clock CLK_XUSBXTI>;
b4fec647 235
b4fec647 236
440e5aef
IS		 237 };
238
239 sound {
240 compatible = "samsung,trats2-audio";
241 samsung,i2s-controller = <&i2s0>;
242 samsung,model = "Trats2";
243 samsung,audio-codec = <&wm1811>;
244 samsung,audio-routing =
245 "SPK", "SPKOUTLN",
246 "SPK", "SPKOUTLP",
247 "SPK", "SPKOUTRN",
248 "SPK", "SPKOUTRP";
249 };
250
4f423788
CC		 251 thermistor-ap@0 {
252 compatible = "ntc,ncp15wb473";
253 pullup-uv = <1800000>; /* VCC_1.8V_AP */
254 pullup-ohm = <100000>; /* 100K */
255 pulldown-ohm = <100000>; /* 100K */
256 io-channels = <&adc 1>; /* AP temperature */
257 };
258
259 thermistor-battery@1 {
260 compatible = "ntc,ncp15wb473";
261 pullup-uv = <1800000>; /* VCC_1.8V_AP */
262 pullup-ohm = <100000>; /* 100K */
263 pulldown-ohm = <100000>; /* 100K */
264 io-channels = <&adc 2>; /* Battery temperature */
265 };
bf4a0bed
LM		 266
267 thermal-zones {
268 cpu_thermal: cpu-thermal {
269 cooling-maps {
270 map0 {
271 /* Corresponds to 800MHz at freq_table */
272 cooling-device = <&cpu0 7 7>;
273 };
274 map1 {
275 /* Corresponds to 200MHz at freq_table */
276 cooling-device = <&cpu0 13 13>;
277 };
278 };
279 };
280 };
15dfdfad 281};
09918a98 282
1fe9a942
KK		 283&adc {
284 vdd-supply = <&ldo3_reg>;
285 status = "okay";
286};
287
288&csis_0 {
289 status = "okay";
290 vddcore-supply = <&ldo8_reg>;
291 vddio-supply = <&ldo10_reg>;
292 assigned-clocks = <&clock CLK_MOUT_CSIS0>,
293 <&clock CLK_SCLK_CSIS0>;
294 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
295 assigned-clock-rates = <0>, <176000000>;
296
297 /* Camera C (3) MIPI CSI-2 (CSIS0) */
298 port@3 {
299 reg = <3>;
300 csis0_ep: endpoint {
301 remote-endpoint = <&s5c73m3_ep>;
302 data-lanes = <1 2 3 4>;
303 samsung,csis-hs-settle = <12>;
304 };
305 };
306};
307
308&csis_1 {
309 status = "okay";
310 vddcore-supply = <&ldo8_reg>;
311 vddio-supply = <&ldo10_reg>;
312 assigned-clocks = <&clock CLK_MOUT_CSIS1>,
313 <&clock CLK_SCLK_CSIS1>;
314 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
315 assigned-clock-rates = <0>, <176000000>;
316
317 /* Camera D (4) MIPI CSI-2 (CSIS1) */
318 port@4 {
319 reg = <4>;
320 csis1_ep: endpoint {
321 remote-endpoint = <&is_s5k6a3_ep>;
322 data-lanes = <1>;
323 samsung,csis-hs-settle = <18>;
324 samsung,csis-wclk;
325 };
326 };
327};
328
329&dsi_0 {
330 vddcore-supply = <&ldo8_reg>;
331 vddio-supply = <&ldo10_reg>;
332 samsung,pll-clock-frequency = <24000000>;
333 status = "okay";
334
335 ports {
336 #address-cells = <1>;
337 #size-cells = <0>;
338
339 port@1 {
340 reg = <1>;
341
342 dsi_out: endpoint {
343 remote-endpoint = <&dsi_in>;
344 samsung,burst-clock-frequency = <500000000>;
345 samsung,esc-clock-frequency = <20000000>;
346 };
347 };
348 };
349
350 panel@0 {
351 compatible = "samsung,s6e8aa0";
352 reg = <0>;
353 vdd3-supply = <&lcd_vdd3_reg>;
354 vci-supply = <&ldo25_reg>;
355 reset-gpios = <&gpy4 5 0>;
356 power-on-delay= <50>;
357 reset-delay = <100>;
358 init-delay = <100>;
359 flip-horizontal;
360 flip-vertical;
361 panel-width-mm = <58>;
362 panel-height-mm = <103>;
363
364 display-timings {
365 timing-0 {
366 clock-frequency = <57153600>;
367 hactive = <720>;
368 vactive = <1280>;
369 hfront-porch = <5>;
370 hback-porch = <5>;
371 hsync-len = <5>;
372 vfront-porch = <13>;
373 vback-porch = <1>;
374 vsync-len = <2>;
375 };
376 };
377
378 port {
379 dsi_in: endpoint {
380 remote-endpoint = <&dsi_out>;
381 };
382 };
383 };
384};
385
386&exynos_usbphy {
387 status = "okay";
388};
389
390&fimc_0 {
391 status = "okay";
392 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
393 <&clock CLK_SCLK_FIMC0>;
394 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
395 assigned-clock-rates = <0>, <176000000>;
396};
397
398&fimc_1 {
399 status = "okay";
400 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
401 <&clock CLK_SCLK_FIMC1>;
402 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
403 assigned-clock-rates = <0>, <176000000>;
404};
405
406&fimc_2 {
407 status = "okay";
408 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
409 <&clock CLK_SCLK_FIMC2>;
410 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
411 assigned-clock-rates = <0>, <176000000>;
412};
413
414&fimc_3 {
415 status = "okay";
416 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
417 <&clock CLK_SCLK_FIMC3>;
418 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
419 assigned-clock-rates = <0>, <176000000>;
420};
421
422&fimc_is {
423 pinctrl-0 = <&fimc_is_uart>;
424 pinctrl-names = "default";
425 status = "okay";
426
427 i2c1_isp: i2c-isp@12140000 {
428 pinctrl-0 = <&fimc_is_i2c1>;
429 pinctrl-names = "default";
430
431 s5k6a3@10 {
432 compatible = "samsung,s5k6a3";
433 reg = <0x10>;
434 svdda-supply = <&cam_io_reg>;
435 svddio-supply = <&ldo19_reg>;
436 afvdd-supply = <&ldo19_reg>;
437 clock-frequency = <24000000>;
438 /* CAM_B_CLKOUT */
439 clocks = <&camera 1>;
440 clock-names = "extclk";
441 samsung,camclk-out = <1>;
442 gpios = <&gpm1 6 0>;
443
444 port {
445 is_s5k6a3_ep: endpoint {
446 remote-endpoint = <&csis1_ep>;
447 data-lanes = <1>;
448 };
449 };
450 };
451 };
452};
453
454&fimc_lite_0 {
455 status = "okay";
456};
457
458&fimc_lite_1 {
459 status = "okay";
460};
461
462&fimd {
463 status = "okay";
464};
465
466&hsotg {
467 vusb_d-supply = <&ldo15_reg>;
468 vusb_a-supply = <&ldo12_reg>;
469 dr_mode = "peripheral";
470 status = "okay";
471};
472
473&i2c_0 {
474 samsung,i2c-sda-delay = <100>;
475 samsung,i2c-slave-addr = <0x10>;
476 samsung,i2c-max-bus-freq = <400000>;
477 pinctrl-0 = <&i2c0_bus>;
478 pinctrl-names = "default";
479 status = "okay";
480
481 s5c73m3@3c {
482 compatible = "samsung,s5c73m3";
483 reg = <0x3c>;
484 standby-gpios = <&gpm0 1 1>; /* ISP_STANDBY */
485 xshutdown-gpios = <&gpf1 3 1>; /* ISP_RESET */
486 vdd-int-supply = <&buck9_reg>;
487 vddio-cis-supply = <&ldo9_reg>;
488 vdda-supply = <&ldo17_reg>;
489 vddio-host-supply = <&ldo18_reg>;
490 vdd-af-supply = <&cam_af_reg>;
491 vdd-reg-supply = <&cam_io_reg>;
492 clock-frequency = <24000000>;
493 /* CAM_A_CLKOUT */
494 clocks = <&camera 0>;
495 clock-names = "cis_extclk";
496 port {
497 s5c73m3_ep: endpoint {
498 remote-endpoint = <&csis0_ep>;
499 data-lanes = <1 2 3 4>;
500 };
501 };
502 };
503};
504
505&i2c_3 {
506 samsung,i2c-sda-delay = <100>;
507 samsung,i2c-slave-addr = <0x10>;
508 samsung,i2c-max-bus-freq = <400000>;
509 pinctrl-0 = <&i2c3_bus>;
510 pinctrl-names = "default";
511 status = "okay";
512
513 mms114-touchscreen@48 {
514 compatible = "melfas,mms114";
515 reg = <0x48>;
516 interrupt-parent = <&gpm2>;
517 interrupts = <3 2>;
518 x-size = <720>;
519 y-size = <1280>;
520 avdd-supply = <&ldo23_reg>;
521 vdd-supply = <&ldo24_reg>;
522 };
523};
524
525&i2c_4 {
526 samsung,i2c-sda-delay = <100>;
527 samsung,i2c-slave-addr = <0x10>;
528 samsung,i2c-max-bus-freq = <100000>;
529 pinctrl-0 = <&i2c4_bus>;
530 pinctrl-names = "default";
531 status = "okay";
532
533 wm1811: wm1811@1a {
534 compatible = "wlf,wm1811";
535 reg = <0x1a>;
536 clocks = <&pmu_system_controller 0>;
537 clock-names = "MCLK1";
538 DCVDD-supply = <&ldo3_reg>;
539 DBVDD1-supply = <&ldo3_reg>;
540 wlf,ldo1ena = <&gpj0 4 0>;
541 };
542};
543
544&i2c_7 {
545 samsung,i2c-sda-delay = <100>;
546 samsung,i2c-slave-addr = <0x10>;
547 samsung,i2c-max-bus-freq = <100000>;
548 pinctrl-0 = <&i2c7_bus>;
549 pinctrl-names = "default";
550 status = "okay";
551
552 max77686: max77686_pmic@09 {
553 compatible = "maxim,max77686";
554 interrupt-parent = <&gpx0>;
555 interrupts = <7 0>;
556 reg = <0x09>;
557 #clock-cells = <1>;
558
559 voltage-regulators {
560 ldo1_reg: ldo1 {
561 regulator-compatible = "LDO1";
562 regulator-name = "VALIVE_1.0V_AP";
563 regulator-min-microvolt = <1000000>;
564 regulator-max-microvolt = <1000000>;
565 regulator-always-on;
566 };
567
568 ldo2_reg: ldo2 {
569 regulator-compatible = "LDO2";
570 regulator-name = "VM1M2_1.2V_AP";
571 regulator-min-microvolt = <1200000>;
572 regulator-max-microvolt = <1200000>;
573 regulator-always-on;
574 regulator-state-mem {
575 regulator-on-in-suspend;
576 };
577 };
578
579 ldo3_reg: ldo3 {
580 regulator-compatible = "LDO3";
581 regulator-name = "VCC_1.8V_AP";
582 regulator-min-microvolt = <1800000>;
583 regulator-max-microvolt = <1800000>;
584 regulator-always-on;
585 };
586
587 ldo4_reg: ldo4 {
588 regulator-compatible = "LDO4";
589 regulator-name = "VCC_2.8V_AP";
590 regulator-min-microvolt = <2800000>;
591 regulator-max-microvolt = <2800000>;
592 regulator-always-on;
593 };
594
595 ldo5_reg: ldo5 {
596 regulator-compatible = "LDO5";
597 regulator-name = "VCC_1.8V_IO";
598 regulator-min-microvolt = <1800000>;
599 regulator-max-microvolt = <1800000>;
600 regulator-always-on;
601 };
602
603 ldo6_reg: ldo6 {
604 regulator-compatible = "LDO6";
605 regulator-name = "VMPLL_1.0V_AP";
606 regulator-min-microvolt = <1000000>;
607 regulator-max-microvolt = <1000000>;
608 regulator-always-on;
609 regulator-state-mem {
610 regulator-on-in-suspend;
611 };
612 };
613
614 ldo7_reg: ldo7 {
615 regulator-compatible = "LDO7";
616 regulator-name = "VPLL_1.0V_AP";
617 regulator-min-microvolt = <1000000>;
618 regulator-max-microvolt = <1000000>;
619 regulator-always-on;
620 regulator-state-mem {
621 regulator-on-in-suspend;
622 };
623 };
624
625 ldo8_reg: ldo8 {
626 regulator-compatible = "LDO8";
627 regulator-name = "VMIPI_1.0V";
628 regulator-min-microvolt = <1000000>;
629 regulator-max-microvolt = <1000000>;
630 regulator-state-mem {
631 regulator-off-in-suspend;
632 };
633 };
634
635 ldo9_reg: ldo9 {
636 regulator-compatible = "LDO9";
637 regulator-name = "CAM_ISP_MIPI_1.2V";
638 regulator-min-microvolt = <1200000>;
639 regulator-max-microvolt = <1200000>;
640 };
641
642 ldo10_reg: ldo10 {
643 regulator-compatible = "LDO10";
644 regulator-name = "VMIPI_1.8V";
645 regulator-min-microvolt = <1800000>;
646 regulator-max-microvolt = <1800000>;
647 regulator-state-mem {
648 regulator-off-in-suspend;
649 };
650 };
651
652 ldo11_reg: ldo11 {
653 regulator-compatible = "LDO11";
654 regulator-name = "VABB1_1.95V";
655 regulator-min-microvolt = <1950000>;
656 regulator-max-microvolt = <1950000>;
657 regulator-always-on;
658 regulator-state-mem {
659 regulator-off-in-suspend;
660 };
661 };
662
663 ldo12_reg: ldo12 {
664 regulator-compatible = "LDO12";
665 regulator-name = "VUOTG_3.0V";
666 regulator-min-microvolt = <3000000>;
667 regulator-max-microvolt = <3000000>;
668 regulator-state-mem {
669 regulator-off-in-suspend;
670 };
671 };
672
673 ldo13_reg: ldo13 {
674 regulator-compatible = "LDO13";
675 regulator-name = "NFC_AVDD_1.8V";
676 regulator-min-microvolt = <1800000>;
677 regulator-max-microvolt = <1800000>;
678 };
679
680 ldo14_reg: ldo14 {
681 regulator-compatible = "LDO14";
682 regulator-name = "VABB2_1.95V";
683 regulator-min-microvolt = <1950000>;
684 regulator-max-microvolt = <1950000>;
685 regulator-always-on;
686 regulator-state-mem {
687 regulator-off-in-suspend;
688 };
689 };
690
691 ldo15_reg: ldo15 {
692 regulator-compatible = "LDO15";
693 regulator-name = "VHSIC_1.0V";
694 regulator-min-microvolt = <1000000>;
695 regulator-max-microvolt = <1000000>;
696 regulator-state-mem {
697 regulator-on-in-suspend;
698 };
699 };
700
701 ldo16_reg: ldo16 {
702 regulator-compatible = "LDO16";
703 regulator-name = "VHSIC_1.8V";
704 regulator-min-microvolt = <1800000>;
705 regulator-max-microvolt = <1800000>;
706 regulator-state-mem {
707 regulator-on-in-suspend;
708 };
709 };
710
711 ldo17_reg: ldo17 {
712 regulator-compatible = "LDO17";
713 regulator-name = "CAM_SENSOR_CORE_1.2V";
714 regulator-min-microvolt = <1200000>;
715 regulator-max-microvolt = <1200000>;
716 };
717
718 ldo18_reg: ldo18 {
719 regulator-compatible = "LDO18";
720 regulator-name = "CAM_ISP_SEN_IO_1.8V";
721 regulator-min-microvolt = <1800000>;
722 regulator-max-microvolt = <1800000>;
723 };
724
725 ldo19_reg: ldo19 {
726 regulator-compatible = "LDO19";
727 regulator-name = "VT_CAM_1.8V";
728 regulator-min-microvolt = <1800000>;
729 regulator-max-microvolt = <1800000>;
730 };
731
732 ldo20_reg: ldo20 {
733 regulator-compatible = "LDO20";
734 regulator-name = "VDDQ_PRE_1.8V";
735 regulator-min-microvolt = <1800000>;
736 regulator-max-microvolt = <1800000>;
737 };
738
739 ldo21_reg: ldo21 {
740 regulator-compatible = "LDO21";
741 regulator-name = "VTF_2.8V";
742 regulator-min-microvolt = <2800000>;
743 regulator-max-microvolt = <2800000>;
744 maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>;
745 };
746
747 ldo22_reg: ldo22 {
748 regulator-compatible = "LDO22";
749 regulator-name = "VMEM_VDD_2.8V";
750 regulator-min-microvolt = <2800000>;
751 regulator-max-microvolt = <2800000>;
752 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
753 };
754
755 ldo23_reg: ldo23 {
756 regulator-compatible = "LDO23";
757 regulator-name = "TSP_AVDD_3.3V";
758 regulator-min-microvolt = <3300000>;
759 regulator-max-microvolt = <3300000>;
760 };
761
762 ldo24_reg: ldo24 {
763 regulator-compatible = "LDO24";
764 regulator-name = "TSP_VDD_1.8V";
765 regulator-min-microvolt = <1800000>;
766 regulator-max-microvolt = <1800000>;
767 };
768
769 ldo25_reg: ldo25 {
770 regulator-compatible = "LDO25";
771 regulator-name = "LCD_VCC_3.3V";
772 regulator-min-microvolt = <2800000>;
773 regulator-max-microvolt = <2800000>;
774 };
775
776 ldo26_reg: ldo26 {
777 regulator-compatible = "LDO26";
778 regulator-name = "MOTOR_VCC_3.0V";
779 regulator-min-microvolt = <3000000>;
780 regulator-max-microvolt = <3000000>;
781 };
782
783 buck1_reg: buck1 {
784 regulator-compatible = "BUCK1";
785 regulator-name = "vdd_mif";
786 regulator-min-microvolt = <850000>;
787 regulator-max-microvolt = <1100000>;
788 regulator-always-on;
789 regulator-boot-on;
790 regulator-state-mem {
791 regulator-off-in-suspend;
792 };
793 };
794
795 buck2_reg: buck2 {
796 regulator-compatible = "BUCK2";
797 regulator-name = "vdd_arm";
798 regulator-min-microvolt = <850000>;
799 regulator-max-microvolt = <1500000>;
800 regulator-always-on;
801 regulator-boot-on;
802 regulator-state-mem {
803 regulator-on-in-suspend;
804 };
805 };
806
807 buck3_reg: buck3 {
808 regulator-compatible = "BUCK3";
809 regulator-name = "vdd_int";
810 regulator-min-microvolt = <850000>;
811 regulator-max-microvolt = <1150000>;
812 regulator-always-on;
813 regulator-boot-on;
814 regulator-state-mem {
815 regulator-off-in-suspend;
816 };
817 };
818
819 buck4_reg: buck4 {
820 regulator-compatible = "BUCK4";
821 regulator-name = "vdd_g3d";
822 regulator-min-microvolt = <850000>;
823 regulator-max-microvolt = <1150000>;
824 regulator-boot-on;
825 regulator-state-mem {
826 regulator-off-in-suspend;
827 };
828 };
829
830 buck5_reg: buck5 {
831 regulator-compatible = "BUCK5";
832 regulator-name = "VMEM_1.2V_AP";
833 regulator-min-microvolt = <1200000>;
834 regulator-max-microvolt = <1200000>;
835 regulator-always-on;
836 };
837
838 buck6_reg: buck6 {
839 regulator-compatible = "BUCK6";
840 regulator-name = "VCC_SUB_1.35V";
841 regulator-min-microvolt = <1350000>;
842 regulator-max-microvolt = <1350000>;
843 regulator-always-on;
844 };
845
846 buck7_reg: buck7 {
847 regulator-compatible = "BUCK7";
848 regulator-name = "VCC_SUB_2.0V";
849 regulator-min-microvolt = <2000000>;
850 regulator-max-microvolt = <2000000>;
851 regulator-always-on;
852 };
853
854 buck8_reg: buck8 {
855 regulator-compatible = "BUCK8";
856 regulator-name = "VMEM_VDDF_3.0V";
857 regulator-min-microvolt = <2850000>;
858 regulator-max-microvolt = <2850000>;
859 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
860 };
861
862 buck9_reg: buck9 {
863 regulator-compatible = "BUCK9";
864 regulator-name = "CAM_ISP_CORE_1.2V";
865 regulator-min-microvolt = <1000000>;
866 regulator-max-microvolt = <1200000>;
867 maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
868 };
869 };
870 };
871};
872
873&i2s0 {
874 pinctrl-0 = <&i2s0_bus>;
875 pinctrl-names = "default";
876 status = "okay";
877};
878
879&mshc_0 {
880 num-slots = <1>;
881 broken-cd;
882 non-removable;
883 card-detect-delay = <200>;
884 vmmc-supply = <&ldo22_reg>;
885 clock-frequency = <400000000>;
886 samsung,dw-mshc-ciu-div = <0>;
887 samsung,dw-mshc-sdr-timing = <2 3>;
888 samsung,dw-mshc-ddr-timing = <1 2>;
889 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
890 pinctrl-names = "default";
891 status = "okay";
892 bus-width = <8>;
893 cap-mmc-highspeed;
894};
895
440e5aef
IS		 896&pmu_system_controller {
897 assigned-clocks = <&pmu_system_controller 0>;
898 assigned-clock-parents = <&clock CLK_XUSBXTI>;
899};
900
7808cae3
CC		 901&ppmu_dmc0 {
902 status = "okay";
903
904 events {
905 ppmu_dmc0_3: ppmu-event3-dmc0 {
906 event-name = "ppmu-event3-dmc0";
907 };
908 };
909};
910
911&ppmu_dmc1 {
912 status = "okay";
913
914 events {
915 ppmu_dmc1_3: ppmu-event3-dmc1 {
916 event-name = "ppmu-event3-dmc1";
917 };
918 };
919};
920
921&ppmu_leftbus {
922 status = "okay";
923
924 events {
925 ppmu_leftbus_3: ppmu-event3-leftbus {
926 event-name = "ppmu-event3-leftbus";
927 };
928 };
929};
930
931&ppmu_rightbus {
932 status = "okay";
933
934 events {
935 ppmu_rightbus_3: ppmu-event3-rightbus {
936 event-name = "ppmu-event3-rightbus";
937 };
938 };
939};
940
09918a98
TF		 941&pinctrl_0 {
942 pinctrl-names = "default";
943 pinctrl-0 = <&sleep0>;
944
945 sleep0: sleep-states {
946 PIN_SLP(gpa0-0, INPUT, NONE);
947 PIN_SLP(gpa0-1, OUT0, NONE);
948 PIN_SLP(gpa0-2, INPUT, NONE);
949 PIN_SLP(gpa0-3, INPUT, UP);
950 PIN_SLP(gpa0-4, INPUT, NONE);
951 PIN_SLP(gpa0-5, INPUT, DOWN);
952 PIN_SLP(gpa0-6, INPUT, DOWN);
953 PIN_SLP(gpa0-7, INPUT, UP);
954
955 PIN_SLP(gpa1-0, INPUT, DOWN);
956 PIN_SLP(gpa1-1, INPUT, DOWN);
957 PIN_SLP(gpa1-2, INPUT, DOWN);
958 PIN_SLP(gpa1-3, INPUT, DOWN);
959 PIN_SLP(gpa1-4, INPUT, DOWN);
960 PIN_SLP(gpa1-5, INPUT, DOWN);
961
962 PIN_SLP(gpb-0, INPUT, NONE);
963 PIN_SLP(gpb-1, INPUT, NONE);
964 PIN_SLP(gpb-2, INPUT, NONE);
965 PIN_SLP(gpb-3, INPUT, NONE);
966 PIN_SLP(gpb-4, INPUT, DOWN);
967 PIN_SLP(gpb-5, INPUT, UP);
968 PIN_SLP(gpb-6, INPUT, DOWN);
969 PIN_SLP(gpb-7, INPUT, DOWN);
970
971 PIN_SLP(gpc0-0, INPUT, DOWN);
972 PIN_SLP(gpc0-1, INPUT, DOWN);
973 PIN_SLP(gpc0-2, INPUT, DOWN);
974 PIN_SLP(gpc0-3, INPUT, DOWN);
975 PIN_SLP(gpc0-4, INPUT, DOWN);
976
977 PIN_SLP(gpc1-0, INPUT, NONE);
978 PIN_SLP(gpc1-1, PREV, NONE);
979 PIN_SLP(gpc1-2, INPUT, NONE);
980 PIN_SLP(gpc1-3, INPUT, NONE);
981 PIN_SLP(gpc1-4, INPUT, NONE);
982
983 PIN_SLP(gpd0-0, INPUT, DOWN);
984 PIN_SLP(gpd0-1, INPUT, DOWN);
985 PIN_SLP(gpd0-2, INPUT, NONE);
986 PIN_SLP(gpd0-3, INPUT, NONE);
987
988 PIN_SLP(gpd1-0, INPUT, DOWN);
989 PIN_SLP(gpd1-1, INPUT, DOWN);
990 PIN_SLP(gpd1-2, INPUT, NONE);
991 PIN_SLP(gpd1-3, INPUT, NONE);
992
993 PIN_SLP(gpf0-0, INPUT, NONE);
994 PIN_SLP(gpf0-1, INPUT, NONE);
995 PIN_SLP(gpf0-2, INPUT, DOWN);
996 PIN_SLP(gpf0-3, INPUT, DOWN);
997 PIN_SLP(gpf0-4, INPUT, NONE);
998 PIN_SLP(gpf0-5, INPUT, DOWN);
999 PIN_SLP(gpf0-6, INPUT, NONE);
1000 PIN_SLP(gpf0-7, INPUT, DOWN);
1001
1002 PIN_SLP(gpf1-0, INPUT, DOWN);
1003 PIN_SLP(gpf1-1, INPUT, DOWN);
1004 PIN_SLP(gpf1-2, INPUT, DOWN);
1005 PIN_SLP(gpf1-3, INPUT, DOWN);
1006 PIN_SLP(gpf1-4, INPUT, NONE);
1007 PIN_SLP(gpf1-5, INPUT, NONE);
1008 PIN_SLP(gpf1-6, INPUT, DOWN);
1009 PIN_SLP(gpf1-7, PREV, NONE);
1010
1011 PIN_SLP(gpf2-0, PREV, NONE);
1012 PIN_SLP(gpf2-1, INPUT, DOWN);
1013 PIN_SLP(gpf2-2, INPUT, DOWN);
1014 PIN_SLP(gpf2-3, INPUT, DOWN);
1015 PIN_SLP(gpf2-4, INPUT, DOWN);
1016 PIN_SLP(gpf2-5, INPUT, DOWN);
1017 PIN_SLP(gpf2-6, INPUT, NONE);
1018 PIN_SLP(gpf2-7, INPUT, NONE);
1019
1020 PIN_SLP(gpf3-0, INPUT, NONE);
1021 PIN_SLP(gpf3-1, PREV, NONE);
1022 PIN_SLP(gpf3-2, PREV, NONE);
1023 PIN_SLP(gpf3-3, PREV, NONE);
1024 PIN_SLP(gpf3-4, OUT1, NONE);
1025 PIN_SLP(gpf3-5, INPUT, DOWN);
1026
1027 PIN_SLP(gpj0-0, PREV, NONE);
1028 PIN_SLP(gpj0-1, PREV, NONE);
1029 PIN_SLP(gpj0-2, PREV, NONE);
1030 PIN_SLP(gpj0-3, INPUT, DOWN);
1031 PIN_SLP(gpj0-4, PREV, NONE);
1032 PIN_SLP(gpj0-5, PREV, NONE);
1033 PIN_SLP(gpj0-6, INPUT, DOWN);
1034 PIN_SLP(gpj0-7, INPUT, DOWN);
1035
1036 PIN_SLP(gpj1-0, INPUT, DOWN);
1037 PIN_SLP(gpj1-1, PREV, NONE);
1038 PIN_SLP(gpj1-2, PREV, NONE);
1039 PIN_SLP(gpj1-3, INPUT, DOWN);
1040 PIN_SLP(gpj1-4, INPUT, DOWN);
1041 };
1042};
1043
1044&pinctrl_1 {
1045 pinctrl-names = "default";
1046 pinctrl-0 = <&sleep1>;
1047
1048 sleep1: sleep-states {
1049 PIN_SLP(gpk0-0, PREV, NONE);
1050 PIN_SLP(gpk0-1, PREV, NONE);
1051 PIN_SLP(gpk0-2, OUT0, NONE);
1052 PIN_SLP(gpk0-3, PREV, NONE);
1053 PIN_SLP(gpk0-4, PREV, NONE);
1054 PIN_SLP(gpk0-5, PREV, NONE);
1055 PIN_SLP(gpk0-6, PREV, NONE);
1056
1057 PIN_SLP(gpk1-0, INPUT, DOWN);
1058 PIN_SLP(gpk1-1, INPUT, DOWN);
1059 PIN_SLP(gpk1-2, INPUT, DOWN);
1060 PIN_SLP(gpk1-3, PREV, NONE);
1061 PIN_SLP(gpk1-4, PREV, NONE);
1062 PIN_SLP(gpk1-5, PREV, NONE);
1063 PIN_SLP(gpk1-6, PREV, NONE);
1064
1065 PIN_SLP(gpk2-0, INPUT, DOWN);
1066 PIN_SLP(gpk2-1, INPUT, DOWN);
1067 PIN_SLP(gpk2-2, INPUT, DOWN);
1068 PIN_SLP(gpk2-3, INPUT, DOWN);
1069 PIN_SLP(gpk2-4, INPUT, DOWN);
1070 PIN_SLP(gpk2-5, INPUT, DOWN);
1071 PIN_SLP(gpk2-6, INPUT, DOWN);
1072
1073 PIN_SLP(gpk3-0, OUT0, NONE);
1074 PIN_SLP(gpk3-1, INPUT, NONE);
1075 PIN_SLP(gpk3-2, INPUT, DOWN);
1076 PIN_SLP(gpk3-3, INPUT, NONE);
1077 PIN_SLP(gpk3-4, INPUT, NONE);
1078 PIN_SLP(gpk3-5, INPUT, NONE);
1079 PIN_SLP(gpk3-6, INPUT, NONE);
1080
1081 PIN_SLP(gpl0-0, INPUT, DOWN);
1082 PIN_SLP(gpl0-1, INPUT, DOWN);
1083 PIN_SLP(gpl0-2, INPUT, DOWN);
1084 PIN_SLP(gpl0-3, INPUT, DOWN);
1085 PIN_SLP(gpl0-4, PREV, NONE);
1086 PIN_SLP(gpl0-6, PREV, NONE);
1087
1088 PIN_SLP(gpl1-0, INPUT, DOWN);
1089 PIN_SLP(gpl1-1, INPUT, DOWN);
1090 PIN_SLP(gpl2-0, INPUT, DOWN);
1091 PIN_SLP(gpl2-1, INPUT, DOWN);
1092 PIN_SLP(gpl2-2, INPUT, DOWN);
1093 PIN_SLP(gpl2-3, INPUT, DOWN);
1094 PIN_SLP(gpl2-4, INPUT, DOWN);
1095 PIN_SLP(gpl2-5, INPUT, DOWN);
1096 PIN_SLP(gpl2-6, PREV, NONE);
1097 PIN_SLP(gpl2-7, INPUT, DOWN);
1098
1099 PIN_SLP(gpm0-0, INPUT, DOWN);
1100 PIN_SLP(gpm0-1, INPUT, DOWN);
1101 PIN_SLP(gpm0-2, INPUT, DOWN);
1102 PIN_SLP(gpm0-3, INPUT, DOWN);
1103 PIN_SLP(gpm0-4, INPUT, DOWN);
1104 PIN_SLP(gpm0-5, INPUT, DOWN);
1105 PIN_SLP(gpm0-6, INPUT, DOWN);
1106 PIN_SLP(gpm0-7, INPUT, DOWN);
1107
1108 PIN_SLP(gpm1-0, INPUT, DOWN);
1109 PIN_SLP(gpm1-1, INPUT, DOWN);
1110 PIN_SLP(gpm1-2, INPUT, NONE);
1111 PIN_SLP(gpm1-3, INPUT, NONE);
1112 PIN_SLP(gpm1-4, INPUT, NONE);
1113 PIN_SLP(gpm1-5, INPUT, NONE);
1114 PIN_SLP(gpm1-6, INPUT, DOWN);
1115
1116 PIN_SLP(gpm2-0, INPUT, NONE);
1117 PIN_SLP(gpm2-1, INPUT, NONE);
1118 PIN_SLP(gpm2-2, INPUT, DOWN);
1119 PIN_SLP(gpm2-3, INPUT, DOWN);
1120 PIN_SLP(gpm2-4, INPUT, DOWN);
1121
1122 PIN_SLP(gpm3-0, PREV, NONE);
1123 PIN_SLP(gpm3-1, PREV, NONE);
1124 PIN_SLP(gpm3-2, PREV, NONE);
1125 PIN_SLP(gpm3-3, OUT1, NONE);
1126 PIN_SLP(gpm3-4, INPUT, DOWN);
1127 PIN_SLP(gpm3-5, INPUT, DOWN);
1128 PIN_SLP(gpm3-6, INPUT, DOWN);
1129 PIN_SLP(gpm3-7, INPUT, DOWN);
1130
1131 PIN_SLP(gpm4-0, INPUT, DOWN);
1132 PIN_SLP(gpm4-1, INPUT, DOWN);
1133 PIN_SLP(gpm4-2, INPUT, DOWN);
1134 PIN_SLP(gpm4-3, INPUT, DOWN);
1135 PIN_SLP(gpm4-4, INPUT, DOWN);
1136 PIN_SLP(gpm4-5, INPUT, DOWN);
1137 PIN_SLP(gpm4-6, INPUT, DOWN);
1138 PIN_SLP(gpm4-7, INPUT, DOWN);
1139
1140 PIN_SLP(gpy0-0, INPUT, DOWN);
1141 PIN_SLP(gpy0-1, INPUT, DOWN);
1142 PIN_SLP(gpy0-2, INPUT, DOWN);
1143 PIN_SLP(gpy0-3, INPUT, DOWN);
1144 PIN_SLP(gpy0-4, INPUT, DOWN);
1145 PIN_SLP(gpy0-5, INPUT, DOWN);
1146
1147 PIN_SLP(gpy1-0, INPUT, DOWN);
1148 PIN_SLP(gpy1-1, INPUT, DOWN);
1149 PIN_SLP(gpy1-2, INPUT, DOWN);
1150 PIN_SLP(gpy1-3, INPUT, DOWN);
1151
1152 PIN_SLP(gpy2-0, PREV, NONE);
1153 PIN_SLP(gpy2-1, INPUT, DOWN);
1154 PIN_SLP(gpy2-2, INPUT, NONE);
1155 PIN_SLP(gpy2-3, INPUT, NONE);
1156 PIN_SLP(gpy2-4, INPUT, NONE);
1157 PIN_SLP(gpy2-5, INPUT, NONE);
1158
1159 PIN_SLP(gpy3-0, INPUT, DOWN);
1160 PIN_SLP(gpy3-1, INPUT, DOWN);
1161 PIN_SLP(gpy3-2, INPUT, DOWN);
1162 PIN_SLP(gpy3-3, INPUT, DOWN);
1163 PIN_SLP(gpy3-4, INPUT, DOWN);
1164 PIN_SLP(gpy3-5, INPUT, DOWN);
1165 PIN_SLP(gpy3-6, INPUT, DOWN);
1166 PIN_SLP(gpy3-7, INPUT, DOWN);
1167
1168 PIN_SLP(gpy4-0, INPUT, DOWN);
1169 PIN_SLP(gpy4-1, INPUT, DOWN);
1170 PIN_SLP(gpy4-2, INPUT, DOWN);
1171 PIN_SLP(gpy4-3, INPUT, DOWN);
1172 PIN_SLP(gpy4-4, INPUT, DOWN);
1173 PIN_SLP(gpy4-5, INPUT, DOWN);
1174 PIN_SLP(gpy4-6, INPUT, DOWN);
1175 PIN_SLP(gpy4-7, INPUT, DOWN);
1176
1177 PIN_SLP(gpy5-0, INPUT, DOWN);
1178 PIN_SLP(gpy5-1, INPUT, DOWN);
1179 PIN_SLP(gpy5-2, INPUT, DOWN);
1180 PIN_SLP(gpy5-3, INPUT, DOWN);
1181 PIN_SLP(gpy5-4, INPUT, DOWN);
1182 PIN_SLP(gpy5-5, INPUT, DOWN);
1183 PIN_SLP(gpy5-6, INPUT, DOWN);
1184 PIN_SLP(gpy5-7, INPUT, DOWN);
1185
1186 PIN_SLP(gpy6-0, INPUT, DOWN);
1187 PIN_SLP(gpy6-1, INPUT, DOWN);
1188 PIN_SLP(gpy6-2, INPUT, DOWN);
1189 PIN_SLP(gpy6-3, INPUT, DOWN);
1190 PIN_SLP(gpy6-4, INPUT, DOWN);
1191 PIN_SLP(gpy6-5, INPUT, DOWN);
1192 PIN_SLP(gpy6-6, INPUT, DOWN);
1193 PIN_SLP(gpy6-7, INPUT, DOWN);
1194 };
1195};
1196
1197&pinctrl_2 {
1198 pinctrl-names = "default";
1199 pinctrl-0 = <&sleep2>;
1200
1201 sleep2: sleep-states {
1202 PIN_SLP(gpz-0, INPUT, DOWN);
1203 PIN_SLP(gpz-1, INPUT, DOWN);
1204 PIN_SLP(gpz-2, INPUT, DOWN);
1205 PIN_SLP(gpz-3, INPUT, DOWN);
1206 PIN_SLP(gpz-4, INPUT, DOWN);
1207 PIN_SLP(gpz-5, INPUT, DOWN);
1208 PIN_SLP(gpz-6, INPUT, DOWN);
1209 };
1210};
1211
1212&pinctrl_3 {
1213 pinctrl-names = "default";
1214 pinctrl-0 = <&sleep3>;
1215
1216 sleep3: sleep-states {
1217 PIN_SLP(gpv0-0, INPUT, DOWN);
1218 PIN_SLP(gpv0-1, INPUT, DOWN);
1219 PIN_SLP(gpv0-2, INPUT, DOWN);
1220 PIN_SLP(gpv0-3, INPUT, DOWN);
1221 PIN_SLP(gpv0-4, INPUT, DOWN);
1222 PIN_SLP(gpv0-5, INPUT, DOWN);
1223 PIN_SLP(gpv0-6, INPUT, DOWN);
1224 PIN_SLP(gpv0-7, INPUT, DOWN);
1225
1226 PIN_SLP(gpv1-0, INPUT, DOWN);
1227 PIN_SLP(gpv1-1, INPUT, DOWN);
1228 PIN_SLP(gpv1-2, INPUT, DOWN);
1229 PIN_SLP(gpv1-3, INPUT, DOWN);
1230 PIN_SLP(gpv1-4, INPUT, DOWN);
1231 PIN_SLP(gpv1-5, INPUT, DOWN);
1232 PIN_SLP(gpv1-6, INPUT, DOWN);
1233 PIN_SLP(gpv1-7, INPUT, DOWN);
1234
1235 PIN_SLP(gpv2-0, INPUT, DOWN);
1236 PIN_SLP(gpv2-1, INPUT, DOWN);
1237 PIN_SLP(gpv2-2, INPUT, DOWN);
1238 PIN_SLP(gpv2-3, INPUT, DOWN);
1239 PIN_SLP(gpv2-4, INPUT, DOWN);
1240 PIN_SLP(gpv2-5, INPUT, DOWN);
1241 PIN_SLP(gpv2-6, INPUT, DOWN);
1242 PIN_SLP(gpv2-7, INPUT, DOWN);
1243
1244 PIN_SLP(gpv3-0, INPUT, DOWN);
1245 PIN_SLP(gpv3-1, INPUT, DOWN);
1246 PIN_SLP(gpv3-2, INPUT, DOWN);
1247 PIN_SLP(gpv3-3, INPUT, DOWN);
1248 PIN_SLP(gpv3-4, INPUT, DOWN);
1249 PIN_SLP(gpv3-5, INPUT, DOWN);
1250 PIN_SLP(gpv3-6, INPUT, DOWN);
1251 PIN_SLP(gpv3-7, INPUT, DOWN);
1252
1253 PIN_SLP(gpv4-0, INPUT, DOWN);
1254 };
1255};
ce9940a9 1256
1fe9a942
KK		 1257&pwm {
1258 pinctrl-0 = <&pwm0_out>;
1259 pinctrl-names = "default";
1260 samsung,pwm-outputs = <0>;
1261 status = "okay";
1262};
1263
ce9940a9
KK		 1264&rtc {
1265 status = "okay";
1266 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
1267 clock-names = "rtc", "rtc_src";
1268};
1fe9a942
KK		 1269
1270&sdhci_2 {
1271 bus-width = <4>;
1272 cd-gpios = <&gpx3 4 0>;
1273 cd-inverted;
1274 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
1275 pinctrl-names = "default";
1276 vmmc-supply = <&ldo21_reg>;
1277 status = "okay";
1278};
1279
1280&serial_0 {
1281 status = "okay";
1282};
1283
1284&serial_1 {
1285 status = "okay";
1286};
1287
1288&serial_2 {
1289 status = "okay";
1290};
1291
1292&serial_3 {
1293 status = "okay";
1294};
1295
1296&spi_1 {
1297 pinctrl-names = "default";
1298 pinctrl-0 = <&spi1_bus>;
1299 cs-gpios = <&gpb 5 0>;
1300 status = "okay";
1301
1302 s5c73m3_spi: s5c73m3 {
1303 compatible = "samsung,s5c73m3";
1304 spi-max-frequency = <50000000>;
1305 reg = <0>;
1306 controller-data {
1307 samsung,spi-feedback-delay = <2>;
1308 };
1309 };
1310};
1311
1312&tmu {
1313 vtmu-supply = <&ldo10_reg>;
1314 status = "okay";
1315};
Linux 6.x block layer and io_uring tree(s)