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15dfdfad TF |
1 | /* |
2 | * Samsung's Exynos4412 based Trats 2 board device tree source | |
3 | * | |
4 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Device tree source file for Samsung's Trats 2 board which is based on | |
8 | * Samsung's Exynos4412 SoC. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | /dts-v1/; | |
16 | #include "exynos4412.dtsi" | |
4a80467a | 17 | #include "exynos4412-ppmu-common.dtsi" |
7eec1266 | 18 | #include <dt-bindings/gpio/gpio.h> |
e8614292 | 19 | #include <dt-bindings/interrupt-controller/irq.h> |
ce9940a9 | 20 | #include <dt-bindings/clock/maxim,max77686.h> |
15dfdfad TF |
21 | |
22 | / { | |
23 | model = "Samsung Trats 2 based on Exynos4412"; | |
8bdb31b4 | 24 | compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4"; |
15dfdfad | 25 | |
9f1eaef2 | 26 | aliases { |
6af2ba90 | 27 | i2c9 = &i2c_ak8975; |
85cb4e0b | 28 | i2c10 = &i2c_cm36651; |
7eec1266 | 29 | i2c11 = &i2c_max77693; |
e8614292 | 30 | i2c12 = &i2c_max77693_fuel; |
9f1eaef2 JA |
31 | }; |
32 | ||
824e4133 | 33 | memory@40000000 { |
1354835a | 34 | device_type = "memory"; |
15dfdfad TF |
35 | reg = <0x40000000 0x40000000>; |
36 | }; | |
37 | ||
38 | chosen { | |
39 | bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; | |
62d38099 | 40 | stdout-path = &serial_2; |
15dfdfad TF |
41 | }; |
42 | ||
43 | firmware@0204F000 { | |
44 | compatible = "samsung,secure-firmware"; | |
45 | reg = <0x0204F000 0x1000>; | |
46 | }; | |
47 | ||
48 | fixed-rate-clocks { | |
49 | xxti { | |
50 | compatible = "samsung,clock-xxti", "fixed-clock"; | |
51 | clock-frequency = <0>; | |
52 | }; | |
53 | ||
54 | xusbxti { | |
55 | compatible = "samsung,clock-xusbxti", "fixed-clock"; | |
56 | clock-frequency = <24000000>; | |
57 | }; | |
58 | }; | |
59 | ||
60 | regulators { | |
61 | compatible = "simple-bus"; | |
62 | #address-cells = <1>; | |
63 | #size-cells = <0>; | |
64 | ||
b4fec647 SN |
65 | cam_io_reg: voltage-regulator-1 { |
66 | compatible = "regulator-fixed"; | |
67 | regulator-name = "CAM_SENSOR_A"; | |
68 | regulator-min-microvolt = <2800000>; | |
69 | regulator-max-microvolt = <2800000>; | |
c10d3290 | 70 | gpio = <&gpm0 2 GPIO_ACTIVE_HIGH>; |
b4fec647 SN |
71 | enable-active-high; |
72 | }; | |
73 | ||
420ae845 AH |
74 | lcd_vdd3_reg: voltage-regulator-2 { |
75 | compatible = "regulator-fixed"; | |
76 | regulator-name = "LCD_VDD_2.2V"; | |
77 | regulator-min-microvolt = <2200000>; | |
78 | regulator-max-microvolt = <2200000>; | |
c10d3290 | 79 | gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>; |
420ae845 AH |
80 | enable-active-high; |
81 | }; | |
82 | ||
4cb37864 SN |
83 | cam_af_reg: voltage-regulator-3 { |
84 | compatible = "regulator-fixed"; | |
85 | regulator-name = "CAM_AF"; | |
86 | regulator-min-microvolt = <2800000>; | |
87 | regulator-max-microvolt = <2800000>; | |
c10d3290 | 88 | gpio = <&gpm0 4 GPIO_ACTIVE_HIGH>; |
4cb37864 SN |
89 | enable-active-high; |
90 | }; | |
91 | ||
85cb4e0b BS |
92 | ps_als_reg: voltage-regulator-5 { |
93 | compatible = "regulator-fixed"; | |
94 | regulator-name = "LED_A_3.0V"; | |
95 | regulator-min-microvolt = <3000000>; | |
96 | regulator-max-microvolt = <3000000>; | |
c10d3290 | 97 | gpio = <&gpj0 5 GPIO_ACTIVE_HIGH>; |
85cb4e0b BS |
98 | enable-active-high; |
99 | }; | |
15dfdfad TF |
100 | }; |
101 | ||
102 | gpio-keys { | |
103 | compatible = "gpio-keys"; | |
104 | ||
105 | key-down { | |
c10d3290 | 106 | gpios = <&gpx3 3 GPIO_ACTIVE_LOW>; |
15dfdfad TF |
107 | linux,code = <114>; |
108 | label = "volume down"; | |
109 | debounce-interval = <10>; | |
110 | }; | |
111 | ||
112 | key-up { | |
c10d3290 | 113 | gpios = <&gpx2 2 GPIO_ACTIVE_LOW>; |
15dfdfad TF |
114 | linux,code = <115>; |
115 | label = "volume up"; | |
116 | debounce-interval = <10>; | |
117 | }; | |
118 | ||
119 | key-power { | |
c10d3290 | 120 | gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; |
15dfdfad TF |
121 | linux,code = <116>; |
122 | label = "power"; | |
123 | debounce-interval = <10>; | |
36a0282a | 124 | wakeup-source; |
15dfdfad | 125 | }; |
172ff6c6 BS |
126 | |
127 | key-ok { | |
c10d3290 | 128 | gpios = <&gpx0 1 GPIO_ACTIVE_LOW>; |
172ff6c6 BS |
129 | linux,code = <139>; |
130 | label = "ok"; | |
131 | debounce-inteval = <10>; | |
36a0282a | 132 | wakeup-source; |
172ff6c6 | 133 | }; |
15dfdfad TF |
134 | }; |
135 | ||
7eec1266 KK |
136 | i2c_max77693: i2c-gpio-1 { |
137 | compatible = "i2c-gpio"; | |
138 | gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>; | |
139 | i2c-gpio,delay-us = <2>; | |
140 | #address-cells = <1>; | |
141 | #size-cells = <0>; | |
142 | status = "okay"; | |
143 | ||
144 | max77693@66 { | |
145 | compatible = "maxim,max77693"; | |
146 | interrupt-parent = <&gpx1>; | |
147 | interrupts = <5 2>; | |
148 | reg = <0x66>; | |
149 | ||
150 | regulators { | |
26ee29a6 | 151 | esafeout1_reg: ESAFEOUT1 { |
7eec1266 KK |
152 | regulator-name = "ESAFEOUT1"; |
153 | }; | |
26ee29a6 | 154 | esafeout2_reg: ESAFEOUT2 { |
7eec1266 KK |
155 | regulator-name = "ESAFEOUT2"; |
156 | }; | |
26ee29a6 | 157 | charger_reg: CHARGER { |
7eec1266 KK |
158 | regulator-name = "CHARGER"; |
159 | regulator-min-microamp = <60000>; | |
160 | regulator-max-microamp = <2580000>; | |
161 | }; | |
162 | }; | |
d9c68089 JK |
163 | |
164 | max77693_haptic { | |
165 | compatible = "maxim,max77693-haptic"; | |
166 | haptic-supply = <&ldo26_reg>; | |
167 | pwms = <&pwm 0 38022 0>; | |
168 | }; | |
043ef148 KK |
169 | |
170 | charger { | |
171 | compatible = "maxim,max77693-charger"; | |
172 | ||
173 | maxim,constant-microvolt = <4350000>; | |
174 | maxim,min-system-microvolt = <3600000>; | |
175 | maxim,thermal-regulation-celsius = <100>; | |
176 | maxim,battery-overcurrent-microamp = <3500000>; | |
177 | maxim,charge-input-threshold-microvolt = <4300000>; | |
178 | }; | |
7eec1266 KK |
179 | }; |
180 | }; | |
181 | ||
e8614292 KK |
182 | i2c_max77693_fuel: i2c-gpio-3 { |
183 | compatible = "i2c-gpio"; | |
184 | gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>; | |
185 | i2c-gpio,delay-us = <2>; | |
186 | #address-cells = <1>; | |
187 | #size-cells = <0>; | |
188 | status = "okay"; | |
189 | ||
190 | max77693-fuel-gauge@36 { | |
191 | compatible = "maxim,max17047"; | |
192 | interrupt-parent = <&gpx2>; | |
193 | interrupts = <3 IRQ_TYPE_EDGE_FALLING>; | |
194 | reg = <0x36>; | |
82449f23 KK |
195 | |
196 | maxim,over-heat-temp = <700>; | |
197 | maxim,over-volt = <4500>; | |
7eec1266 KK |
198 | }; |
199 | }; | |
200 | ||
9f1eaef2 JA |
201 | i2c_ak8975: i2c-gpio-0 { |
202 | compatible = "i2c-gpio"; | |
c10d3290 | 203 | gpios = <&gpy2 4 GPIO_ACTIVE_HIGH>, <&gpy2 5 GPIO_ACTIVE_HIGH>; |
9f1eaef2 JA |
204 | i2c-gpio,delay-us = <2>; |
205 | #address-cells = <1>; | |
206 | #size-cells = <0>; | |
207 | status = "okay"; | |
208 | ||
209 | ak8975@0c { | |
30cc798b | 210 | compatible = "asahi-kasei,ak8975"; |
9f1eaef2 | 211 | reg = <0x0c>; |
c10d3290 | 212 | gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>; |
9f1eaef2 JA |
213 | }; |
214 | }; | |
b4fec647 | 215 | |
85cb4e0b BS |
216 | i2c_cm36651: i2c-gpio-2 { |
217 | compatible = "i2c-gpio"; | |
c10d3290 | 218 | gpios = <&gpf0 0 GPIO_ACTIVE_LOW>, <&gpf0 1 GPIO_ACTIVE_LOW>; |
85cb4e0b BS |
219 | i2c-gpio,delay-us = <2>; |
220 | #address-cells = <1>; | |
221 | #size-cells = <0>; | |
222 | ||
223 | cm36651@18 { | |
224 | compatible = "capella,cm36651"; | |
225 | reg = <0x18>; | |
226 | interrupt-parent = <&gpx0>; | |
227 | interrupts = <2 2>; | |
228 | vled-supply = <&ps_als_reg>; | |
229 | }; | |
230 | }; | |
231 | ||
4cb37864 SN |
232 | camera: camera { |
233 | pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>; | |
b4fec647 SN |
234 | pinctrl-names = "default"; |
235 | status = "okay"; | |
0357a443 SN |
236 | assigned-clocks = <&clock CLK_MOUT_CAM0>, |
237 | <&clock CLK_MOUT_CAM1>; | |
cfe3b893 SN |
238 | assigned-clock-parents = <&clock CLK_XUSBXTI>, |
239 | <&clock CLK_XUSBXTI>; | |
b4fec647 | 240 | |
b4fec647 | 241 | |
440e5aef IS |
242 | }; |
243 | ||
244 | sound { | |
245 | compatible = "samsung,trats2-audio"; | |
246 | samsung,i2s-controller = <&i2s0>; | |
247 | samsung,model = "Trats2"; | |
248 | samsung,audio-codec = <&wm1811>; | |
249 | samsung,audio-routing = | |
250 | "SPK", "SPKOUTLN", | |
251 | "SPK", "SPKOUTLP", | |
252 | "SPK", "SPKOUTRN", | |
253 | "SPK", "SPKOUTRP"; | |
254 | }; | |
255 | ||
26ee29a6 | 256 | thermistor-ap { |
dd9ad468 | 257 | compatible = "murata,ncp15wb473"; |
4f423788 CC |
258 | pullup-uv = <1800000>; /* VCC_1.8V_AP */ |
259 | pullup-ohm = <100000>; /* 100K */ | |
260 | pulldown-ohm = <100000>; /* 100K */ | |
261 | io-channels = <&adc 1>; /* AP temperature */ | |
262 | }; | |
263 | ||
26ee29a6 | 264 | thermistor-battery { |
dd9ad468 | 265 | compatible = "murata,ncp15wb473"; |
4f423788 CC |
266 | pullup-uv = <1800000>; /* VCC_1.8V_AP */ |
267 | pullup-ohm = <100000>; /* 100K */ | |
268 | pulldown-ohm = <100000>; /* 100K */ | |
269 | io-channels = <&adc 2>; /* Battery temperature */ | |
270 | }; | |
bf4a0bed LM |
271 | |
272 | thermal-zones { | |
273 | cpu_thermal: cpu-thermal { | |
274 | cooling-maps { | |
275 | map0 { | |
276 | /* Corresponds to 800MHz at freq_table */ | |
277 | cooling-device = <&cpu0 7 7>; | |
278 | }; | |
279 | map1 { | |
280 | /* Corresponds to 200MHz at freq_table */ | |
281 | cooling-device = <&cpu0 13 13>; | |
282 | }; | |
283 | }; | |
284 | }; | |
285 | }; | |
15dfdfad | 286 | }; |
09918a98 | 287 | |
1fe9a942 KK |
288 | &adc { |
289 | vdd-supply = <&ldo3_reg>; | |
290 | status = "okay"; | |
291 | }; | |
292 | ||
4f20aa0e CC |
293 | &bus_dmc { |
294 | devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; | |
295 | vdd-supply = <&buck1_reg>; | |
296 | status = "okay"; | |
297 | }; | |
298 | ||
299 | &bus_acp { | |
300 | devfreq = <&bus_dmc>; | |
301 | status = "okay"; | |
302 | }; | |
303 | ||
304 | &bus_c2c { | |
305 | devfreq = <&bus_dmc>; | |
306 | status = "okay"; | |
307 | }; | |
308 | ||
309 | &bus_leftbus { | |
310 | devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; | |
311 | vdd-supply = <&buck3_reg>; | |
312 | status = "okay"; | |
313 | }; | |
314 | ||
315 | &bus_rightbus { | |
316 | devfreq = <&bus_leftbus>; | |
317 | status = "okay"; | |
318 | }; | |
319 | ||
320 | &bus_display { | |
321 | devfreq = <&bus_leftbus>; | |
322 | status = "okay"; | |
323 | }; | |
324 | ||
325 | &bus_fsys { | |
326 | devfreq = <&bus_leftbus>; | |
327 | status = "okay"; | |
328 | }; | |
329 | ||
330 | &bus_peri { | |
331 | devfreq = <&bus_leftbus>; | |
332 | status = "okay"; | |
333 | }; | |
334 | ||
335 | &bus_mfc { | |
336 | devfreq = <&bus_leftbus>; | |
337 | status = "okay"; | |
338 | }; | |
339 | ||
f4499741 BZ |
340 | &cpu0 { |
341 | cpu0-supply = <&buck2_reg>; | |
342 | }; | |
343 | ||
1fe9a942 KK |
344 | &csis_0 { |
345 | status = "okay"; | |
346 | vddcore-supply = <&ldo8_reg>; | |
347 | vddio-supply = <&ldo10_reg>; | |
348 | assigned-clocks = <&clock CLK_MOUT_CSIS0>, | |
349 | <&clock CLK_SCLK_CSIS0>; | |
350 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
351 | assigned-clock-rates = <0>, <176000000>; | |
352 | ||
353 | /* Camera C (3) MIPI CSI-2 (CSIS0) */ | |
354 | port@3 { | |
355 | reg = <3>; | |
356 | csis0_ep: endpoint { | |
357 | remote-endpoint = <&s5c73m3_ep>; | |
358 | data-lanes = <1 2 3 4>; | |
359 | samsung,csis-hs-settle = <12>; | |
360 | }; | |
361 | }; | |
362 | }; | |
363 | ||
364 | &csis_1 { | |
365 | status = "okay"; | |
366 | vddcore-supply = <&ldo8_reg>; | |
367 | vddio-supply = <&ldo10_reg>; | |
368 | assigned-clocks = <&clock CLK_MOUT_CSIS1>, | |
369 | <&clock CLK_SCLK_CSIS1>; | |
370 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
371 | assigned-clock-rates = <0>, <176000000>; | |
372 | ||
373 | /* Camera D (4) MIPI CSI-2 (CSIS1) */ | |
374 | port@4 { | |
375 | reg = <4>; | |
376 | csis1_ep: endpoint { | |
377 | remote-endpoint = <&is_s5k6a3_ep>; | |
378 | data-lanes = <1>; | |
379 | samsung,csis-hs-settle = <18>; | |
380 | samsung,csis-wclk; | |
381 | }; | |
382 | }; | |
383 | }; | |
384 | ||
385 | &dsi_0 { | |
386 | vddcore-supply = <&ldo8_reg>; | |
387 | vddio-supply = <&ldo10_reg>; | |
388 | samsung,pll-clock-frequency = <24000000>; | |
389 | status = "okay"; | |
390 | ||
391 | ports { | |
392 | #address-cells = <1>; | |
393 | #size-cells = <0>; | |
394 | ||
395 | port@1 { | |
396 | reg = <1>; | |
397 | ||
398 | dsi_out: endpoint { | |
399 | remote-endpoint = <&dsi_in>; | |
400 | samsung,burst-clock-frequency = <500000000>; | |
401 | samsung,esc-clock-frequency = <20000000>; | |
402 | }; | |
403 | }; | |
404 | }; | |
405 | ||
406 | panel@0 { | |
407 | compatible = "samsung,s6e8aa0"; | |
408 | reg = <0>; | |
409 | vdd3-supply = <&lcd_vdd3_reg>; | |
410 | vci-supply = <&ldo25_reg>; | |
c10d3290 | 411 | reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>; |
1fe9a942 KK |
412 | power-on-delay= <50>; |
413 | reset-delay = <100>; | |
414 | init-delay = <100>; | |
415 | flip-horizontal; | |
416 | flip-vertical; | |
417 | panel-width-mm = <58>; | |
418 | panel-height-mm = <103>; | |
419 | ||
420 | display-timings { | |
421 | timing-0 { | |
422 | clock-frequency = <57153600>; | |
423 | hactive = <720>; | |
424 | vactive = <1280>; | |
425 | hfront-porch = <5>; | |
426 | hback-porch = <5>; | |
427 | hsync-len = <5>; | |
428 | vfront-porch = <13>; | |
429 | vback-porch = <1>; | |
430 | vsync-len = <2>; | |
431 | }; | |
432 | }; | |
433 | ||
434 | port { | |
435 | dsi_in: endpoint { | |
436 | remote-endpoint = <&dsi_out>; | |
437 | }; | |
438 | }; | |
439 | }; | |
440 | }; | |
441 | ||
442 | &exynos_usbphy { | |
4ae9a4c6 | 443 | vbus-supply = <&esafeout1_reg>; |
1fe9a942 KK |
444 | status = "okay"; |
445 | }; | |
446 | ||
447 | &fimc_0 { | |
448 | status = "okay"; | |
449 | assigned-clocks = <&clock CLK_MOUT_FIMC0>, | |
450 | <&clock CLK_SCLK_FIMC0>; | |
451 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
452 | assigned-clock-rates = <0>, <176000000>; | |
453 | }; | |
454 | ||
455 | &fimc_1 { | |
456 | status = "okay"; | |
457 | assigned-clocks = <&clock CLK_MOUT_FIMC1>, | |
458 | <&clock CLK_SCLK_FIMC1>; | |
459 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
460 | assigned-clock-rates = <0>, <176000000>; | |
461 | }; | |
462 | ||
463 | &fimc_2 { | |
464 | status = "okay"; | |
465 | assigned-clocks = <&clock CLK_MOUT_FIMC2>, | |
466 | <&clock CLK_SCLK_FIMC2>; | |
467 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
468 | assigned-clock-rates = <0>, <176000000>; | |
469 | }; | |
470 | ||
471 | &fimc_3 { | |
472 | status = "okay"; | |
473 | assigned-clocks = <&clock CLK_MOUT_FIMC3>, | |
474 | <&clock CLK_SCLK_FIMC3>; | |
475 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; | |
476 | assigned-clock-rates = <0>, <176000000>; | |
477 | }; | |
478 | ||
479 | &fimc_is { | |
480 | pinctrl-0 = <&fimc_is_uart>; | |
481 | pinctrl-names = "default"; | |
482 | status = "okay"; | |
483 | ||
484 | i2c1_isp: i2c-isp@12140000 { | |
485 | pinctrl-0 = <&fimc_is_i2c1>; | |
486 | pinctrl-names = "default"; | |
487 | ||
488 | s5k6a3@10 { | |
489 | compatible = "samsung,s5k6a3"; | |
490 | reg = <0x10>; | |
491 | svdda-supply = <&cam_io_reg>; | |
492 | svddio-supply = <&ldo19_reg>; | |
493 | afvdd-supply = <&ldo19_reg>; | |
494 | clock-frequency = <24000000>; | |
495 | /* CAM_B_CLKOUT */ | |
496 | clocks = <&camera 1>; | |
497 | clock-names = "extclk"; | |
498 | samsung,camclk-out = <1>; | |
c10d3290 | 499 | gpios = <&gpm1 6 GPIO_ACTIVE_HIGH>; |
1fe9a942 KK |
500 | |
501 | port { | |
502 | is_s5k6a3_ep: endpoint { | |
503 | remote-endpoint = <&csis1_ep>; | |
504 | data-lanes = <1>; | |
505 | }; | |
506 | }; | |
507 | }; | |
508 | }; | |
509 | }; | |
510 | ||
511 | &fimc_lite_0 { | |
512 | status = "okay"; | |
513 | }; | |
514 | ||
515 | &fimc_lite_1 { | |
516 | status = "okay"; | |
517 | }; | |
518 | ||
519 | &fimd { | |
520 | status = "okay"; | |
521 | }; | |
522 | ||
523 | &hsotg { | |
524 | vusb_d-supply = <&ldo15_reg>; | |
525 | vusb_a-supply = <&ldo12_reg>; | |
526 | dr_mode = "peripheral"; | |
527 | status = "okay"; | |
528 | }; | |
529 | ||
530 | &i2c_0 { | |
531 | samsung,i2c-sda-delay = <100>; | |
532 | samsung,i2c-slave-addr = <0x10>; | |
533 | samsung,i2c-max-bus-freq = <400000>; | |
534 | pinctrl-0 = <&i2c0_bus>; | |
535 | pinctrl-names = "default"; | |
536 | status = "okay"; | |
537 | ||
538 | s5c73m3@3c { | |
539 | compatible = "samsung,s5c73m3"; | |
540 | reg = <0x3c>; | |
c10d3290 JMC |
541 | standby-gpios = <&gpm0 1 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */ |
542 | xshutdown-gpios = <&gpf1 3 GPIO_ACTIVE_LOW>; /* ISP_RESET */ | |
1fe9a942 KK |
543 | vdd-int-supply = <&buck9_reg>; |
544 | vddio-cis-supply = <&ldo9_reg>; | |
545 | vdda-supply = <&ldo17_reg>; | |
546 | vddio-host-supply = <&ldo18_reg>; | |
547 | vdd-af-supply = <&cam_af_reg>; | |
548 | vdd-reg-supply = <&cam_io_reg>; | |
549 | clock-frequency = <24000000>; | |
550 | /* CAM_A_CLKOUT */ | |
551 | clocks = <&camera 0>; | |
552 | clock-names = "cis_extclk"; | |
553 | port { | |
554 | s5c73m3_ep: endpoint { | |
555 | remote-endpoint = <&csis0_ep>; | |
556 | data-lanes = <1 2 3 4>; | |
557 | }; | |
558 | }; | |
559 | }; | |
560 | }; | |
561 | ||
562 | &i2c_3 { | |
563 | samsung,i2c-sda-delay = <100>; | |
564 | samsung,i2c-slave-addr = <0x10>; | |
565 | samsung,i2c-max-bus-freq = <400000>; | |
566 | pinctrl-0 = <&i2c3_bus>; | |
567 | pinctrl-names = "default"; | |
568 | status = "okay"; | |
569 | ||
570 | mms114-touchscreen@48 { | |
571 | compatible = "melfas,mms114"; | |
572 | reg = <0x48>; | |
573 | interrupt-parent = <&gpm2>; | |
574 | interrupts = <3 2>; | |
575 | x-size = <720>; | |
576 | y-size = <1280>; | |
577 | avdd-supply = <&ldo23_reg>; | |
578 | vdd-supply = <&ldo24_reg>; | |
579 | }; | |
580 | }; | |
581 | ||
582 | &i2c_4 { | |
583 | samsung,i2c-sda-delay = <100>; | |
584 | samsung,i2c-slave-addr = <0x10>; | |
585 | samsung,i2c-max-bus-freq = <100000>; | |
586 | pinctrl-0 = <&i2c4_bus>; | |
587 | pinctrl-names = "default"; | |
588 | status = "okay"; | |
589 | ||
590 | wm1811: wm1811@1a { | |
591 | compatible = "wlf,wm1811"; | |
592 | reg = <0x1a>; | |
593 | clocks = <&pmu_system_controller 0>; | |
594 | clock-names = "MCLK1"; | |
595 | DCVDD-supply = <&ldo3_reg>; | |
596 | DBVDD1-supply = <&ldo3_reg>; | |
597 | wlf,ldo1ena = <&gpj0 4 0>; | |
598 | }; | |
599 | }; | |
600 | ||
601 | &i2c_7 { | |
602 | samsung,i2c-sda-delay = <100>; | |
603 | samsung,i2c-slave-addr = <0x10>; | |
604 | samsung,i2c-max-bus-freq = <100000>; | |
605 | pinctrl-0 = <&i2c7_bus>; | |
606 | pinctrl-names = "default"; | |
607 | status = "okay"; | |
608 | ||
609 | max77686: max77686_pmic@09 { | |
610 | compatible = "maxim,max77686"; | |
611 | interrupt-parent = <&gpx0>; | |
612 | interrupts = <7 0>; | |
613 | reg = <0x09>; | |
614 | #clock-cells = <1>; | |
615 | ||
616 | voltage-regulators { | |
c21dbcfe | 617 | ldo1_reg: LDO1 { |
1fe9a942 KK |
618 | regulator-name = "VALIVE_1.0V_AP"; |
619 | regulator-min-microvolt = <1000000>; | |
620 | regulator-max-microvolt = <1000000>; | |
621 | regulator-always-on; | |
622 | }; | |
623 | ||
c21dbcfe | 624 | ldo2_reg: LDO2 { |
1fe9a942 KK |
625 | regulator-name = "VM1M2_1.2V_AP"; |
626 | regulator-min-microvolt = <1200000>; | |
627 | regulator-max-microvolt = <1200000>; | |
628 | regulator-always-on; | |
629 | regulator-state-mem { | |
630 | regulator-on-in-suspend; | |
631 | }; | |
632 | }; | |
633 | ||
c21dbcfe | 634 | ldo3_reg: LDO3 { |
1fe9a942 KK |
635 | regulator-name = "VCC_1.8V_AP"; |
636 | regulator-min-microvolt = <1800000>; | |
637 | regulator-max-microvolt = <1800000>; | |
638 | regulator-always-on; | |
639 | }; | |
640 | ||
c21dbcfe | 641 | ldo4_reg: LDO4 { |
1fe9a942 KK |
642 | regulator-name = "VCC_2.8V_AP"; |
643 | regulator-min-microvolt = <2800000>; | |
644 | regulator-max-microvolt = <2800000>; | |
645 | regulator-always-on; | |
646 | }; | |
647 | ||
c21dbcfe | 648 | ldo5_reg: LDO5 { |
1fe9a942 KK |
649 | regulator-name = "VCC_1.8V_IO"; |
650 | regulator-min-microvolt = <1800000>; | |
651 | regulator-max-microvolt = <1800000>; | |
652 | regulator-always-on; | |
653 | }; | |
654 | ||
c21dbcfe | 655 | ldo6_reg: LDO6 { |
1fe9a942 KK |
656 | regulator-name = "VMPLL_1.0V_AP"; |
657 | regulator-min-microvolt = <1000000>; | |
658 | regulator-max-microvolt = <1000000>; | |
659 | regulator-always-on; | |
660 | regulator-state-mem { | |
661 | regulator-on-in-suspend; | |
662 | }; | |
663 | }; | |
664 | ||
c21dbcfe | 665 | ldo7_reg: LDO7 { |
1fe9a942 KK |
666 | regulator-name = "VPLL_1.0V_AP"; |
667 | regulator-min-microvolt = <1000000>; | |
668 | regulator-max-microvolt = <1000000>; | |
669 | regulator-always-on; | |
670 | regulator-state-mem { | |
671 | regulator-on-in-suspend; | |
672 | }; | |
673 | }; | |
674 | ||
c21dbcfe | 675 | ldo8_reg: LDO8 { |
1fe9a942 KK |
676 | regulator-name = "VMIPI_1.0V"; |
677 | regulator-min-microvolt = <1000000>; | |
678 | regulator-max-microvolt = <1000000>; | |
679 | regulator-state-mem { | |
680 | regulator-off-in-suspend; | |
681 | }; | |
682 | }; | |
683 | ||
c21dbcfe | 684 | ldo9_reg: LDO9 { |
1fe9a942 KK |
685 | regulator-name = "CAM_ISP_MIPI_1.2V"; |
686 | regulator-min-microvolt = <1200000>; | |
687 | regulator-max-microvolt = <1200000>; | |
688 | }; | |
689 | ||
c21dbcfe | 690 | ldo10_reg: LDO10 { |
1fe9a942 KK |
691 | regulator-name = "VMIPI_1.8V"; |
692 | regulator-min-microvolt = <1800000>; | |
693 | regulator-max-microvolt = <1800000>; | |
694 | regulator-state-mem { | |
695 | regulator-off-in-suspend; | |
696 | }; | |
697 | }; | |
698 | ||
c21dbcfe | 699 | ldo11_reg: LDO11 { |
1fe9a942 KK |
700 | regulator-name = "VABB1_1.95V"; |
701 | regulator-min-microvolt = <1950000>; | |
702 | regulator-max-microvolt = <1950000>; | |
703 | regulator-always-on; | |
704 | regulator-state-mem { | |
705 | regulator-off-in-suspend; | |
706 | }; | |
707 | }; | |
708 | ||
c21dbcfe | 709 | ldo12_reg: LDO12 { |
1fe9a942 KK |
710 | regulator-name = "VUOTG_3.0V"; |
711 | regulator-min-microvolt = <3000000>; | |
712 | regulator-max-microvolt = <3000000>; | |
713 | regulator-state-mem { | |
714 | regulator-off-in-suspend; | |
715 | }; | |
716 | }; | |
717 | ||
c21dbcfe | 718 | ldo13_reg: LDO13 { |
1fe9a942 KK |
719 | regulator-name = "NFC_AVDD_1.8V"; |
720 | regulator-min-microvolt = <1800000>; | |
721 | regulator-max-microvolt = <1800000>; | |
722 | }; | |
723 | ||
c21dbcfe | 724 | ldo14_reg: LDO14 { |
1fe9a942 KK |
725 | regulator-name = "VABB2_1.95V"; |
726 | regulator-min-microvolt = <1950000>; | |
727 | regulator-max-microvolt = <1950000>; | |
728 | regulator-always-on; | |
729 | regulator-state-mem { | |
730 | regulator-off-in-suspend; | |
731 | }; | |
732 | }; | |
733 | ||
c21dbcfe | 734 | ldo15_reg: LDO15 { |
1fe9a942 KK |
735 | regulator-name = "VHSIC_1.0V"; |
736 | regulator-min-microvolt = <1000000>; | |
737 | regulator-max-microvolt = <1000000>; | |
738 | regulator-state-mem { | |
739 | regulator-on-in-suspend; | |
740 | }; | |
741 | }; | |
742 | ||
c21dbcfe | 743 | ldo16_reg: LDO16 { |
1fe9a942 KK |
744 | regulator-name = "VHSIC_1.8V"; |
745 | regulator-min-microvolt = <1800000>; | |
746 | regulator-max-microvolt = <1800000>; | |
747 | regulator-state-mem { | |
748 | regulator-on-in-suspend; | |
749 | }; | |
750 | }; | |
751 | ||
c21dbcfe | 752 | ldo17_reg: LDO17 { |
1fe9a942 KK |
753 | regulator-name = "CAM_SENSOR_CORE_1.2V"; |
754 | regulator-min-microvolt = <1200000>; | |
755 | regulator-max-microvolt = <1200000>; | |
756 | }; | |
757 | ||
c21dbcfe | 758 | ldo18_reg: LDO18 { |
1fe9a942 KK |
759 | regulator-name = "CAM_ISP_SEN_IO_1.8V"; |
760 | regulator-min-microvolt = <1800000>; | |
761 | regulator-max-microvolt = <1800000>; | |
762 | }; | |
763 | ||
c21dbcfe | 764 | ldo19_reg: LDO19 { |
1fe9a942 KK |
765 | regulator-name = "VT_CAM_1.8V"; |
766 | regulator-min-microvolt = <1800000>; | |
767 | regulator-max-microvolt = <1800000>; | |
768 | }; | |
769 | ||
c21dbcfe | 770 | ldo20_reg: LDO20 { |
1fe9a942 KK |
771 | regulator-name = "VDDQ_PRE_1.8V"; |
772 | regulator-min-microvolt = <1800000>; | |
773 | regulator-max-microvolt = <1800000>; | |
774 | }; | |
775 | ||
c21dbcfe | 776 | ldo21_reg: LDO21 { |
1fe9a942 KK |
777 | regulator-name = "VTF_2.8V"; |
778 | regulator-min-microvolt = <2800000>; | |
779 | regulator-max-microvolt = <2800000>; | |
780 | maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>; | |
781 | }; | |
782 | ||
c21dbcfe | 783 | ldo22_reg: LDO22 { |
1fe9a942 KK |
784 | regulator-name = "VMEM_VDD_2.8V"; |
785 | regulator-min-microvolt = <2800000>; | |
786 | regulator-max-microvolt = <2800000>; | |
787 | maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; | |
788 | }; | |
789 | ||
c21dbcfe | 790 | ldo23_reg: LDO23 { |
1fe9a942 KK |
791 | regulator-name = "TSP_AVDD_3.3V"; |
792 | regulator-min-microvolt = <3300000>; | |
793 | regulator-max-microvolt = <3300000>; | |
794 | }; | |
795 | ||
c21dbcfe | 796 | ldo24_reg: LDO24 { |
1fe9a942 KK |
797 | regulator-name = "TSP_VDD_1.8V"; |
798 | regulator-min-microvolt = <1800000>; | |
799 | regulator-max-microvolt = <1800000>; | |
800 | }; | |
801 | ||
c21dbcfe | 802 | ldo25_reg: LDO25 { |
1fe9a942 KK |
803 | regulator-name = "LCD_VCC_3.3V"; |
804 | regulator-min-microvolt = <2800000>; | |
805 | regulator-max-microvolt = <2800000>; | |
806 | }; | |
807 | ||
c21dbcfe | 808 | ldo26_reg: LDO26 { |
1fe9a942 KK |
809 | regulator-name = "MOTOR_VCC_3.0V"; |
810 | regulator-min-microvolt = <3000000>; | |
811 | regulator-max-microvolt = <3000000>; | |
812 | }; | |
813 | ||
c21dbcfe | 814 | buck1_reg: BUCK1 { |
1fe9a942 KK |
815 | regulator-name = "vdd_mif"; |
816 | regulator-min-microvolt = <850000>; | |
817 | regulator-max-microvolt = <1100000>; | |
818 | regulator-always-on; | |
819 | regulator-boot-on; | |
820 | regulator-state-mem { | |
821 | regulator-off-in-suspend; | |
822 | }; | |
823 | }; | |
824 | ||
c21dbcfe | 825 | buck2_reg: BUCK2 { |
1fe9a942 KK |
826 | regulator-name = "vdd_arm"; |
827 | regulator-min-microvolt = <850000>; | |
828 | regulator-max-microvolt = <1500000>; | |
829 | regulator-always-on; | |
830 | regulator-boot-on; | |
831 | regulator-state-mem { | |
832 | regulator-on-in-suspend; | |
833 | }; | |
834 | }; | |
835 | ||
c21dbcfe | 836 | buck3_reg: BUCK3 { |
1fe9a942 KK |
837 | regulator-name = "vdd_int"; |
838 | regulator-min-microvolt = <850000>; | |
839 | regulator-max-microvolt = <1150000>; | |
840 | regulator-always-on; | |
841 | regulator-boot-on; | |
842 | regulator-state-mem { | |
843 | regulator-off-in-suspend; | |
844 | }; | |
845 | }; | |
846 | ||
c21dbcfe | 847 | buck4_reg: BUCK4 { |
1fe9a942 KK |
848 | regulator-name = "vdd_g3d"; |
849 | regulator-min-microvolt = <850000>; | |
850 | regulator-max-microvolt = <1150000>; | |
851 | regulator-boot-on; | |
852 | regulator-state-mem { | |
853 | regulator-off-in-suspend; | |
854 | }; | |
855 | }; | |
856 | ||
c21dbcfe | 857 | buck5_reg: BUCK5 { |
1fe9a942 KK |
858 | regulator-name = "VMEM_1.2V_AP"; |
859 | regulator-min-microvolt = <1200000>; | |
860 | regulator-max-microvolt = <1200000>; | |
861 | regulator-always-on; | |
862 | }; | |
863 | ||
c21dbcfe | 864 | buck6_reg: BUCK6 { |
1fe9a942 KK |
865 | regulator-name = "VCC_SUB_1.35V"; |
866 | regulator-min-microvolt = <1350000>; | |
867 | regulator-max-microvolt = <1350000>; | |
868 | regulator-always-on; | |
869 | }; | |
870 | ||
c21dbcfe | 871 | buck7_reg: BUCK7 { |
1fe9a942 KK |
872 | regulator-name = "VCC_SUB_2.0V"; |
873 | regulator-min-microvolt = <2000000>; | |
874 | regulator-max-microvolt = <2000000>; | |
875 | regulator-always-on; | |
876 | }; | |
877 | ||
c21dbcfe | 878 | buck8_reg: BUCK8 { |
1fe9a942 KK |
879 | regulator-name = "VMEM_VDDF_3.0V"; |
880 | regulator-min-microvolt = <2850000>; | |
881 | regulator-max-microvolt = <2850000>; | |
882 | maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; | |
883 | }; | |
884 | ||
c21dbcfe | 885 | buck9_reg: BUCK9 { |
1fe9a942 KK |
886 | regulator-name = "CAM_ISP_CORE_1.2V"; |
887 | regulator-min-microvolt = <1000000>; | |
888 | regulator-max-microvolt = <1200000>; | |
889 | maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>; | |
890 | }; | |
891 | }; | |
892 | }; | |
893 | }; | |
894 | ||
895 | &i2s0 { | |
896 | pinctrl-0 = <&i2s0_bus>; | |
897 | pinctrl-names = "default"; | |
898 | status = "okay"; | |
899 | }; | |
900 | ||
901 | &mshc_0 { | |
902 | num-slots = <1>; | |
903 | broken-cd; | |
904 | non-removable; | |
905 | card-detect-delay = <200>; | |
906 | vmmc-supply = <&ldo22_reg>; | |
907 | clock-frequency = <400000000>; | |
908 | samsung,dw-mshc-ciu-div = <0>; | |
909 | samsung,dw-mshc-sdr-timing = <2 3>; | |
910 | samsung,dw-mshc-ddr-timing = <1 2>; | |
911 | pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; | |
912 | pinctrl-names = "default"; | |
913 | status = "okay"; | |
914 | bus-width = <8>; | |
915 | cap-mmc-highspeed; | |
916 | }; | |
917 | ||
440e5aef IS |
918 | &pmu_system_controller { |
919 | assigned-clocks = <&pmu_system_controller 0>; | |
920 | assigned-clock-parents = <&clock CLK_XUSBXTI>; | |
921 | }; | |
922 | ||
09918a98 TF |
923 | &pinctrl_0 { |
924 | pinctrl-names = "default"; | |
925 | pinctrl-0 = <&sleep0>; | |
926 | ||
927 | sleep0: sleep-states { | |
928 | PIN_SLP(gpa0-0, INPUT, NONE); | |
929 | PIN_SLP(gpa0-1, OUT0, NONE); | |
930 | PIN_SLP(gpa0-2, INPUT, NONE); | |
931 | PIN_SLP(gpa0-3, INPUT, UP); | |
932 | PIN_SLP(gpa0-4, INPUT, NONE); | |
933 | PIN_SLP(gpa0-5, INPUT, DOWN); | |
934 | PIN_SLP(gpa0-6, INPUT, DOWN); | |
935 | PIN_SLP(gpa0-7, INPUT, UP); | |
936 | ||
937 | PIN_SLP(gpa1-0, INPUT, DOWN); | |
938 | PIN_SLP(gpa1-1, INPUT, DOWN); | |
939 | PIN_SLP(gpa1-2, INPUT, DOWN); | |
940 | PIN_SLP(gpa1-3, INPUT, DOWN); | |
941 | PIN_SLP(gpa1-4, INPUT, DOWN); | |
942 | PIN_SLP(gpa1-5, INPUT, DOWN); | |
943 | ||
944 | PIN_SLP(gpb-0, INPUT, NONE); | |
945 | PIN_SLP(gpb-1, INPUT, NONE); | |
946 | PIN_SLP(gpb-2, INPUT, NONE); | |
947 | PIN_SLP(gpb-3, INPUT, NONE); | |
948 | PIN_SLP(gpb-4, INPUT, DOWN); | |
949 | PIN_SLP(gpb-5, INPUT, UP); | |
950 | PIN_SLP(gpb-6, INPUT, DOWN); | |
951 | PIN_SLP(gpb-7, INPUT, DOWN); | |
952 | ||
953 | PIN_SLP(gpc0-0, INPUT, DOWN); | |
954 | PIN_SLP(gpc0-1, INPUT, DOWN); | |
955 | PIN_SLP(gpc0-2, INPUT, DOWN); | |
956 | PIN_SLP(gpc0-3, INPUT, DOWN); | |
957 | PIN_SLP(gpc0-4, INPUT, DOWN); | |
958 | ||
959 | PIN_SLP(gpc1-0, INPUT, NONE); | |
960 | PIN_SLP(gpc1-1, PREV, NONE); | |
961 | PIN_SLP(gpc1-2, INPUT, NONE); | |
962 | PIN_SLP(gpc1-3, INPUT, NONE); | |
963 | PIN_SLP(gpc1-4, INPUT, NONE); | |
964 | ||
965 | PIN_SLP(gpd0-0, INPUT, DOWN); | |
966 | PIN_SLP(gpd0-1, INPUT, DOWN); | |
967 | PIN_SLP(gpd0-2, INPUT, NONE); | |
968 | PIN_SLP(gpd0-3, INPUT, NONE); | |
969 | ||
970 | PIN_SLP(gpd1-0, INPUT, DOWN); | |
971 | PIN_SLP(gpd1-1, INPUT, DOWN); | |
972 | PIN_SLP(gpd1-2, INPUT, NONE); | |
973 | PIN_SLP(gpd1-3, INPUT, NONE); | |
974 | ||
975 | PIN_SLP(gpf0-0, INPUT, NONE); | |
976 | PIN_SLP(gpf0-1, INPUT, NONE); | |
977 | PIN_SLP(gpf0-2, INPUT, DOWN); | |
978 | PIN_SLP(gpf0-3, INPUT, DOWN); | |
979 | PIN_SLP(gpf0-4, INPUT, NONE); | |
980 | PIN_SLP(gpf0-5, INPUT, DOWN); | |
981 | PIN_SLP(gpf0-6, INPUT, NONE); | |
982 | PIN_SLP(gpf0-7, INPUT, DOWN); | |
983 | ||
984 | PIN_SLP(gpf1-0, INPUT, DOWN); | |
985 | PIN_SLP(gpf1-1, INPUT, DOWN); | |
986 | PIN_SLP(gpf1-2, INPUT, DOWN); | |
987 | PIN_SLP(gpf1-3, INPUT, DOWN); | |
988 | PIN_SLP(gpf1-4, INPUT, NONE); | |
989 | PIN_SLP(gpf1-5, INPUT, NONE); | |
990 | PIN_SLP(gpf1-6, INPUT, DOWN); | |
991 | PIN_SLP(gpf1-7, PREV, NONE); | |
992 | ||
993 | PIN_SLP(gpf2-0, PREV, NONE); | |
994 | PIN_SLP(gpf2-1, INPUT, DOWN); | |
995 | PIN_SLP(gpf2-2, INPUT, DOWN); | |
996 | PIN_SLP(gpf2-3, INPUT, DOWN); | |
997 | PIN_SLP(gpf2-4, INPUT, DOWN); | |
998 | PIN_SLP(gpf2-5, INPUT, DOWN); | |
999 | PIN_SLP(gpf2-6, INPUT, NONE); | |
1000 | PIN_SLP(gpf2-7, INPUT, NONE); | |
1001 | ||
1002 | PIN_SLP(gpf3-0, INPUT, NONE); | |
1003 | PIN_SLP(gpf3-1, PREV, NONE); | |
1004 | PIN_SLP(gpf3-2, PREV, NONE); | |
1005 | PIN_SLP(gpf3-3, PREV, NONE); | |
1006 | PIN_SLP(gpf3-4, OUT1, NONE); | |
1007 | PIN_SLP(gpf3-5, INPUT, DOWN); | |
1008 | ||
1009 | PIN_SLP(gpj0-0, PREV, NONE); | |
1010 | PIN_SLP(gpj0-1, PREV, NONE); | |
1011 | PIN_SLP(gpj0-2, PREV, NONE); | |
1012 | PIN_SLP(gpj0-3, INPUT, DOWN); | |
1013 | PIN_SLP(gpj0-4, PREV, NONE); | |
1014 | PIN_SLP(gpj0-5, PREV, NONE); | |
1015 | PIN_SLP(gpj0-6, INPUT, DOWN); | |
1016 | PIN_SLP(gpj0-7, INPUT, DOWN); | |
1017 | ||
1018 | PIN_SLP(gpj1-0, INPUT, DOWN); | |
1019 | PIN_SLP(gpj1-1, PREV, NONE); | |
1020 | PIN_SLP(gpj1-2, PREV, NONE); | |
1021 | PIN_SLP(gpj1-3, INPUT, DOWN); | |
1022 | PIN_SLP(gpj1-4, INPUT, DOWN); | |
1023 | }; | |
1024 | }; | |
1025 | ||
1026 | &pinctrl_1 { | |
1027 | pinctrl-names = "default"; | |
1028 | pinctrl-0 = <&sleep1>; | |
1029 | ||
1030 | sleep1: sleep-states { | |
1031 | PIN_SLP(gpk0-0, PREV, NONE); | |
1032 | PIN_SLP(gpk0-1, PREV, NONE); | |
1033 | PIN_SLP(gpk0-2, OUT0, NONE); | |
1034 | PIN_SLP(gpk0-3, PREV, NONE); | |
1035 | PIN_SLP(gpk0-4, PREV, NONE); | |
1036 | PIN_SLP(gpk0-5, PREV, NONE); | |
1037 | PIN_SLP(gpk0-6, PREV, NONE); | |
1038 | ||
1039 | PIN_SLP(gpk1-0, INPUT, DOWN); | |
1040 | PIN_SLP(gpk1-1, INPUT, DOWN); | |
1041 | PIN_SLP(gpk1-2, INPUT, DOWN); | |
1042 | PIN_SLP(gpk1-3, PREV, NONE); | |
1043 | PIN_SLP(gpk1-4, PREV, NONE); | |
1044 | PIN_SLP(gpk1-5, PREV, NONE); | |
1045 | PIN_SLP(gpk1-6, PREV, NONE); | |
1046 | ||
1047 | PIN_SLP(gpk2-0, INPUT, DOWN); | |
1048 | PIN_SLP(gpk2-1, INPUT, DOWN); | |
1049 | PIN_SLP(gpk2-2, INPUT, DOWN); | |
1050 | PIN_SLP(gpk2-3, INPUT, DOWN); | |
1051 | PIN_SLP(gpk2-4, INPUT, DOWN); | |
1052 | PIN_SLP(gpk2-5, INPUT, DOWN); | |
1053 | PIN_SLP(gpk2-6, INPUT, DOWN); | |
1054 | ||
1055 | PIN_SLP(gpk3-0, OUT0, NONE); | |
1056 | PIN_SLP(gpk3-1, INPUT, NONE); | |
1057 | PIN_SLP(gpk3-2, INPUT, DOWN); | |
1058 | PIN_SLP(gpk3-3, INPUT, NONE); | |
1059 | PIN_SLP(gpk3-4, INPUT, NONE); | |
1060 | PIN_SLP(gpk3-5, INPUT, NONE); | |
1061 | PIN_SLP(gpk3-6, INPUT, NONE); | |
1062 | ||
1063 | PIN_SLP(gpl0-0, INPUT, DOWN); | |
1064 | PIN_SLP(gpl0-1, INPUT, DOWN); | |
1065 | PIN_SLP(gpl0-2, INPUT, DOWN); | |
1066 | PIN_SLP(gpl0-3, INPUT, DOWN); | |
1067 | PIN_SLP(gpl0-4, PREV, NONE); | |
1068 | PIN_SLP(gpl0-6, PREV, NONE); | |
1069 | ||
1070 | PIN_SLP(gpl1-0, INPUT, DOWN); | |
1071 | PIN_SLP(gpl1-1, INPUT, DOWN); | |
1072 | PIN_SLP(gpl2-0, INPUT, DOWN); | |
1073 | PIN_SLP(gpl2-1, INPUT, DOWN); | |
1074 | PIN_SLP(gpl2-2, INPUT, DOWN); | |
1075 | PIN_SLP(gpl2-3, INPUT, DOWN); | |
1076 | PIN_SLP(gpl2-4, INPUT, DOWN); | |
1077 | PIN_SLP(gpl2-5, INPUT, DOWN); | |
1078 | PIN_SLP(gpl2-6, PREV, NONE); | |
1079 | PIN_SLP(gpl2-7, INPUT, DOWN); | |
1080 | ||
1081 | PIN_SLP(gpm0-0, INPUT, DOWN); | |
1082 | PIN_SLP(gpm0-1, INPUT, DOWN); | |
1083 | PIN_SLP(gpm0-2, INPUT, DOWN); | |
1084 | PIN_SLP(gpm0-3, INPUT, DOWN); | |
1085 | PIN_SLP(gpm0-4, INPUT, DOWN); | |
1086 | PIN_SLP(gpm0-5, INPUT, DOWN); | |
1087 | PIN_SLP(gpm0-6, INPUT, DOWN); | |
1088 | PIN_SLP(gpm0-7, INPUT, DOWN); | |
1089 | ||
1090 | PIN_SLP(gpm1-0, INPUT, DOWN); | |
1091 | PIN_SLP(gpm1-1, INPUT, DOWN); | |
1092 | PIN_SLP(gpm1-2, INPUT, NONE); | |
1093 | PIN_SLP(gpm1-3, INPUT, NONE); | |
1094 | PIN_SLP(gpm1-4, INPUT, NONE); | |
1095 | PIN_SLP(gpm1-5, INPUT, NONE); | |
1096 | PIN_SLP(gpm1-6, INPUT, DOWN); | |
1097 | ||
1098 | PIN_SLP(gpm2-0, INPUT, NONE); | |
1099 | PIN_SLP(gpm2-1, INPUT, NONE); | |
1100 | PIN_SLP(gpm2-2, INPUT, DOWN); | |
1101 | PIN_SLP(gpm2-3, INPUT, DOWN); | |
1102 | PIN_SLP(gpm2-4, INPUT, DOWN); | |
1103 | ||
1104 | PIN_SLP(gpm3-0, PREV, NONE); | |
1105 | PIN_SLP(gpm3-1, PREV, NONE); | |
1106 | PIN_SLP(gpm3-2, PREV, NONE); | |
1107 | PIN_SLP(gpm3-3, OUT1, NONE); | |
1108 | PIN_SLP(gpm3-4, INPUT, DOWN); | |
1109 | PIN_SLP(gpm3-5, INPUT, DOWN); | |
1110 | PIN_SLP(gpm3-6, INPUT, DOWN); | |
1111 | PIN_SLP(gpm3-7, INPUT, DOWN); | |
1112 | ||
1113 | PIN_SLP(gpm4-0, INPUT, DOWN); | |
1114 | PIN_SLP(gpm4-1, INPUT, DOWN); | |
1115 | PIN_SLP(gpm4-2, INPUT, DOWN); | |
1116 | PIN_SLP(gpm4-3, INPUT, DOWN); | |
1117 | PIN_SLP(gpm4-4, INPUT, DOWN); | |
1118 | PIN_SLP(gpm4-5, INPUT, DOWN); | |
1119 | PIN_SLP(gpm4-6, INPUT, DOWN); | |
1120 | PIN_SLP(gpm4-7, INPUT, DOWN); | |
1121 | ||
1122 | PIN_SLP(gpy0-0, INPUT, DOWN); | |
1123 | PIN_SLP(gpy0-1, INPUT, DOWN); | |
1124 | PIN_SLP(gpy0-2, INPUT, DOWN); | |
1125 | PIN_SLP(gpy0-3, INPUT, DOWN); | |
1126 | PIN_SLP(gpy0-4, INPUT, DOWN); | |
1127 | PIN_SLP(gpy0-5, INPUT, DOWN); | |
1128 | ||
1129 | PIN_SLP(gpy1-0, INPUT, DOWN); | |
1130 | PIN_SLP(gpy1-1, INPUT, DOWN); | |
1131 | PIN_SLP(gpy1-2, INPUT, DOWN); | |
1132 | PIN_SLP(gpy1-3, INPUT, DOWN); | |
1133 | ||
1134 | PIN_SLP(gpy2-0, PREV, NONE); | |
1135 | PIN_SLP(gpy2-1, INPUT, DOWN); | |
1136 | PIN_SLP(gpy2-2, INPUT, NONE); | |
1137 | PIN_SLP(gpy2-3, INPUT, NONE); | |
1138 | PIN_SLP(gpy2-4, INPUT, NONE); | |
1139 | PIN_SLP(gpy2-5, INPUT, NONE); | |
1140 | ||
1141 | PIN_SLP(gpy3-0, INPUT, DOWN); | |
1142 | PIN_SLP(gpy3-1, INPUT, DOWN); | |
1143 | PIN_SLP(gpy3-2, INPUT, DOWN); | |
1144 | PIN_SLP(gpy3-3, INPUT, DOWN); | |
1145 | PIN_SLP(gpy3-4, INPUT, DOWN); | |
1146 | PIN_SLP(gpy3-5, INPUT, DOWN); | |
1147 | PIN_SLP(gpy3-6, INPUT, DOWN); | |
1148 | PIN_SLP(gpy3-7, INPUT, DOWN); | |
1149 | ||
1150 | PIN_SLP(gpy4-0, INPUT, DOWN); | |
1151 | PIN_SLP(gpy4-1, INPUT, DOWN); | |
1152 | PIN_SLP(gpy4-2, INPUT, DOWN); | |
1153 | PIN_SLP(gpy4-3, INPUT, DOWN); | |
1154 | PIN_SLP(gpy4-4, INPUT, DOWN); | |
1155 | PIN_SLP(gpy4-5, INPUT, DOWN); | |
1156 | PIN_SLP(gpy4-6, INPUT, DOWN); | |
1157 | PIN_SLP(gpy4-7, INPUT, DOWN); | |
1158 | ||
1159 | PIN_SLP(gpy5-0, INPUT, DOWN); | |
1160 | PIN_SLP(gpy5-1, INPUT, DOWN); | |
1161 | PIN_SLP(gpy5-2, INPUT, DOWN); | |
1162 | PIN_SLP(gpy5-3, INPUT, DOWN); | |
1163 | PIN_SLP(gpy5-4, INPUT, DOWN); | |
1164 | PIN_SLP(gpy5-5, INPUT, DOWN); | |
1165 | PIN_SLP(gpy5-6, INPUT, DOWN); | |
1166 | PIN_SLP(gpy5-7, INPUT, DOWN); | |
1167 | ||
1168 | PIN_SLP(gpy6-0, INPUT, DOWN); | |
1169 | PIN_SLP(gpy6-1, INPUT, DOWN); | |
1170 | PIN_SLP(gpy6-2, INPUT, DOWN); | |
1171 | PIN_SLP(gpy6-3, INPUT, DOWN); | |
1172 | PIN_SLP(gpy6-4, INPUT, DOWN); | |
1173 | PIN_SLP(gpy6-5, INPUT, DOWN); | |
1174 | PIN_SLP(gpy6-6, INPUT, DOWN); | |
1175 | PIN_SLP(gpy6-7, INPUT, DOWN); | |
1176 | }; | |
1177 | }; | |
1178 | ||
1179 | &pinctrl_2 { | |
1180 | pinctrl-names = "default"; | |
1181 | pinctrl-0 = <&sleep2>; | |
1182 | ||
1183 | sleep2: sleep-states { | |
1184 | PIN_SLP(gpz-0, INPUT, DOWN); | |
1185 | PIN_SLP(gpz-1, INPUT, DOWN); | |
1186 | PIN_SLP(gpz-2, INPUT, DOWN); | |
1187 | PIN_SLP(gpz-3, INPUT, DOWN); | |
1188 | PIN_SLP(gpz-4, INPUT, DOWN); | |
1189 | PIN_SLP(gpz-5, INPUT, DOWN); | |
1190 | PIN_SLP(gpz-6, INPUT, DOWN); | |
1191 | }; | |
1192 | }; | |
1193 | ||
1194 | &pinctrl_3 { | |
1195 | pinctrl-names = "default"; | |
1196 | pinctrl-0 = <&sleep3>; | |
1197 | ||
1198 | sleep3: sleep-states { | |
1199 | PIN_SLP(gpv0-0, INPUT, DOWN); | |
1200 | PIN_SLP(gpv0-1, INPUT, DOWN); | |
1201 | PIN_SLP(gpv0-2, INPUT, DOWN); | |
1202 | PIN_SLP(gpv0-3, INPUT, DOWN); | |
1203 | PIN_SLP(gpv0-4, INPUT, DOWN); | |
1204 | PIN_SLP(gpv0-5, INPUT, DOWN); | |
1205 | PIN_SLP(gpv0-6, INPUT, DOWN); | |
1206 | PIN_SLP(gpv0-7, INPUT, DOWN); | |
1207 | ||
1208 | PIN_SLP(gpv1-0, INPUT, DOWN); | |
1209 | PIN_SLP(gpv1-1, INPUT, DOWN); | |
1210 | PIN_SLP(gpv1-2, INPUT, DOWN); | |
1211 | PIN_SLP(gpv1-3, INPUT, DOWN); | |
1212 | PIN_SLP(gpv1-4, INPUT, DOWN); | |
1213 | PIN_SLP(gpv1-5, INPUT, DOWN); | |
1214 | PIN_SLP(gpv1-6, INPUT, DOWN); | |
1215 | PIN_SLP(gpv1-7, INPUT, DOWN); | |
1216 | ||
1217 | PIN_SLP(gpv2-0, INPUT, DOWN); | |
1218 | PIN_SLP(gpv2-1, INPUT, DOWN); | |
1219 | PIN_SLP(gpv2-2, INPUT, DOWN); | |
1220 | PIN_SLP(gpv2-3, INPUT, DOWN); | |
1221 | PIN_SLP(gpv2-4, INPUT, DOWN); | |
1222 | PIN_SLP(gpv2-5, INPUT, DOWN); | |
1223 | PIN_SLP(gpv2-6, INPUT, DOWN); | |
1224 | PIN_SLP(gpv2-7, INPUT, DOWN); | |
1225 | ||
1226 | PIN_SLP(gpv3-0, INPUT, DOWN); | |
1227 | PIN_SLP(gpv3-1, INPUT, DOWN); | |
1228 | PIN_SLP(gpv3-2, INPUT, DOWN); | |
1229 | PIN_SLP(gpv3-3, INPUT, DOWN); | |
1230 | PIN_SLP(gpv3-4, INPUT, DOWN); | |
1231 | PIN_SLP(gpv3-5, INPUT, DOWN); | |
1232 | PIN_SLP(gpv3-6, INPUT, DOWN); | |
1233 | PIN_SLP(gpv3-7, INPUT, DOWN); | |
1234 | ||
1235 | PIN_SLP(gpv4-0, INPUT, DOWN); | |
1236 | }; | |
1237 | }; | |
ce9940a9 | 1238 | |
1fe9a942 KK |
1239 | &pwm { |
1240 | pinctrl-0 = <&pwm0_out>; | |
1241 | pinctrl-names = "default"; | |
1242 | samsung,pwm-outputs = <0>; | |
1243 | status = "okay"; | |
1244 | }; | |
1245 | ||
ce9940a9 KK |
1246 | &rtc { |
1247 | status = "okay"; | |
1248 | clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; | |
1249 | clock-names = "rtc", "rtc_src"; | |
1250 | }; | |
1fe9a942 KK |
1251 | |
1252 | &sdhci_2 { | |
1253 | bus-width = <4>; | |
c10d3290 | 1254 | cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; |
1fe9a942 KK |
1255 | cd-inverted; |
1256 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; | |
1257 | pinctrl-names = "default"; | |
1258 | vmmc-supply = <&ldo21_reg>; | |
1259 | status = "okay"; | |
1260 | }; | |
1261 | ||
1262 | &serial_0 { | |
1263 | status = "okay"; | |
1264 | }; | |
1265 | ||
1266 | &serial_1 { | |
1267 | status = "okay"; | |
1268 | }; | |
1269 | ||
1270 | &serial_2 { | |
1271 | status = "okay"; | |
1272 | }; | |
1273 | ||
1274 | &serial_3 { | |
1275 | status = "okay"; | |
1276 | }; | |
1277 | ||
1278 | &spi_1 { | |
1279 | pinctrl-names = "default"; | |
1280 | pinctrl-0 = <&spi1_bus>; | |
c10d3290 | 1281 | cs-gpios = <&gpb 5 GPIO_ACTIVE_HIGH>; |
1fe9a942 KK |
1282 | status = "okay"; |
1283 | ||
26ee29a6 | 1284 | s5c73m3_spi: s5c73m3@0 { |
1fe9a942 KK |
1285 | compatible = "samsung,s5c73m3"; |
1286 | spi-max-frequency = <50000000>; | |
1287 | reg = <0>; | |
1288 | controller-data { | |
1289 | samsung,spi-feedback-delay = <2>; | |
1290 | }; | |
1291 | }; | |
1292 | }; | |
1293 | ||
1294 | &tmu { | |
1295 | vtmu-supply = <&ldo10_reg>; | |
1296 | status = "okay"; | |
1297 | }; |