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0682edaa OJ |
1 | /* |
2 | * Samsung's Exynos4210 based Universal C210 board device tree source | |
3 | * | |
4 | * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Device tree source file for Samsung's Universal C210 board which is based on | |
8 | * Samsung's Exynos4210 rev0 SoC. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | /dts-v1/; | |
3799279f | 16 | #include "exynos4210.dtsi" |
0682edaa OJ |
17 | |
18 | / { | |
19 | model = "Samsung Universal C210 based on Exynos4210 rev0"; | |
8bdb31b4 | 20 | compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4"; |
0682edaa OJ |
21 | |
22 | memory { | |
23 | reg = <0x40000000 0x10000000 | |
24 | 0x50000000 0x10000000>; | |
25 | }; | |
26 | ||
27 | chosen { | |
28 | bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; | |
62d38099 | 29 | stdout-path = &serial_2; |
0682edaa OJ |
30 | }; |
31 | ||
b3205dea SK |
32 | sysram@02020000 { |
33 | smp-sysram@0 { | |
34 | status = "disabled"; | |
35 | }; | |
36 | ||
37 | smp-sysram@5000 { | |
38 | compatible = "samsung,exynos4210-sysram"; | |
39 | reg = <0x5000 0x1000>; | |
40 | }; | |
41 | ||
42 | smp-sysram@1f000 { | |
43 | status = "disabled"; | |
44 | }; | |
45 | }; | |
46 | ||
0682edaa OJ |
47 | mct@10050000 { |
48 | compatible = "none"; | |
49 | }; | |
50 | ||
51 | fixed-rate-clocks { | |
52 | xxti { | |
53 | compatible = "samsung,clock-xxti"; | |
54 | clock-frequency = <0>; | |
55 | }; | |
56 | ||
57 | xusbxti { | |
58 | compatible = "samsung,clock-xusbxti"; | |
59 | clock-frequency = <24000000>; | |
60 | }; | |
61 | }; | |
62 | ||
63 | vemmc_reg: voltage-regulator { | |
64 | compatible = "regulator-fixed"; | |
65 | regulator-name = "VMEM_VDD_2_8V"; | |
66 | regulator-min-microvolt = <2800000>; | |
67 | regulator-max-microvolt = <2800000>; | |
68 | gpio = <&gpe1 3 0>; | |
69 | enable-active-high; | |
70 | }; | |
71 | ||
45e58485 MS |
72 | hsotg@12480000 { |
73 | vusb_d-supply = <&ldo3_reg>; | |
74 | vusb_a-supply = <&ldo8_reg>; | |
75 | status = "okay"; | |
76 | }; | |
77 | ||
0682edaa OJ |
78 | sdhci_emmc: sdhci@12510000 { |
79 | bus-width = <8>; | |
80 | non-removable; | |
81 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; | |
82 | pinctrl-names = "default"; | |
83 | vmmc-supply = <&vemmc_reg>; | |
84 | status = "okay"; | |
adea8296 MS |
85 | }; |
86 | ||
87 | sdhci_sd: sdhci@12530000 { | |
88 | bus-width = <4>; | |
89 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; | |
90 | pinctrl-names = "default"; | |
91 | vmmc-supply = <&ldo5_reg>; | |
92 | cd-gpios = <&gpx3 4 0>; | |
93 | cd-inverted; | |
94 | status = "okay"; | |
0682edaa OJ |
95 | }; |
96 | ||
45e58485 MS |
97 | ehci@12580000 { |
98 | status = "okay"; | |
99 | port@0 { | |
100 | status = "okay"; | |
101 | }; | |
102 | }; | |
103 | ||
104 | ohci@12590000 { | |
105 | status = "okay"; | |
106 | port@0 { | |
107 | status = "okay"; | |
108 | }; | |
109 | }; | |
110 | ||
111 | exynos-usbphy@125B0000 { | |
112 | status = "okay"; | |
113 | }; | |
114 | ||
0682edaa OJ |
115 | serial@13800000 { |
116 | status = "okay"; | |
117 | }; | |
118 | ||
119 | serial@13810000 { | |
120 | status = "okay"; | |
121 | }; | |
122 | ||
123 | serial@13820000 { | |
124 | status = "okay"; | |
125 | }; | |
126 | ||
127 | serial@13830000 { | |
128 | status = "okay"; | |
129 | }; | |
130 | ||
131 | gpio-keys { | |
132 | compatible = "gpio-keys"; | |
133 | ||
134 | vol-up-key { | |
135 | gpios = <&gpx2 0 1>; | |
136 | linux,code = <115>; | |
137 | label = "volume up"; | |
138 | debounce-interval = <1>; | |
139 | }; | |
140 | ||
141 | vol-down-key { | |
142 | gpios = <&gpx2 1 1>; | |
143 | linux,code = <114>; | |
144 | label = "volume down"; | |
145 | debounce-interval = <1>; | |
146 | }; | |
147 | ||
148 | config-key { | |
149 | gpios = <&gpx2 2 1>; | |
150 | linux,code = <171>; | |
151 | label = "config"; | |
152 | debounce-interval = <1>; | |
153 | gpio-key,wakeup; | |
154 | }; | |
155 | ||
156 | camera-key { | |
157 | gpios = <&gpx2 3 1>; | |
158 | linux,code = <212>; | |
159 | label = "camera"; | |
160 | debounce-interval = <1>; | |
161 | }; | |
162 | ||
163 | power-key { | |
164 | gpios = <&gpx2 7 1>; | |
165 | linux,code = <116>; | |
166 | label = "power"; | |
167 | debounce-interval = <1>; | |
168 | gpio-key,wakeup; | |
169 | }; | |
170 | ||
171 | ok-key { | |
172 | gpios = <&gpx3 5 1>; | |
173 | linux,code = <352>; | |
174 | label = "ok"; | |
175 | debounce-interval = <1>; | |
176 | }; | |
177 | }; | |
178 | ||
179 | tsp_reg: voltage-regulator { | |
180 | compatible = "regulator-fixed"; | |
181 | regulator-name = "TSP_2_8V"; | |
182 | regulator-min-microvolt = <2800000>; | |
183 | regulator-max-microvolt = <2800000>; | |
184 | gpio = <&gpe2 3 0>; | |
185 | enable-active-high; | |
186 | }; | |
187 | ||
188 | i2c@13890000 { | |
189 | samsung,i2c-sda-delay = <100>; | |
190 | samsung,i2c-slave-addr = <0x10>; | |
191 | samsung,i2c-max-bus-freq = <100000>; | |
192 | pinctrl-0 = <&i2c3_bus>; | |
193 | pinctrl-names = "default"; | |
194 | status = "okay"; | |
195 | ||
196 | tsp@4a { | |
197 | /* TBD: Atmel maXtouch touchscreen */ | |
198 | reg = <0x4a>; | |
199 | }; | |
200 | }; | |
201 | ||
202 | i2c@138B0000 { | |
203 | samsung,i2c-sda-delay = <100>; | |
204 | samsung,i2c-slave-addr = <0x10>; | |
205 | samsung,i2c-max-bus-freq = <100000>; | |
206 | pinctrl-0 = <&i2c5_bus>; | |
207 | pinctrl-names = "default"; | |
208 | status = "okay"; | |
209 | ||
210 | vdd_arm_reg: pmic@60 { | |
211 | compatible = "maxim,max8952"; | |
212 | reg = <0x60>; | |
213 | ||
214 | max8952,vid-gpios = <&gpx0 3 0>, <&gpx0 4 0>; | |
215 | max8952,default-mode = <0>; | |
216 | max8952,dvs-mode-microvolt = <1250000>, <1200000>, | |
217 | <1050000>, <950000>; | |
218 | max8952,sync-freq = <0>; | |
219 | max8952,ramp-speed = <0>; | |
220 | ||
221 | regulator-name = "vdd_arm"; | |
222 | regulator-min-microvolt = <770000>; | |
223 | regulator-max-microvolt = <1400000>; | |
224 | regulator-always-on; | |
225 | regulator-boot-on; | |
226 | }; | |
227 | ||
228 | pmic@66 { | |
229 | compatible = "national,lp3974"; | |
230 | reg = <0x66>; | |
231 | ||
232 | max8998,pmic-buck1-default-dvs-idx = <0>; | |
233 | max8998,pmic-buck1-dvs-gpios = <&gpx0 5 0>, | |
234 | <&gpx0 6 0>; | |
235 | max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>, | |
236 | <1100000>, <1000000>; | |
237 | ||
238 | max8998,pmic-buck2-default-dvs-idx = <0>; | |
239 | max8998,pmic-buck2-dvs-gpio = <&gpe2 0 0>; | |
240 | max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>; | |
241 | ||
242 | regulators { | |
243 | ldo2_reg: LDO2 { | |
244 | regulator-name = "VALIVE_1.2V"; | |
245 | regulator-min-microvolt = <1200000>; | |
246 | regulator-max-microvolt = <1200000>; | |
247 | regulator-always-on; | |
248 | }; | |
249 | ||
250 | ldo3_reg: LDO3 { | |
251 | regulator-name = "VUSB+MIPI_1.1V"; | |
252 | regulator-min-microvolt = <1100000>; | |
253 | regulator-max-microvolt = <1100000>; | |
45e58485 | 254 | regulator-always-on; |
0682edaa OJ |
255 | }; |
256 | ||
257 | ldo4_reg: LDO4 { | |
258 | regulator-name = "VADC_3.3V"; | |
259 | regulator-min-microvolt = <3300000>; | |
260 | regulator-max-microvolt = <3300000>; | |
261 | }; | |
262 | ||
263 | ldo5_reg: LDO5 { | |
264 | regulator-name = "VTF_2.8V"; | |
265 | regulator-min-microvolt = <2800000>; | |
266 | regulator-max-microvolt = <2800000>; | |
267 | }; | |
268 | ||
269 | ldo6_reg: LDO6 { | |
270 | regulator-name = "LDO6"; | |
271 | regulator-min-microvolt = <2000000>; | |
272 | regulator-max-microvolt = <2000000>; | |
273 | }; | |
274 | ||
275 | ldo7_reg: LDO7 { | |
276 | regulator-name = "VLCD+VMIPI_1.8V"; | |
277 | regulator-min-microvolt = <1800000>; | |
278 | regulator-max-microvolt = <1800000>; | |
279 | }; | |
280 | ||
281 | ldo8_reg: LDO8 { | |
282 | regulator-name = "VUSB+VDAC_3.3V"; | |
283 | regulator-min-microvolt = <3300000>; | |
284 | regulator-max-microvolt = <3300000>; | |
45e58485 | 285 | regulator-always-on; |
0682edaa OJ |
286 | }; |
287 | ||
288 | ldo9_reg: LDO9 { | |
289 | regulator-name = "VCC_2.8V"; | |
290 | regulator-min-microvolt = <2800000>; | |
291 | regulator-max-microvolt = <2800000>; | |
292 | regulator-always-on; | |
293 | }; | |
294 | ||
295 | ldo10_reg: LDO10 { | |
296 | regulator-name = "VPLL_1.1V"; | |
297 | regulator-min-microvolt = <1100000>; | |
298 | regulator-max-microvolt = <1100000>; | |
299 | regulator-boot-on; | |
300 | regulator-always-on; | |
301 | }; | |
302 | ||
303 | ldo11_reg: LDO11 { | |
304 | regulator-name = "CAM_AF_3.3V"; | |
305 | regulator-min-microvolt = <3300000>; | |
306 | regulator-max-microvolt = <3300000>; | |
307 | }; | |
308 | ||
309 | ldo12_reg: LDO12 { | |
310 | regulator-name = "PS_2.8V"; | |
311 | regulator-min-microvolt = <2800000>; | |
312 | regulator-max-microvolt = <2800000>; | |
313 | }; | |
314 | ||
315 | ldo13_reg: LDO13 { | |
316 | regulator-name = "VHIC_1.2V"; | |
317 | regulator-min-microvolt = <1200000>; | |
318 | regulator-max-microvolt = <1200000>; | |
319 | }; | |
320 | ||
321 | ldo14_reg: LDO14 { | |
322 | regulator-name = "CAM_I_HOST_1.8V"; | |
323 | regulator-min-microvolt = <1800000>; | |
324 | regulator-max-microvolt = <1800000>; | |
325 | }; | |
326 | ||
327 | ldo15_reg: LDO15 { | |
328 | regulator-name = "CAM_S_DIG+FM33_CORE_1.2V"; | |
329 | regulator-min-microvolt = <1200000>; | |
330 | regulator-max-microvolt = <1200000>; | |
331 | }; | |
332 | ||
333 | ldo16_reg: LDO16 { | |
334 | regulator-name = "CAM_S_ANA_2.8V"; | |
335 | regulator-min-microvolt = <2800000>; | |
336 | regulator-max-microvolt = <2800000>; | |
337 | }; | |
338 | ||
339 | ldo17_reg: LDO17 { | |
340 | regulator-name = "VCC_3.0V_LCD"; | |
341 | regulator-min-microvolt = <3000000>; | |
342 | regulator-max-microvolt = <3000000>; | |
343 | }; | |
344 | ||
345 | buck1_reg: BUCK1 { | |
346 | regulator-name = "VINT_1.1V"; | |
347 | regulator-min-microvolt = <750000>; | |
348 | regulator-max-microvolt = <1500000>; | |
349 | regulator-boot-on; | |
350 | regulator-always-on; | |
351 | }; | |
352 | ||
353 | buck2_reg: BUCK2 { | |
354 | regulator-name = "VG3D_1.1V"; | |
355 | regulator-min-microvolt = <750000>; | |
356 | regulator-max-microvolt = <1500000>; | |
357 | regulator-boot-on; | |
358 | }; | |
359 | ||
360 | buck3_reg: BUCK3 { | |
361 | regulator-name = "VCC_1.8V"; | |
362 | regulator-min-microvolt = <1800000>; | |
363 | regulator-max-microvolt = <1800000>; | |
364 | regulator-always-on; | |
365 | }; | |
366 | ||
367 | buck4_reg: BUCK4 { | |
368 | regulator-name = "VMEM_1.2V"; | |
369 | regulator-min-microvolt = <1200000>; | |
370 | regulator-max-microvolt = <1200000>; | |
371 | regulator-always-on; | |
372 | }; | |
373 | ||
374 | ap32khz_reg: EN32KHz-AP { | |
375 | regulator-name = "32KHz AP"; | |
376 | regulator-always-on; | |
377 | }; | |
378 | ||
379 | cp32khz_reg: EN32KHz-CP { | |
380 | regulator-name = "32KHz CP"; | |
381 | }; | |
382 | ||
383 | vichg_reg: ENVICHG { | |
384 | regulator-name = "VICHG"; | |
385 | }; | |
386 | ||
387 | safeout1_reg: ESAFEOUT1 { | |
388 | regulator-name = "SAFEOUT1"; | |
389 | regulator-always-on; | |
390 | }; | |
391 | ||
392 | safeout2_reg: ESAFEOUT2 { | |
393 | regulator-name = "SAFEOUT2"; | |
394 | regulator-boot-on; | |
395 | }; | |
396 | }; | |
397 | }; | |
398 | }; | |
399 | ||
ffff29d1 AH |
400 | spi-lcd { |
401 | compatible = "spi-gpio"; | |
402 | #address-cells = <1>; | |
403 | #size-cells = <0>; | |
404 | ||
405 | gpio-sck = <&gpy3 1 0>; | |
406 | gpio-mosi = <&gpy3 3 0>; | |
407 | num-chipselects = <1>; | |
408 | cs-gpios = <&gpy4 3 0>; | |
409 | ||
410 | lcd@0 { | |
411 | compatible = "samsung,ld9040"; | |
412 | reg = <0>; | |
413 | vdd3-supply = <&ldo7_reg>; | |
414 | vci-supply = <&ldo17_reg>; | |
415 | reset-gpios = <&gpy4 5 0>; | |
416 | spi-max-frequency = <1200000>; | |
417 | spi-cpol; | |
418 | spi-cpha; | |
419 | power-on-delay = <10>; | |
420 | reset-delay = <10>; | |
421 | panel-width-mm = <90>; | |
422 | panel-height-mm = <154>; | |
423 | display-timings { | |
424 | timing { | |
425 | clock-frequency = <23492370>; | |
426 | hactive = <480>; | |
427 | vactive = <800>; | |
428 | hback-porch = <16>; | |
429 | hfront-porch = <16>; | |
430 | vback-porch = <2>; | |
431 | vfront-porch = <28>; | |
432 | hsync-len = <2>; | |
433 | vsync-len = <1>; | |
434 | hsync-active = <0>; | |
435 | vsync-active = <0>; | |
436 | de-active = <0>; | |
437 | pixelclk-active = <0>; | |
438 | }; | |
439 | }; | |
440 | port { | |
441 | lcd_ep: endpoint { | |
442 | remote-endpoint = <&fimd_dpi_ep>; | |
443 | }; | |
444 | }; | |
445 | }; | |
446 | }; | |
447 | ||
621c5d66 AH |
448 | fimd: fimd@11c00000 { |
449 | pinctrl-0 = <&lcd_clk>, <&lcd_data24>; | |
450 | pinctrl-names = "default"; | |
451 | status = "okay"; | |
452 | samsung,invert-vden; | |
453 | samsung,invert-vclk; | |
ffff29d1 AH |
454 | #address-cells = <1>; |
455 | #size-cells = <0>; | |
456 | port@3 { | |
457 | reg = <3>; | |
458 | fimd_dpi_ep: endpoint { | |
459 | remote-endpoint = <&lcd_ep>; | |
621c5d66 AH |
460 | }; |
461 | }; | |
462 | }; | |
463 | ||
0682edaa OJ |
464 | pwm@139D0000 { |
465 | compatible = "samsung,s5p6440-pwm"; | |
466 | status = "okay"; | |
467 | }; | |
9afc343f MS |
468 | |
469 | camera { | |
470 | status = "okay"; | |
471 | ||
472 | pinctrl-names = "default"; | |
473 | pinctrl-0 = <>; | |
474 | ||
475 | fimc_0: fimc@11800000 { | |
476 | status = "okay"; | |
0357a443 SN |
477 | assigned-clocks = <&clock CLK_MOUT_FIMC0>, |
478 | <&clock CLK_SCLK_FIMC0>; | |
479 | assigned-clock-parents = <&clock CLK_SCLK_MPLL>; | |
480 | assigned-clock-rates = <0>, <160000000>; | |
9afc343f MS |
481 | }; |
482 | ||
483 | fimc_1: fimc@11810000 { | |
484 | status = "okay"; | |
0357a443 SN |
485 | assigned-clocks = <&clock CLK_MOUT_FIMC1>, |
486 | <&clock CLK_SCLK_FIMC1>; | |
487 | assigned-clock-parents = <&clock CLK_SCLK_MPLL>; | |
488 | assigned-clock-rates = <0>, <160000000>; | |
9afc343f MS |
489 | }; |
490 | ||
491 | fimc_2: fimc@11820000 { | |
492 | status = "okay"; | |
0357a443 SN |
493 | assigned-clocks = <&clock CLK_MOUT_FIMC2>, |
494 | <&clock CLK_SCLK_FIMC2>; | |
495 | assigned-clock-parents = <&clock CLK_SCLK_MPLL>; | |
496 | assigned-clock-rates = <0>, <160000000>; | |
9afc343f MS |
497 | }; |
498 | ||
499 | fimc_3: fimc@11830000 { | |
500 | status = "okay"; | |
0357a443 SN |
501 | assigned-clocks = <&clock CLK_MOUT_FIMC3>, |
502 | <&clock CLK_SCLK_FIMC3>; | |
503 | assigned-clock-parents = <&clock CLK_SCLK_MPLL>; | |
504 | assigned-clock-rates = <0>, <160000000>; | |
9afc343f MS |
505 | }; |
506 | }; | |
0682edaa | 507 | }; |
22c98592 BZ |
508 | |
509 | &mdma1 { | |
510 | reg = <0x12840000 0x1000>; | |
511 | }; |