ARM: dts: Update clocks entry in MFC binding documentation
[linux-2.6-block.git] / arch / arm / boot / dts / exynos4.dtsi
CommitLineData
b571abb3
TF
1/*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
3799279f 22#include "skeleton.dtsi"
b571abb3
TF
23
24/ {
25 interrupt-parent = <&gic>;
26
27 aliases {
28 spi0 = &spi_0;
29 spi1 = &spi_1;
30 spi2 = &spi_2;
34db4990
DA
31 i2c0 = &i2c_0;
32 i2c1 = &i2c_1;
33 i2c2 = &i2c_2;
34 i2c3 = &i2c_3;
35 i2c4 = &i2c_4;
36 i2c5 = &i2c_5;
37 i2c6 = &i2c_6;
38 i2c7 = &i2c_7;
d1b8a41d
SN
39 csis0 = &csis_0;
40 csis1 = &csis_1;
41 fimc0 = &fimc_0;
42 fimc1 = &fimc_1;
43 fimc2 = &fimc_2;
44 fimc3 = &fimc_3;
b571abb3
TF
45 };
46
096ee6ad
TA
47 chipid@10000000 {
48 compatible = "samsung,exynos4210-chipid";
49 reg = <0x10000000 0x100>;
50 };
51
91d88f03
TF
52 pd_mfc: mfc-power-domain@10023C40 {
53 compatible = "samsung,exynos4210-pd";
54 reg = <0x10023C40 0x20>;
55 };
56
57 pd_g3d: g3d-power-domain@10023C60 {
58 compatible = "samsung,exynos4210-pd";
59 reg = <0x10023C60 0x20>;
60 };
61
62 pd_lcd0: lcd0-power-domain@10023C80 {
63 compatible = "samsung,exynos4210-pd";
64 reg = <0x10023C80 0x20>;
65 };
66
67 pd_tv: tv-power-domain@10023C20 {
68 compatible = "samsung,exynos4210-pd";
69 reg = <0x10023C20 0x20>;
70 };
71
72 pd_cam: cam-power-domain@10023C00 {
73 compatible = "samsung,exynos4210-pd";
74 reg = <0x10023C00 0x20>;
75 };
76
77 pd_gps: gps-power-domain@10023CE0 {
78 compatible = "samsung,exynos4210-pd";
79 reg = <0x10023CE0 0x20>;
b571abb3
TF
80 };
81
82 gic:interrupt-controller@10490000 {
83 compatible = "arm,cortex-a9-gic";
84 #interrupt-cells = <3>;
85 interrupt-controller;
86 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
87 };
88
89 combiner:interrupt-controller@10440000 {
90 compatible = "samsung,exynos4210-combiner";
91 #interrupt-cells = <2>;
92 interrupt-controller;
93 reg = <0x10440000 0x1000>;
94 };
95
a64b1b22
SN
96 sys_reg: sysreg {
97 compatible = "samsung,exynos4-sysreg", "syscon";
98 reg = <0x10010000 0x400>;
99 };
100
d1b8a41d
SN
101 camera {
102 compatible = "samsung,fimc", "simple-bus";
103 status = "disabled";
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges;
107
108 clock_cam: clock-controller {
109 #clock-cells = <1>;
110 };
111
112 fimc_0: fimc@11800000 {
113 compatible = "samsung,exynos4210-fimc";
114 reg = <0x11800000 0x1000>;
115 interrupts = <0 84 0>;
116 clocks = <&clock 256>, <&clock 128>;
117 clock-names = "fimc", "sclk_fimc";
118 samsung,power-domain = <&pd_cam>;
119 samsung,sysreg = <&sys_reg>;
120 status = "disabled";
121 };
122
123 fimc_1: fimc@11810000 {
124 compatible = "samsung,exynos4210-fimc";
125 reg = <0x11810000 0x1000>;
126 interrupts = <0 85 0>;
127 clocks = <&clock 257>, <&clock 129>;
128 clock-names = "fimc", "sclk_fimc";
129 samsung,power-domain = <&pd_cam>;
130 samsung,sysreg = <&sys_reg>;
131 status = "disabled";
132 };
133
134 fimc_2: fimc@11820000 {
135 compatible = "samsung,exynos4210-fimc";
136 reg = <0x11820000 0x1000>;
137 interrupts = <0 86 0>;
138 clocks = <&clock 258>, <&clock 130>;
139 clock-names = "fimc", "sclk_fimc";
140 samsung,power-domain = <&pd_cam>;
141 samsung,sysreg = <&sys_reg>;
142 status = "disabled";
143 };
144
145 fimc_3: fimc@11830000 {
146 compatible = "samsung,exynos4210-fimc";
147 reg = <0x11830000 0x1000>;
148 interrupts = <0 87 0>;
149 clocks = <&clock 259>, <&clock 131>;
150 clock-names = "fimc", "sclk_fimc";
151 samsung,power-domain = <&pd_cam>;
152 samsung,sysreg = <&sys_reg>;
153 status = "disabled";
154 };
155
156 csis_0: csis@11880000 {
157 compatible = "samsung,exynos4210-csis";
158 reg = <0x11880000 0x4000>;
159 interrupts = <0 78 0>;
160 clocks = <&clock 260>, <&clock 134>;
161 clock-names = "csis", "sclk_csis";
162 bus-width = <4>;
163 samsung,power-domain = <&pd_cam>;
164 status = "disabled";
165 #address-cells = <1>;
166 #size-cells = <0>;
167 };
168
169 csis_1: csis@11890000 {
170 compatible = "samsung,exynos4210-csis";
171 reg = <0x11890000 0x4000>;
172 interrupts = <0 80 0>;
173 clocks = <&clock 261>, <&clock 135>;
174 clock-names = "csis", "sclk_csis";
175 bus-width = <2>;
176 samsung,power-domain = <&pd_cam>;
177 status = "disabled";
178 #address-cells = <1>;
179 #size-cells = <0>;
180 };
181 };
182
b571abb3
TF
183 watchdog@10060000 {
184 compatible = "samsung,s3c2410-wdt";
185 reg = <0x10060000 0x100>;
186 interrupts = <0 43 0>;
7ad34337
TA
187 clocks = <&clock 345>;
188 clock-names = "watchdog";
c9e23f00 189 status = "disabled";
b571abb3
TF
190 };
191
192 rtc@10070000 {
193 compatible = "samsung,s3c6410-rtc";
194 reg = <0x10070000 0x100>;
195 interrupts = <0 44 0>, <0 45 0>;
7ad34337
TA
196 clocks = <&clock 346>;
197 clock-names = "rtc";
c9e23f00 198 status = "disabled";
b571abb3
TF
199 };
200
201 keypad@100A0000 {
202 compatible = "samsung,s5pv210-keypad";
203 reg = <0x100A0000 0x100>;
204 interrupts = <0 109 0>;
7ad34337
TA
205 clocks = <&clock 347>;
206 clock-names = "keypad";
c9e23f00 207 status = "disabled";
b571abb3
TF
208 };
209
210 sdhci@12510000 {
211 compatible = "samsung,exynos4210-sdhci";
212 reg = <0x12510000 0x100>;
213 interrupts = <0 73 0>;
7ad34337
TA
214 clocks = <&clock 297>, <&clock 145>;
215 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 216 status = "disabled";
b571abb3
TF
217 };
218
219 sdhci@12520000 {
220 compatible = "samsung,exynos4210-sdhci";
221 reg = <0x12520000 0x100>;
222 interrupts = <0 74 0>;
7ad34337
TA
223 clocks = <&clock 298>, <&clock 146>;
224 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 225 status = "disabled";
b571abb3
TF
226 };
227
228 sdhci@12530000 {
229 compatible = "samsung,exynos4210-sdhci";
230 reg = <0x12530000 0x100>;
231 interrupts = <0 75 0>;
7ad34337
TA
232 clocks = <&clock 299>, <&clock 147>;
233 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 234 status = "disabled";
b571abb3
TF
235 };
236
237 sdhci@12540000 {
238 compatible = "samsung,exynos4210-sdhci";
239 reg = <0x12540000 0x100>;
240 interrupts = <0 76 0>;
7ad34337
TA
241 clocks = <&clock 300>, <&clock 148>;
242 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 243 status = "disabled";
b571abb3
TF
244 };
245
20901f74
SK
246 mfc: codec@13400000 {
247 compatible = "samsung,mfc-v5";
248 reg = <0x13400000 0x10000>;
249 interrupts = <0 94 0>;
250 samsung,power-domain = <&pd_mfc>;
e636f0a7
SK
251 clocks = <&clock 170>, <&clock 273>;
252 clock-names = "sclk_mfc", "mfc";
20901f74
SK
253 status = "disabled";
254 };
255
b571abb3
TF
256 serial@13800000 {
257 compatible = "samsung,exynos4210-uart";
258 reg = <0x13800000 0x100>;
259 interrupts = <0 52 0>;
7ad34337
TA
260 clocks = <&clock 312>, <&clock 151>;
261 clock-names = "uart", "clk_uart_baud0";
c9e23f00 262 status = "disabled";
b571abb3
TF
263 };
264
265 serial@13810000 {
266 compatible = "samsung,exynos4210-uart";
267 reg = <0x13810000 0x100>;
268 interrupts = <0 53 0>;
7ad34337
TA
269 clocks = <&clock 313>, <&clock 152>;
270 clock-names = "uart", "clk_uart_baud0";
c9e23f00 271 status = "disabled";
b571abb3
TF
272 };
273
274 serial@13820000 {
275 compatible = "samsung,exynos4210-uart";
276 reg = <0x13820000 0x100>;
277 interrupts = <0 54 0>;
7ad34337
TA
278 clocks = <&clock 314>, <&clock 153>;
279 clock-names = "uart", "clk_uart_baud0";
c9e23f00 280 status = "disabled";
b571abb3
TF
281 };
282
283 serial@13830000 {
284 compatible = "samsung,exynos4210-uart";
285 reg = <0x13830000 0x100>;
286 interrupts = <0 55 0>;
7ad34337
TA
287 clocks = <&clock 315>, <&clock 154>;
288 clock-names = "uart", "clk_uart_baud0";
c9e23f00 289 status = "disabled";
b571abb3
TF
290 };
291
34db4990 292 i2c_0: i2c@13860000 {
1b198d56
TF
293 #address-cells = <1>;
294 #size-cells = <0>;
b571abb3
TF
295 compatible = "samsung,s3c2440-i2c";
296 reg = <0x13860000 0x100>;
297 interrupts = <0 58 0>;
7ad34337
TA
298 clocks = <&clock 317>;
299 clock-names = "i2c";
045c8f63
TA
300 pinctrl-names = "default";
301 pinctrl-0 = <&i2c0_bus>;
c9e23f00 302 status = "disabled";
b571abb3
TF
303 };
304
34db4990 305 i2c_1: i2c@13870000 {
1b198d56
TF
306 #address-cells = <1>;
307 #size-cells = <0>;
b571abb3
TF
308 compatible = "samsung,s3c2440-i2c";
309 reg = <0x13870000 0x100>;
310 interrupts = <0 59 0>;
7ad34337
TA
311 clocks = <&clock 318>;
312 clock-names = "i2c";
045c8f63
TA
313 pinctrl-names = "default";
314 pinctrl-0 = <&i2c1_bus>;
c9e23f00 315 status = "disabled";
b571abb3
TF
316 };
317
34db4990 318 i2c_2: i2c@13880000 {
1b198d56
TF
319 #address-cells = <1>;
320 #size-cells = <0>;
b571abb3
TF
321 compatible = "samsung,s3c2440-i2c";
322 reg = <0x13880000 0x100>;
323 interrupts = <0 60 0>;
7ad34337
TA
324 clocks = <&clock 319>;
325 clock-names = "i2c";
c9e23f00 326 status = "disabled";
b571abb3
TF
327 };
328
34db4990 329 i2c_3: i2c@13890000 {
1b198d56
TF
330 #address-cells = <1>;
331 #size-cells = <0>;
b571abb3
TF
332 compatible = "samsung,s3c2440-i2c";
333 reg = <0x13890000 0x100>;
334 interrupts = <0 61 0>;
7ad34337
TA
335 clocks = <&clock 320>;
336 clock-names = "i2c";
c9e23f00 337 status = "disabled";
b571abb3
TF
338 };
339
34db4990 340 i2c_4: i2c@138A0000 {
1b198d56
TF
341 #address-cells = <1>;
342 #size-cells = <0>;
b571abb3
TF
343 compatible = "samsung,s3c2440-i2c";
344 reg = <0x138A0000 0x100>;
345 interrupts = <0 62 0>;
7ad34337
TA
346 clocks = <&clock 321>;
347 clock-names = "i2c";
c9e23f00 348 status = "disabled";
b571abb3
TF
349 };
350
34db4990 351 i2c_5: i2c@138B0000 {
1b198d56
TF
352 #address-cells = <1>;
353 #size-cells = <0>;
b571abb3
TF
354 compatible = "samsung,s3c2440-i2c";
355 reg = <0x138B0000 0x100>;
356 interrupts = <0 63 0>;
7ad34337
TA
357 clocks = <&clock 322>;
358 clock-names = "i2c";
c9e23f00 359 status = "disabled";
b571abb3
TF
360 };
361
34db4990 362 i2c_6: i2c@138C0000 {
1b198d56
TF
363 #address-cells = <1>;
364 #size-cells = <0>;
b571abb3
TF
365 compatible = "samsung,s3c2440-i2c";
366 reg = <0x138C0000 0x100>;
367 interrupts = <0 64 0>;
7ad34337
TA
368 clocks = <&clock 323>;
369 clock-names = "i2c";
c9e23f00 370 status = "disabled";
b571abb3
TF
371 };
372
34db4990 373 i2c_7: i2c@138D0000 {
1b198d56
TF
374 #address-cells = <1>;
375 #size-cells = <0>;
b571abb3
TF
376 compatible = "samsung,s3c2440-i2c";
377 reg = <0x138D0000 0x100>;
378 interrupts = <0 65 0>;
7ad34337
TA
379 clocks = <&clock 324>;
380 clock-names = "i2c";
c9e23f00 381 status = "disabled";
b571abb3
TF
382 };
383
384 spi_0: spi@13920000 {
385 compatible = "samsung,exynos4210-spi";
386 reg = <0x13920000 0x100>;
387 interrupts = <0 66 0>;
48b3af1e
SN
388 dmas = <&pdma0 7>, <&pdma0 6>;
389 dma-names = "tx", "rx";
b571abb3
TF
390 #address-cells = <1>;
391 #size-cells = <0>;
7ad34337
TA
392 clocks = <&clock 327>, <&clock 159>;
393 clock-names = "spi", "spi_busclk0";
045c8f63
TA
394 pinctrl-names = "default";
395 pinctrl-0 = <&spi0_bus>;
c9e23f00 396 status = "disabled";
b571abb3
TF
397 };
398
399 spi_1: spi@13930000 {
400 compatible = "samsung,exynos4210-spi";
401 reg = <0x13930000 0x100>;
402 interrupts = <0 67 0>;
48b3af1e
SN
403 dmas = <&pdma1 7>, <&pdma1 6>;
404 dma-names = "tx", "rx";
b571abb3
TF
405 #address-cells = <1>;
406 #size-cells = <0>;
7ad34337
TA
407 clocks = <&clock 328>, <&clock 160>;
408 clock-names = "spi", "spi_busclk0";
045c8f63
TA
409 pinctrl-names = "default";
410 pinctrl-0 = <&spi1_bus>;
c9e23f00 411 status = "disabled";
b571abb3
TF
412 };
413
414 spi_2: spi@13940000 {
415 compatible = "samsung,exynos4210-spi";
416 reg = <0x13940000 0x100>;
417 interrupts = <0 68 0>;
48b3af1e
SN
418 dmas = <&pdma0 9>, <&pdma0 8>;
419 dma-names = "tx", "rx";
b571abb3
TF
420 #address-cells = <1>;
421 #size-cells = <0>;
7ad34337
TA
422 clocks = <&clock 329>, <&clock 161>;
423 clock-names = "spi", "spi_busclk0";
045c8f63
TA
424 pinctrl-names = "default";
425 pinctrl-0 = <&spi2_bus>;
c9e23f00 426 status = "disabled";
b571abb3
TF
427 };
428
cc4193ea
TF
429 pwm@139D0000 {
430 compatible = "samsung,exynos4210-pwm";
431 reg = <0x139D0000 0x1000>;
432 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
433 #pwm-cells = <2>;
434 status = "disabled";
435 };
436
b571abb3
TF
437 amba {
438 #address-cells = <1>;
439 #size-cells = <1>;
440 compatible = "arm,amba-bus";
441 interrupt-parent = <&gic>;
442 ranges;
443
444 pdma0: pdma@12680000 {
445 compatible = "arm,pl330", "arm,primecell";
446 reg = <0x12680000 0x1000>;
447 interrupts = <0 35 0>;
7ad34337
TA
448 clocks = <&clock 292>;
449 clock-names = "apb_pclk";
0a96d4d3
PV
450 #dma-cells = <1>;
451 #dma-channels = <8>;
452 #dma-requests = <32>;
b571abb3
TF
453 };
454
455 pdma1: pdma@12690000 {
456 compatible = "arm,pl330", "arm,primecell";
457 reg = <0x12690000 0x1000>;
458 interrupts = <0 36 0>;
7ad34337
TA
459 clocks = <&clock 293>;
460 clock-names = "apb_pclk";
0a96d4d3
PV
461 #dma-cells = <1>;
462 #dma-channels = <8>;
463 #dma-requests = <32>;
b571abb3 464 };
f7e758af
BZ
465
466 mdma1: mdma@12850000 {
467 compatible = "arm,pl330", "arm,primecell";
468 reg = <0x12850000 0x1000>;
469 interrupts = <0 34 0>;
7ad34337
TA
470 clocks = <&clock 279>;
471 clock-names = "apb_pclk";
0a96d4d3
PV
472 #dma-cells = <1>;
473 #dma-channels = <8>;
474 #dma-requests = <1>;
f7e758af 475 };
b571abb3 476 };
768c3a56
VS
477
478 fimd: fimd@11c00000 {
479 compatible = "samsung,exynos4210-fimd";
480 interrupt-parent = <&combiner>;
481 reg = <0x11c00000 0x20000>;
482 interrupt-names = "fifo", "vsync", "lcd_sys";
483 interrupts = <11 0>, <11 1>, <11 2>;
484 clocks = <&clock 140>, <&clock 283>;
485 clock-names = "sclk_fimd", "fimd";
486 samsung,power-domain = <&pd_lcd0>;
487 status = "disabled";
488 };
b571abb3 489};