[linux-2.6-block.git] / arch / arm / boot / dts / exynos4.dtsi

/*
 * Samsung's Exynos4 SoC series common device tree source
 *
 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 * Copyright (c) 2010-2011 Linaro Ltd.
 *		www.linaro.org
 *
 * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
 * SoCs from Exynos4 series can include this file and provide values for SoCs
 * specfic bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
 * nodes can be added to this file.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <dt-bindings/clock/exynos4.h>
#include <dt-bindings/clock/exynos-audss-clk.h>
#include "skeleton.dtsi"

/ {
	interrupt-parent = <&gic>;

	aliases {
		spi0 = &spi_0;
		spi1 = &spi_1;
		spi2 = &spi_2;
		i2c0 = &i2c_0;
		i2c1 = &i2c_1;
		i2c2 = &i2c_2;
		i2c3 = &i2c_3;
		i2c4 = &i2c_4;
		i2c5 = &i2c_5;
		i2c6 = &i2c_6;
		i2c7 = &i2c_7;
		csis0 = &csis_0;
		csis1 = &csis_1;
		fimc0 = &fimc_0;
		fimc1 = &fimc_1;
		fimc2 = &fimc_2;
		fimc3 = &fimc_3;
	};

	clock_audss: clock-controller@03810000 {
		compatible = "samsung,exynos4210-audss-clock";
		reg = <0x03810000 0x0C>;
		#clock-cells = <1>;
	};

	i2s0: i2s@03830000 {
		compatible = "samsung,s5pv210-i2s";
		reg = <0x03830000 0x100>;
		clocks = <&clock_audss EXYNOS_I2S_BUS>;
		clock-names = "iis";
		dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
		dma-names = "tx", "rx", "tx-sec";
		samsung,idma-addr = <0x03000000>;
		status = "disabled";
	};

	chipid@10000000 {
		compatible = "samsung,exynos4210-chipid";
		reg = <0x10000000 0x100>;
	};

	mipi_phy: video-phy@10020710 {
		compatible = "samsung,s5pv210-mipi-video-phy";
		reg = <0x10020710 8>;
		#phy-cells = <1>;
	};

	pd_mfc: mfc-power-domain@10023C40 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C40 0x20>;
	};

	pd_g3d: g3d-power-domain@10023C60 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C60 0x20>;
	};

	pd_lcd0: lcd0-power-domain@10023C80 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C80 0x20>;
	};

	pd_tv: tv-power-domain@10023C20 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C20 0x20>;
	};

	pd_cam: cam-power-domain@10023C00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C00 0x20>;
	};

	pd_gps: gps-power-domain@10023CE0 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023CE0 0x20>;
	};

	pd_gps_alive: gps-alive-power-domain@10023D00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023D00 0x20>;
	};

	gic: interrupt-controller@10490000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
	};

	combiner: interrupt-controller@10440000 {
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0x10440000 0x1000>;
	};

	sys_reg: syscon@10010000 {
		compatible = "samsung,exynos4-sysreg", "syscon";
		reg = <0x10010000 0x400>;
	};

	pmu_system_controller: system-controller@10020000 {
		compatible = "samsung,exynos4210-pmu", "syscon";
		reg = <0x10020000 0x4000>;
	};

	dsi_0: dsi@11C80000 {
		compatible = "samsung,exynos4210-mipi-dsi";
		reg = <0x11C80000 0x10000>;
		interrupts = <0 79 0>;
		samsung,power-domain = <&pd_lcd0>;
		phys = <&mipi_phy 1>;
		phy-names = "dsim";
		clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
		clock-names = "bus_clk", "pll_clk";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	camera {
		compatible = "samsung,fimc", "simple-bus";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <1>;
		#clock-cells = <1>;
		clock-output-names = "cam_a_clkout", "cam_b_clkout";
		ranges;

		fimc_0: fimc@11800000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11800000 0x1000>;
			interrupts = <0 84 0>;
			clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_1: fimc@11810000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11810000 0x1000>;
			interrupts = <0 85 0>;
			clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_2: fimc@11820000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11820000 0x1000>;
			interrupts = <0 86 0>;
			clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_3: fimc@11830000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11830000 0x1000>;
			interrupts = <0 87 0>;
			clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		csis_0: csis@11880000 {
			compatible = "samsung,exynos4210-csis";
			reg = <0x11880000 0x4000>;
			interrupts = <0 78 0>;
			clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
			clock-names = "csis", "sclk_csis";
			bus-width = <4>;
			samsung,power-domain = <&pd_cam>;
			phys = <&mipi_phy 0>;
			phy-names = "csis";
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		csis_1: csis@11890000 {
			compatible = "samsung,exynos4210-csis";
			reg = <0x11890000 0x4000>;
			interrupts = <0 80 0>;
			clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
			clock-names = "csis", "sclk_csis";
			bus-width = <2>;
			samsung,power-domain = <&pd_cam>;
			phys = <&mipi_phy 2>;
			phy-names = "csis";
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	watchdog@10060000 {
		compatible = "samsung,s3c2410-wdt";
		reg = <0x10060000 0x100>;
		interrupts = <0 43 0>;
		clocks = <&clock CLK_WDT>;
		clock-names = "watchdog";
		status = "disabled";
	};

	rtc@10070000 {
		compatible = "samsung,s3c6410-rtc";
		reg = <0x10070000 0x100>;
		interrupts = <0 44 0>, <0 45 0>;
		clocks = <&clock CLK_RTC>;
		clock-names = "rtc";
		status = "disabled";
	};

	keypad@100A0000 {
		compatible = "samsung,s5pv210-keypad";
		reg = <0x100A0000 0x100>;
		interrupts = <0 109 0>;
		clocks = <&clock CLK_KEYIF>;
		clock-names = "keypad";
		status = "disabled";
	};

	sdhci@12510000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12510000 0x100>;
		interrupts = <0 73 0>;
		clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12520000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12520000 0x100>;
		interrupts = <0 74 0>;
		clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12530000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12530000 0x100>;
		interrupts = <0 75 0>;
		clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12540000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12540000 0x100>;
		interrupts = <0 76 0>;
		clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	exynos_usbphy: exynos-usbphy@125B0000 {
		compatible = "samsung,exynos4210-usb2-phy";
		reg = <0x125B0000 0x100>;
		samsung,pmureg-phandle = <&pmu_system_controller>;
		clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
		clock-names = "phy", "ref";
		#phy-cells = <1>;
		status = "disabled";
	};

	hsotg@12480000 {
		compatible = "samsung,s3c6400-hsotg";
		reg = <0x12480000 0x20000>;
		interrupts = <0 71 0>;
		clocks = <&clock CLK_USB_DEVICE>;
		clock-names = "otg";
		phys = <&exynos_usbphy 0>;
		phy-names = "usb2-phy";
		status = "disabled";
	};

	ehci@12580000 {
		compatible = "samsung,exynos4210-ehci";
		reg = <0x12580000 0x100>;
		interrupts = <0 70 0>;
		clocks = <&clock CLK_USB_HOST>;
		clock-names = "usbhost";
		status = "disabled";
	};

	ohci@12590000 {
		compatible = "samsung,exynos4210-ohci";
		reg = <0x12590000 0x100>;
		interrupts = <0 70 0>;
		clocks = <&clock CLK_USB_HOST>;
		clock-names = "usbhost";
		status = "disabled";
	};

	i2s1: i2s@13960000 {
		compatible = "samsung,s5pv210-i2s";
		reg = <0x13960000 0x100>;
		clocks = <&clock CLK_I2S1>;
		clock-names = "iis";
		dmas = <&pdma1 12>, <&pdma1 11>;
		dma-names = "tx", "rx";
		status = "disabled";
	};

	i2s2: i2s@13970000 {
		compatible = "samsung,s5pv210-i2s";
		reg = <0x13970000 0x100>;
		clocks = <&clock CLK_I2S2>;
		clock-names = "iis";
		dmas = <&pdma0 14>, <&pdma0 13>;
		dma-names = "tx", "rx";
		status = "disabled";
	};

	mfc: codec@13400000 {
		compatible = "samsung,mfc-v5";
		reg = <0x13400000 0x10000>;
		interrupts = <0 94 0>;
		samsung,power-domain = <&pd_mfc>;
		clocks = <&clock CLK_MFC>;
		clock-names = "mfc";
		status = "disabled";
	};

	serial@13800000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13800000 0x100>;
		interrupts = <0 52 0>;
		clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial@13810000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13810000 0x100>;
		interrupts = <0 53 0>;
		clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial@13820000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13820000 0x100>;
		interrupts = <0 54 0>;
		clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial@13830000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13830000 0x100>;
		interrupts = <0 55 0>;
		clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	i2c_0: i2c@13860000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13860000 0x100>;
		interrupts = <0 58 0>;
		clocks = <&clock CLK_I2C0>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c0_bus>;
		status = "disabled";
	};

	i2c_1: i2c@13870000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13870000 0x100>;
		interrupts = <0 59 0>;
		clocks = <&clock CLK_I2C1>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c1_bus>;
		status = "disabled";
	};

	i2c_2: i2c@13880000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13880000 0x100>;
		interrupts = <0 60 0>;
		clocks = <&clock CLK_I2C2>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c2_bus>;
		status = "disabled";
	};

	i2c_3: i2c@13890000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13890000 0x100>;
		interrupts = <0 61 0>;
		clocks = <&clock CLK_I2C3>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c3_bus>;
		status = "disabled";
	};

	i2c_4: i2c@138A0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138A0000 0x100>;
		interrupts = <0 62 0>;
		clocks = <&clock CLK_I2C4>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c4_bus>;
		status = "disabled";
	};

	i2c_5: i2c@138B0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138B0000 0x100>;
		interrupts = <0 63 0>;
		clocks = <&clock CLK_I2C5>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c5_bus>;
		status = "disabled";
	};

	i2c_6: i2c@138C0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138C0000 0x100>;
		interrupts = <0 64 0>;
		clocks = <&clock CLK_I2C6>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c6_bus>;
		status = "disabled";
	};

	i2c_7: i2c@138D0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138D0000 0x100>;
		interrupts = <0 65 0>;
		clocks = <&clock CLK_I2C7>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c7_bus>;
		status = "disabled";
	};

	spi_0: spi@13920000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13920000 0x100>;
		interrupts = <0 66 0>;
		dmas = <&pdma0 7>, <&pdma0 6>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi0_bus>;
		status = "disabled";
	};

	spi_1: spi@13930000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13930000 0x100>;
		interrupts = <0 67 0>;
		dmas = <&pdma1 7>, <&pdma1 6>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi1_bus>;
		status = "disabled";
	};

	spi_2: spi@13940000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13940000 0x100>;
		interrupts = <0 68 0>;
		dmas = <&pdma0 9>, <&pdma0 8>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi2_bus>;
		status = "disabled";
	};

	pwm@139D0000 {
		compatible = "samsung,exynos4210-pwm";
		reg = <0x139D0000 0x1000>;
		interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
		clocks = <&clock CLK_PWM>;
		clock-names = "timers";
		#pwm-cells = <2>;
		status = "disabled";
	};

	amba {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "arm,amba-bus";
		interrupt-parent = <&gic>;
		ranges;

		pdma0: pdma@12680000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12680000 0x1000>;
			interrupts = <0 35 0>;
			clocks = <&clock CLK_PDMA0>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		pdma1: pdma@12690000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12690000 0x1000>;
			interrupts = <0 36 0>;
			clocks = <&clock CLK_PDMA1>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		mdma1: mdma@12850000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12850000 0x1000>;
			interrupts = <0 34 0>;
			clocks = <&clock CLK_MDMA>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};
	};

	fimd: fimd@11c00000 {
		compatible = "samsung,exynos4210-fimd";
		interrupt-parent = <&combiner>;
		reg = <0x11c00000 0x20000>;
		interrupt-names = "fifo", "vsync", "lcd_sys";
		interrupts = <11 0>, <11 1>, <11 2>;
		clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
		clock-names = "sclk_fimd", "fimd";
		samsung,power-domain = <&pd_lcd0>;
		status = "disabled";
	};
};
Commit	Line	Data
b571abb3 TF	1	/*
	2	* Samsung's Exynos4 SoC series common device tree source
	3	*
	4	* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
	5	* http://www.samsung.com
	6	* Copyright (c) 2010-2011 Linaro Ltd.
	7	* www.linaro.org
	8	*
	9	* Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
	10	* SoCs from Exynos4 series can include this file and provide values for SoCs
	11	* specfic bindings.
	12	*
	13	* Note: This file does not include device nodes for all the controllers in
	14	* Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
	15	* nodes can be added to this file.
	16	*
	17	* This program is free software; you can redistribute it and/or modify
	18	* it under the terms of the GNU General Public License version 2 as
	19	* published by the Free Software Foundation.
	20	*/
	21
1c75a78a	22	#include <dt-bindings/clock/exynos4.h>
990a7bfd	23	#include <dt-bindings/clock/exynos-audss-clk.h>
3799279f	24	#include "skeleton.dtsi"
b571abb3 TF	25
	26	/ {
	27	interrupt-parent = <&gic>;
	28
	29	aliases {
	30	spi0 = &spi_0;
	31	spi1 = &spi_1;
	32	spi2 = &spi_2;
34db4990 DA	33	i2c0 = &i2c_0;
	34	i2c1 = &i2c_1;
	35	i2c2 = &i2c_2;
	36	i2c3 = &i2c_3;
	37	i2c4 = &i2c_4;
	38	i2c5 = &i2c_5;
	39	i2c6 = &i2c_6;
	40	i2c7 = &i2c_7;
d1b8a41d SN	41	csis0 = &csis_0;
	42	csis1 = &csis_1;
	43	fimc0 = &fimc_0;
	44	fimc1 = &fimc_1;
	45	fimc2 = &fimc_2;
	46	fimc3 = &fimc_3;
b571abb3 TF	47	};
b571abb3 TF	48
990a7bfd SN	49	clock_audss: clock-controller@03810000 {
	50	compatible = "samsung,exynos4210-audss-clock";
	51	reg = <0x03810000 0x0C>;
	52	#clock-cells = <1>;
	53	};
	54
	55	i2s0: i2s@03830000 {
	56	compatible = "samsung,s5pv210-i2s";
	57	reg = <0x03830000 0x100>;
	58	clocks = <&clock_audss EXYNOS_I2S_BUS>;
	59	clock-names = "iis";
	60	dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
	61	dma-names = "tx", "rx", "tx-sec";
	62	samsung,idma-addr = <0x03000000>;
	63	status = "disabled";
	64	};
	65
096ee6ad TA	66	chipid@10000000 {
	67	compatible = "samsung,exynos4210-chipid";
	68	reg = <0x10000000 0x100>;
	69	};
	70
21b190d2 SN	71	mipi_phy: video-phy@10020710 {
	72	compatible = "samsung,s5pv210-mipi-video-phy";
	73	reg = <0x10020710 8>;
	74	#phy-cells = <1>;
	75	};
	76
91d88f03 TF	77	pd_mfc: mfc-power-domain@10023C40 {
	78	compatible = "samsung,exynos4210-pd";
	79	reg = <0x10023C40 0x20>;
	80	};
	81
	82	pd_g3d: g3d-power-domain@10023C60 {
	83	compatible = "samsung,exynos4210-pd";
	84	reg = <0x10023C60 0x20>;
	85	};
	86
	87	pd_lcd0: lcd0-power-domain@10023C80 {
	88	compatible = "samsung,exynos4210-pd";
	89	reg = <0x10023C80 0x20>;
	90	};
	91
	92	pd_tv: tv-power-domain@10023C20 {
	93	compatible = "samsung,exynos4210-pd";
	94	reg = <0x10023C20 0x20>;
	95	};
	96
	97	pd_cam: cam-power-domain@10023C00 {
	98	compatible = "samsung,exynos4210-pd";
	99	reg = <0x10023C00 0x20>;
	100	};
	101
	102	pd_gps: gps-power-domain@10023CE0 {
	103	compatible = "samsung,exynos4210-pd";
	104	reg = <0x10023CE0 0x20>;
b571abb3 TF	105	};
b571abb3 TF	106
10ea1f18 CC	107	pd_gps_alive: gps-alive-power-domain@10023D00 {
	108	compatible = "samsung,exynos4210-pd";
	109	reg = <0x10023D00 0x20>;
	110	};
	111
0572b725	112	gic: interrupt-controller@10490000 {
b571abb3 TF	113	compatible = "arm,cortex-a9-gic";
	114	#interrupt-cells = <3>;
	115	interrupt-controller;
cf286b40	116	reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
b571abb3 TF	117	};
b571abb3 TF	118
0572b725	119	combiner: interrupt-controller@10440000 {
b571abb3 TF	120	compatible = "samsung,exynos4210-combiner";
	121	#interrupt-cells = <2>;
	122	interrupt-controller;
	123	reg = <0x10440000 0x1000>;
	124	};
	125
9f052d0c	126	sys_reg: syscon@10010000 {
a64b1b22 SN	127	compatible = "samsung,exynos4-sysreg", "syscon";
	128	reg = <0x10010000 0x400>;
	129	};
	130
7b9613ac CP	131	pmu_system_controller: system-controller@10020000 {
	132	compatible = "samsung,exynos4210-pmu", "syscon";
	133	reg = <0x10020000 0x4000>;
	134	};
	135
8b7dd64c AH	136	dsi_0: dsi@11C80000 {
	137	compatible = "samsung,exynos4210-mipi-dsi";
	138	reg = <0x11C80000 0x10000>;
	139	interrupts = <0 79 0>;
	140	samsung,power-domain = <&pd_lcd0>;
	141	phys = <&mipi_phy 1>;
	142	phy-names = "dsim";
c8366bac	143	clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
8b7dd64c AH	144	clock-names = "bus_clk", "pll_clk";
	145	status = "disabled";
	146	#address-cells = <1>;
	147	#size-cells = <0>;
	148	};
	149
d1b8a41d SN	150	camera {
	151	compatible = "samsung,fimc", "simple-bus";
	152	status = "disabled";
	153	#address-cells = <1>;
	154	#size-cells = <1>;
ee5eda64 SN	155	#clock-cells = <1>;
ee5eda64 SN	156	clock-output-names = "cam_a_clkout", "cam_b_clkout";
d1b8a41d SN	157	ranges;
d1b8a41d SN	158
d1b8a41d SN	159	fimc_0: fimc@11800000 {
	160	compatible = "samsung,exynos4210-fimc";
	161	reg = <0x11800000 0x1000>;
	162	interrupts = <0 84 0>;
1c75a78a	163	clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
d1b8a41d SN	164	clock-names = "fimc", "sclk_fimc";
	165	samsung,power-domain = <&pd_cam>;
	166	samsung,sysreg = <&sys_reg>;
	167	status = "disabled";
	168	};
	169
	170	fimc_1: fimc@11810000 {
	171	compatible = "samsung,exynos4210-fimc";
	172	reg = <0x11810000 0x1000>;
	173	interrupts = <0 85 0>;
1c75a78a	174	clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
d1b8a41d SN	175	clock-names = "fimc", "sclk_fimc";
	176	samsung,power-domain = <&pd_cam>;
	177	samsung,sysreg = <&sys_reg>;
	178	status = "disabled";
	179	};
	180
	181	fimc_2: fimc@11820000 {
	182	compatible = "samsung,exynos4210-fimc";
	183	reg = <0x11820000 0x1000>;
	184	interrupts = <0 86 0>;
1c75a78a	185	clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
d1b8a41d SN	186	clock-names = "fimc", "sclk_fimc";
	187	samsung,power-domain = <&pd_cam>;
	188	samsung,sysreg = <&sys_reg>;
	189	status = "disabled";
	190	};
	191
	192	fimc_3: fimc@11830000 {
	193	compatible = "samsung,exynos4210-fimc";
	194	reg = <0x11830000 0x1000>;
	195	interrupts = <0 87 0>;
1c75a78a	196	clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
d1b8a41d SN	197	clock-names = "fimc", "sclk_fimc";
	198	samsung,power-domain = <&pd_cam>;
	199	samsung,sysreg = <&sys_reg>;
	200	status = "disabled";
	201	};
	202
	203	csis_0: csis@11880000 {
	204	compatible = "samsung,exynos4210-csis";
	205	reg = <0x11880000 0x4000>;
	206	interrupts = <0 78 0>;
1c75a78a	207	clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
d1b8a41d SN	208	clock-names = "csis", "sclk_csis";
	209	bus-width = <4>;
	210	samsung,power-domain = <&pd_cam>;
21b190d2 SN	211	phys = <&mipi_phy 0>;
21b190d2 SN	212	phy-names = "csis";
d1b8a41d SN	213	status = "disabled";
	214	#address-cells = <1>;
	215	#size-cells = <0>;
	216	};
	217
	218	csis_1: csis@11890000 {
	219	compatible = "samsung,exynos4210-csis";
	220	reg = <0x11890000 0x4000>;
	221	interrupts = <0 80 0>;
1c75a78a	222	clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
d1b8a41d SN	223	clock-names = "csis", "sclk_csis";
	224	bus-width = <2>;
	225	samsung,power-domain = <&pd_cam>;
21b190d2 SN	226	phys = <&mipi_phy 2>;
21b190d2 SN	227	phy-names = "csis";
d1b8a41d SN	228	status = "disabled";
	229	#address-cells = <1>;
	230	#size-cells = <0>;
	231	};
	232	};
	233
b571abb3 TF	234	watchdog@10060000 {
	235	compatible = "samsung,s3c2410-wdt";
	236	reg = <0x10060000 0x100>;
	237	interrupts = <0 43 0>;
1c75a78a	238	clocks = <&clock CLK_WDT>;
7ad34337	239	clock-names = "watchdog";
c9e23f00	240	status = "disabled";
b571abb3 TF	241	};
	242
	243	rtc@10070000 {
	244	compatible = "samsung,s3c6410-rtc";
	245	reg = <0x10070000 0x100>;
	246	interrupts = <0 44 0>, <0 45 0>;
1c75a78a	247	clocks = <&clock CLK_RTC>;
7ad34337	248	clock-names = "rtc";
c9e23f00	249	status = "disabled";
b571abb3 TF	250	};
	251
	252	keypad@100A0000 {
	253	compatible = "samsung,s5pv210-keypad";
	254	reg = <0x100A0000 0x100>;
	255	interrupts = <0 109 0>;
1c75a78a	256	clocks = <&clock CLK_KEYIF>;
7ad34337	257	clock-names = "keypad";
c9e23f00	258	status = "disabled";
b571abb3 TF	259	};
	260
	261	sdhci@12510000 {
	262	compatible = "samsung,exynos4210-sdhci";
	263	reg = <0x12510000 0x100>;
	264	interrupts = <0 73 0>;
1c75a78a	265	clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
7ad34337	266	clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00	267	status = "disabled";
b571abb3 TF	268	};
	269
	270	sdhci@12520000 {
	271	compatible = "samsung,exynos4210-sdhci";
	272	reg = <0x12520000 0x100>;
	273	interrupts = <0 74 0>;
1c75a78a	274	clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
7ad34337	275	clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00	276	status = "disabled";
b571abb3 TF	277	};
	278
	279	sdhci@12530000 {
	280	compatible = "samsung,exynos4210-sdhci";
	281	reg = <0x12530000 0x100>;
	282	interrupts = <0 75 0>;
1c75a78a	283	clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
7ad34337	284	clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00	285	status = "disabled";
b571abb3 TF	286	};
	287
	288	sdhci@12540000 {
	289	compatible = "samsung,exynos4210-sdhci";
	290	reg = <0x12540000 0x100>;
	291	interrupts = <0 76 0>;
1c75a78a	292	clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
7ad34337	293	clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00	294	status = "disabled";
26bbd41f CP	295	};
	296
	297	exynos_usbphy: exynos-usbphy@125B0000 {
	298	compatible = "samsung,exynos4210-usb2-phy";
	299	reg = <0x125B0000 0x100>;
	300	samsung,pmureg-phandle = <&pmu_system_controller>;
	301	clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
	302	clock-names = "phy", "ref";
	303	#phy-cells = <1>;
	304	status = "disabled";
ef14d94c CP	305	};
	306
	307	hsotg@12480000 {
	308	compatible = "samsung,s3c6400-hsotg";
	309	reg = <0x12480000 0x20000>;
	310	interrupts = <0 71 0>;
	311	clocks = <&clock CLK_USB_DEVICE>;
	312	clock-names = "otg";
	313	phys = <&exynos_usbphy 0>;
	314	phy-names = "usb2-phy";
	315	status = "disabled";
b571abb3 TF	316	};
b571abb3 TF	317
6f9d02a0 DK	318	ehci@12580000 {
	319	compatible = "samsung,exynos4210-ehci";
	320	reg = <0x12580000 0x100>;
	321	interrupts = <0 70 0>;
1c75a78a	322	clocks = <&clock CLK_USB_HOST>;
6f9d02a0 DK	323	clock-names = "usbhost";
	324	status = "disabled";
	325	};
	326
	327	ohci@12590000 {
	328	compatible = "samsung,exynos4210-ohci";
	329	reg = <0x12590000 0x100>;
	330	interrupts = <0 70 0>;
1c75a78a	331	clocks = <&clock CLK_USB_HOST>;
6f9d02a0 DK	332	clock-names = "usbhost";
	333	status = "disabled";
	334	};
	335
990a7bfd SN	336	i2s1: i2s@13960000 {
	337	compatible = "samsung,s5pv210-i2s";
	338	reg = <0x13960000 0x100>;
	339	clocks = <&clock CLK_I2S1>;
	340	clock-names = "iis";
	341	dmas = <&pdma1 12>, <&pdma1 11>;
	342	dma-names = "tx", "rx";
	343	status = "disabled";
	344	};
	345
	346	i2s2: i2s@13970000 {
	347	compatible = "samsung,s5pv210-i2s";
	348	reg = <0x13970000 0x100>;
	349	clocks = <&clock CLK_I2S2>;
	350	clock-names = "iis";
	351	dmas = <&pdma0 14>, <&pdma0 13>;
	352	dma-names = "tx", "rx";
	353	status = "disabled";
	354	};
	355
20901f74 SK	356	mfc: codec@13400000 {
	357	compatible = "samsung,mfc-v5";
	358	reg = <0x13400000 0x10000>;
	359	interrupts = <0 94 0>;
	360	samsung,power-domain = <&pd_mfc>;
1c75a78a	361	clocks = <&clock CLK_MFC>;
3a0ef8dc	362	clock-names = "mfc";
20901f74 SK	363	status = "disabled";
	364	};
	365
b571abb3 TF	366	serial@13800000 {
	367	compatible = "samsung,exynos4210-uart";
	368	reg = <0x13800000 0x100>;
	369	interrupts = <0 52 0>;
1c75a78a	370	clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
7ad34337	371	clock-names = "uart", "clk_uart_baud0";
c9e23f00	372	status = "disabled";
b571abb3 TF	373	};
	374
	375	serial@13810000 {
	376	compatible = "samsung,exynos4210-uart";
	377	reg = <0x13810000 0x100>;
	378	interrupts = <0 53 0>;
1c75a78a	379	clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
7ad34337	380	clock-names = "uart", "clk_uart_baud0";
c9e23f00	381	status = "disabled";
b571abb3 TF	382	};
	383
	384	serial@13820000 {
	385	compatible = "samsung,exynos4210-uart";
	386	reg = <0x13820000 0x100>;
	387	interrupts = <0 54 0>;
1c75a78a	388	clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
7ad34337	389	clock-names = "uart", "clk_uart_baud0";
c9e23f00	390	status = "disabled";
b571abb3 TF	391	};
	392
	393	serial@13830000 {
	394	compatible = "samsung,exynos4210-uart";
	395	reg = <0x13830000 0x100>;
	396	interrupts = <0 55 0>;
1c75a78a	397	clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
7ad34337	398	clock-names = "uart", "clk_uart_baud0";
c9e23f00	399	status = "disabled";
b571abb3 TF	400	};
b571abb3 TF	401
34db4990	402	i2c_0: i2c@13860000 {
1b198d56 TF	403	#address-cells = <1>;
1b198d56 TF	404	#size-cells = <0>;
b571abb3 TF	405	compatible = "samsung,s3c2440-i2c";
	406	reg = <0x13860000 0x100>;
	407	interrupts = <0 58 0>;
1c75a78a	408	clocks = <&clock CLK_I2C0>;
7ad34337	409	clock-names = "i2c";
045c8f63 TA	410	pinctrl-names = "default";
045c8f63 TA	411	pinctrl-0 = <&i2c0_bus>;
c9e23f00	412	status = "disabled";
b571abb3 TF	413	};
b571abb3 TF	414
34db4990	415	i2c_1: i2c@13870000 {
1b198d56 TF	416	#address-cells = <1>;
1b198d56 TF	417	#size-cells = <0>;
b571abb3 TF	418	compatible = "samsung,s3c2440-i2c";
	419	reg = <0x13870000 0x100>;
	420	interrupts = <0 59 0>;
1c75a78a	421	clocks = <&clock CLK_I2C1>;
7ad34337	422	clock-names = "i2c";
045c8f63 TA	423	pinctrl-names = "default";
045c8f63 TA	424	pinctrl-0 = <&i2c1_bus>;
c9e23f00	425	status = "disabled";
b571abb3 TF	426	};
b571abb3 TF	427
34db4990	428	i2c_2: i2c@13880000 {
1b198d56 TF	429	#address-cells = <1>;
1b198d56 TF	430	#size-cells = <0>;
b571abb3 TF	431	compatible = "samsung,s3c2440-i2c";
	432	reg = <0x13880000 0x100>;
	433	interrupts = <0 60 0>;
1c75a78a	434	clocks = <&clock CLK_I2C2>;
7ad34337	435	clock-names = "i2c";
9c869d1f TS	436	pinctrl-names = "default";
9c869d1f TS	437	pinctrl-0 = <&i2c2_bus>;
c9e23f00	438	status = "disabled";
b571abb3 TF	439	};
b571abb3 TF	440
34db4990	441	i2c_3: i2c@13890000 {
1b198d56 TF	442	#address-cells = <1>;
1b198d56 TF	443	#size-cells = <0>;
b571abb3 TF	444	compatible = "samsung,s3c2440-i2c";
	445	reg = <0x13890000 0x100>;
	446	interrupts = <0 61 0>;
1c75a78a	447	clocks = <&clock CLK_I2C3>;
7ad34337	448	clock-names = "i2c";
9c869d1f TS	449	pinctrl-names = "default";
9c869d1f TS	450	pinctrl-0 = <&i2c3_bus>;
c9e23f00	451	status = "disabled";
b571abb3 TF	452	};
b571abb3 TF	453
34db4990	454	i2c_4: i2c@138A0000 {
1b198d56 TF	455	#address-cells = <1>;
1b198d56 TF	456	#size-cells = <0>;
b571abb3 TF	457	compatible = "samsung,s3c2440-i2c";
	458	reg = <0x138A0000 0x100>;
	459	interrupts = <0 62 0>;
1c75a78a	460	clocks = <&clock CLK_I2C4>;
7ad34337	461	clock-names = "i2c";
9c869d1f TS	462	pinctrl-names = "default";
9c869d1f TS	463	pinctrl-0 = <&i2c4_bus>;
c9e23f00	464	status = "disabled";
b571abb3 TF	465	};
b571abb3 TF	466
34db4990	467	i2c_5: i2c@138B0000 {
1b198d56 TF	468	#address-cells = <1>;
1b198d56 TF	469	#size-cells = <0>;
b571abb3 TF	470	compatible = "samsung,s3c2440-i2c";
	471	reg = <0x138B0000 0x100>;
	472	interrupts = <0 63 0>;
1c75a78a	473	clocks = <&clock CLK_I2C5>;
7ad34337	474	clock-names = "i2c";
9c869d1f TS	475	pinctrl-names = "default";
9c869d1f TS	476	pinctrl-0 = <&i2c5_bus>;
c9e23f00	477	status = "disabled";
b571abb3 TF	478	};
b571abb3 TF	479
34db4990	480	i2c_6: i2c@138C0000 {
1b198d56 TF	481	#address-cells = <1>;
1b198d56 TF	482	#size-cells = <0>;
b571abb3 TF	483	compatible = "samsung,s3c2440-i2c";
	484	reg = <0x138C0000 0x100>;
	485	interrupts = <0 64 0>;
1c75a78a	486	clocks = <&clock CLK_I2C6>;
7ad34337	487	clock-names = "i2c";
9c869d1f TS	488	pinctrl-names = "default";
9c869d1f TS	489	pinctrl-0 = <&i2c6_bus>;
c9e23f00	490	status = "disabled";
b571abb3 TF	491	};
b571abb3 TF	492
34db4990	493	i2c_7: i2c@138D0000 {
1b198d56 TF	494	#address-cells = <1>;
1b198d56 TF	495	#size-cells = <0>;
b571abb3 TF	496	compatible = "samsung,s3c2440-i2c";
	497	reg = <0x138D0000 0x100>;
	498	interrupts = <0 65 0>;
1c75a78a	499	clocks = <&clock CLK_I2C7>;
7ad34337	500	clock-names = "i2c";
9c869d1f TS	501	pinctrl-names = "default";
9c869d1f TS	502	pinctrl-0 = <&i2c7_bus>;
c9e23f00	503	status = "disabled";
b571abb3 TF	504	};
	505
	506	spi_0: spi@13920000 {
	507	compatible = "samsung,exynos4210-spi";
	508	reg = <0x13920000 0x100>;
	509	interrupts = <0 66 0>;
48b3af1e SN	510	dmas = <&pdma0 7>, <&pdma0 6>;
48b3af1e SN	511	dma-names = "tx", "rx";
b571abb3 TF	512	#address-cells = <1>;
b571abb3 TF	513	#size-cells = <0>;
1c75a78a	514	clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
7ad34337	515	clock-names = "spi", "spi_busclk0";
045c8f63 TA	516	pinctrl-names = "default";
045c8f63 TA	517	pinctrl-0 = <&spi0_bus>;
c9e23f00	518	status = "disabled";
b571abb3 TF	519	};
	520
	521	spi_1: spi@13930000 {
	522	compatible = "samsung,exynos4210-spi";
	523	reg = <0x13930000 0x100>;
	524	interrupts = <0 67 0>;
48b3af1e SN	525	dmas = <&pdma1 7>, <&pdma1 6>;
48b3af1e SN	526	dma-names = "tx", "rx";
b571abb3 TF	527	#address-cells = <1>;
b571abb3 TF	528	#size-cells = <0>;
1c75a78a	529	clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
7ad34337	530	clock-names = "spi", "spi_busclk0";
045c8f63 TA	531	pinctrl-names = "default";
045c8f63 TA	532	pinctrl-0 = <&spi1_bus>;
c9e23f00	533	status = "disabled";
b571abb3 TF	534	};
	535
	536	spi_2: spi@13940000 {
	537	compatible = "samsung,exynos4210-spi";
	538	reg = <0x13940000 0x100>;
	539	interrupts = <0 68 0>;
48b3af1e SN	540	dmas = <&pdma0 9>, <&pdma0 8>;
48b3af1e SN	541	dma-names = "tx", "rx";
b571abb3 TF	542	#address-cells = <1>;
b571abb3 TF	543	#size-cells = <0>;
1c75a78a	544	clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
7ad34337	545	clock-names = "spi", "spi_busclk0";
045c8f63 TA	546	pinctrl-names = "default";
045c8f63 TA	547	pinctrl-0 = <&spi2_bus>;
c9e23f00	548	status = "disabled";
b571abb3 TF	549	};
b571abb3 TF	550
cc4193ea TF	551	pwm@139D0000 {
	552	compatible = "samsung,exynos4210-pwm";
	553	reg = <0x139D0000 0x1000>;
	554	interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
1c75a78a	555	clocks = <&clock CLK_PWM>;
ec06dbe7	556	clock-names = "timers";
cc4193ea TF	557	#pwm-cells = <2>;
	558	status = "disabled";
	559	};
	560
b571abb3 TF	561	amba {
	562	#address-cells = <1>;
	563	#size-cells = <1>;
	564	compatible = "arm,amba-bus";
	565	interrupt-parent = <&gic>;
	566	ranges;
	567
	568	pdma0: pdma@12680000 {
	569	compatible = "arm,pl330", "arm,primecell";
	570	reg = <0x12680000 0x1000>;
	571	interrupts = <0 35 0>;
1c75a78a	572	clocks = <&clock CLK_PDMA0>;
7ad34337	573	clock-names = "apb_pclk";
0a96d4d3 PV	574	#dma-cells = <1>;
	575	#dma-channels = <8>;
	576	#dma-requests = <32>;
b571abb3 TF	577	};
	578
	579	pdma1: pdma@12690000 {
	580	compatible = "arm,pl330", "arm,primecell";
	581	reg = <0x12690000 0x1000>;
	582	interrupts = <0 36 0>;
1c75a78a	583	clocks = <&clock CLK_PDMA1>;
7ad34337	584	clock-names = "apb_pclk";
0a96d4d3 PV	585	#dma-cells = <1>;
	586	#dma-channels = <8>;
	587	#dma-requests = <32>;
b571abb3	588	};
f7e758af BZ	589
	590	mdma1: mdma@12850000 {
	591	compatible = "arm,pl330", "arm,primecell";
	592	reg = <0x12850000 0x1000>;
	593	interrupts = <0 34 0>;
1c75a78a	594	clocks = <&clock CLK_MDMA>;
7ad34337	595	clock-names = "apb_pclk";
0a96d4d3 PV	596	#dma-cells = <1>;
	597	#dma-channels = <8>;
	598	#dma-requests = <1>;
f7e758af	599	};
b571abb3	600	};
768c3a56 VS	601
	602	fimd: fimd@11c00000 {
	603	compatible = "samsung,exynos4210-fimd";
	604	interrupt-parent = <&combiner>;
	605	reg = <0x11c00000 0x20000>;
	606	interrupt-names = "fifo", "vsync", "lcd_sys";
	607	interrupts = <11 0>, <11 1>, <11 2>;
1c75a78a	608	clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
768c3a56 VS	609	clock-names = "sclk_fimd", "fimd";
	610	samsung,power-domain = <&pd_lcd0>;
	611	status = "disabled";
	612	};
b571abb3	613	};