[linux-2.6-block.git] / arch / arm / boot / dts / exynos4.dtsi

/*
 * Samsung's Exynos4 SoC series common device tree source
 *
 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 * Copyright (c) 2010-2011 Linaro Ltd.
 *		www.linaro.org
 *
 * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
 * SoCs from Exynos4 series can include this file and provide values for SoCs
 * specfic bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
 * nodes can be added to this file.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <dt-bindings/clock/exynos4.h>
#include <dt-bindings/clock/exynos-audss-clk.h>
#include "skeleton.dtsi"

/ {
	interrupt-parent = <&gic>;

	aliases {
		spi0 = &spi_0;
		spi1 = &spi_1;
		spi2 = &spi_2;
		i2c0 = &i2c_0;
		i2c1 = &i2c_1;
		i2c2 = &i2c_2;
		i2c3 = &i2c_3;
		i2c4 = &i2c_4;
		i2c5 = &i2c_5;
		i2c6 = &i2c_6;
		i2c7 = &i2c_7;
		csis0 = &csis_0;
		csis1 = &csis_1;
		fimc0 = &fimc_0;
		fimc1 = &fimc_1;
		fimc2 = &fimc_2;
		fimc3 = &fimc_3;
		serial0 = &serial_0;
		serial1 = &serial_1;
		serial2 = &serial_2;
		serial3 = &serial_3;
	};

	clock_audss: clock-controller@03810000 {
		compatible = "samsung,exynos4210-audss-clock";
		reg = <0x03810000 0x0C>;
		#clock-cells = <1>;
	};

	i2s0: i2s@03830000 {
		compatible = "samsung,s5pv210-i2s";
		reg = <0x03830000 0x100>;
		clocks = <&clock_audss EXYNOS_I2S_BUS>;
		clock-names = "iis";
		dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
		dma-names = "tx", "rx", "tx-sec";
		samsung,idma-addr = <0x03000000>;
		status = "disabled";
	};

	chipid@10000000 {
		compatible = "samsung,exynos4210-chipid";
		reg = <0x10000000 0x100>;
	};

	mipi_phy: video-phy@10020710 {
		compatible = "samsung,s5pv210-mipi-video-phy";
		reg = <0x10020710 8>;
		#phy-cells = <1>;
	};

	pd_mfc: mfc-power-domain@10023C40 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C40 0x20>;
	};

	pd_g3d: g3d-power-domain@10023C60 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C60 0x20>;
	};

	pd_lcd0: lcd0-power-domain@10023C80 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C80 0x20>;
	};

	pd_tv: tv-power-domain@10023C20 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C20 0x20>;
	};

	pd_cam: cam-power-domain@10023C00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023C00 0x20>;
	};

	pd_gps: gps-power-domain@10023CE0 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023CE0 0x20>;
	};

	pd_gps_alive: gps-alive-power-domain@10023D00 {
		compatible = "samsung,exynos4210-pd";
		reg = <0x10023D00 0x20>;
	};

	gic: interrupt-controller@10490000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
	};

	combiner: interrupt-controller@10440000 {
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0x10440000 0x1000>;
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupt-parent = <&combiner>;
		interrupts = <2 2>, <3 2>;
	};

	sys_reg: syscon@10010000 {
		compatible = "samsung,exynos4-sysreg", "syscon";
		reg = <0x10010000 0x400>;
	};

	pmu_system_controller: system-controller@10020000 {
		compatible = "samsung,exynos4210-pmu", "syscon";
		reg = <0x10020000 0x4000>;
	};

	dsi_0: dsi@11C80000 {
		compatible = "samsung,exynos4210-mipi-dsi";
		reg = <0x11C80000 0x10000>;
		interrupts = <0 79 0>;
		samsung,power-domain = <&pd_lcd0>;
		phys = <&mipi_phy 1>;
		phy-names = "dsim";
		clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
		clock-names = "bus_clk", "pll_clk";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
	};

	camera {
		compatible = "samsung,fimc", "simple-bus";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <1>;
		#clock-cells = <1>;
		clock-output-names = "cam_a_clkout", "cam_b_clkout";
		ranges;

		fimc_0: fimc@11800000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11800000 0x1000>;
			interrupts = <0 84 0>;
			clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_1: fimc@11810000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11810000 0x1000>;
			interrupts = <0 85 0>;
			clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_2: fimc@11820000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11820000 0x1000>;
			interrupts = <0 86 0>;
			clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		fimc_3: fimc@11830000 {
			compatible = "samsung,exynos4210-fimc";
			reg = <0x11830000 0x1000>;
			interrupts = <0 87 0>;
			clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
			clock-names = "fimc", "sclk_fimc";
			samsung,power-domain = <&pd_cam>;
			samsung,sysreg = <&sys_reg>;
			status = "disabled";
		};

		csis_0: csis@11880000 {
			compatible = "samsung,exynos4210-csis";
			reg = <0x11880000 0x4000>;
			interrupts = <0 78 0>;
			clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
			clock-names = "csis", "sclk_csis";
			bus-width = <4>;
			samsung,power-domain = <&pd_cam>;
			phys = <&mipi_phy 0>;
			phy-names = "csis";
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		csis_1: csis@11890000 {
			compatible = "samsung,exynos4210-csis";
			reg = <0x11890000 0x4000>;
			interrupts = <0 80 0>;
			clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
			clock-names = "csis", "sclk_csis";
			bus-width = <2>;
			samsung,power-domain = <&pd_cam>;
			phys = <&mipi_phy 2>;
			phy-names = "csis";
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	watchdog@10060000 {
		compatible = "samsung,s3c2410-wdt";
		reg = <0x10060000 0x100>;
		interrupts = <0 43 0>;
		clocks = <&clock CLK_WDT>;
		clock-names = "watchdog";
		status = "disabled";
	};

	rtc@10070000 {
		compatible = "samsung,s3c6410-rtc";
		reg = <0x10070000 0x100>;
		interrupts = <0 44 0>, <0 45 0>;
		clocks = <&clock CLK_RTC>;
		clock-names = "rtc";
		status = "disabled";
	};

	keypad@100A0000 {
		compatible = "samsung,s5pv210-keypad";
		reg = <0x100A0000 0x100>;
		interrupts = <0 109 0>;
		clocks = <&clock CLK_KEYIF>;
		clock-names = "keypad";
		status = "disabled";
	};

	sdhci@12510000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12510000 0x100>;
		interrupts = <0 73 0>;
		clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12520000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12520000 0x100>;
		interrupts = <0 74 0>;
		clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12530000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12530000 0x100>;
		interrupts = <0 75 0>;
		clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	sdhci@12540000 {
		compatible = "samsung,exynos4210-sdhci";
		reg = <0x12540000 0x100>;
		interrupts = <0 76 0>;
		clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
		clock-names = "hsmmc", "mmc_busclk.2";
		status = "disabled";
	};

	exynos_usbphy: exynos-usbphy@125B0000 {
		compatible = "samsung,exynos4210-usb2-phy";
		reg = <0x125B0000 0x100>;
		samsung,pmureg-phandle = <&pmu_system_controller>;
		clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
		clock-names = "phy", "ref";
		#phy-cells = <1>;
		status = "disabled";
	};

	hsotg@12480000 {
		compatible = "samsung,s3c6400-hsotg";
		reg = <0x12480000 0x20000>;
		interrupts = <0 71 0>;
		clocks = <&clock CLK_USB_DEVICE>;
		clock-names = "otg";
		phys = <&exynos_usbphy 0>;
		phy-names = "usb2-phy";
		status = "disabled";
	};

	ehci@12580000 {
		compatible = "samsung,exynos4210-ehci";
		reg = <0x12580000 0x100>;
		interrupts = <0 70 0>;
		clocks = <&clock CLK_USB_HOST>;
		clock-names = "usbhost";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
		    reg = <0>;
		    phys = <&exynos_usbphy 1>;
		    status = "disabled";
		};
		port@1 {
		    reg = <1>;
		    phys = <&exynos_usbphy 2>;
		    status = "disabled";
		};
		port@2 {
		    reg = <2>;
		    phys = <&exynos_usbphy 3>;
		    status = "disabled";
		};
	};

	ohci@12590000 {
		compatible = "samsung,exynos4210-ohci";
		reg = <0x12590000 0x100>;
		interrupts = <0 70 0>;
		clocks = <&clock CLK_USB_HOST>;
		clock-names = "usbhost";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
		    reg = <0>;
		    phys = <&exynos_usbphy 1>;
		    status = "disabled";
		};
	};

	i2s1: i2s@13960000 {
		compatible = "samsung,s5pv210-i2s";
		reg = <0x13960000 0x100>;
		clocks = <&clock CLK_I2S1>;
		clock-names = "iis";
		dmas = <&pdma1 12>, <&pdma1 11>;
		dma-names = "tx", "rx";
		status = "disabled";
	};

	i2s2: i2s@13970000 {
		compatible = "samsung,s5pv210-i2s";
		reg = <0x13970000 0x100>;
		clocks = <&clock CLK_I2S2>;
		clock-names = "iis";
		dmas = <&pdma0 14>, <&pdma0 13>;
		dma-names = "tx", "rx";
		status = "disabled";
	};

	mfc: codec@13400000 {
		compatible = "samsung,mfc-v5";
		reg = <0x13400000 0x10000>;
		interrupts = <0 94 0>;
		samsung,power-domain = <&pd_mfc>;
		clocks = <&clock CLK_MFC>;
		clock-names = "mfc";
		status = "disabled";
	};

	serial_0: serial@13800000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13800000 0x100>;
		interrupts = <0 52 0>;
		clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial_1: serial@13810000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13810000 0x100>;
		interrupts = <0 53 0>;
		clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial_2: serial@13820000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13820000 0x100>;
		interrupts = <0 54 0>;
		clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	serial_3: serial@13830000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x13830000 0x100>;
		interrupts = <0 55 0>;
		clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
		clock-names = "uart", "clk_uart_baud0";
		status = "disabled";
	};

	i2c_0: i2c@13860000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13860000 0x100>;
		interrupts = <0 58 0>;
		clocks = <&clock CLK_I2C0>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c0_bus>;
		status = "disabled";
	};

	i2c_1: i2c@13870000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13870000 0x100>;
		interrupts = <0 59 0>;
		clocks = <&clock CLK_I2C1>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c1_bus>;
		status = "disabled";
	};

	i2c_2: i2c@13880000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13880000 0x100>;
		interrupts = <0 60 0>;
		clocks = <&clock CLK_I2C2>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c2_bus>;
		status = "disabled";
	};

	i2c_3: i2c@13890000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x13890000 0x100>;
		interrupts = <0 61 0>;
		clocks = <&clock CLK_I2C3>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c3_bus>;
		status = "disabled";
	};

	i2c_4: i2c@138A0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138A0000 0x100>;
		interrupts = <0 62 0>;
		clocks = <&clock CLK_I2C4>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c4_bus>;
		status = "disabled";
	};

	i2c_5: i2c@138B0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138B0000 0x100>;
		interrupts = <0 63 0>;
		clocks = <&clock CLK_I2C5>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c5_bus>;
		status = "disabled";
	};

	i2c_6: i2c@138C0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138C0000 0x100>;
		interrupts = <0 64 0>;
		clocks = <&clock CLK_I2C6>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c6_bus>;
		status = "disabled";
	};

	i2c_7: i2c@138D0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x138D0000 0x100>;
		interrupts = <0 65 0>;
		clocks = <&clock CLK_I2C7>;
		clock-names = "i2c";
		pinctrl-names = "default";
		pinctrl-0 = <&i2c7_bus>;
		status = "disabled";
	};

	spi_0: spi@13920000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13920000 0x100>;
		interrupts = <0 66 0>;
		dmas = <&pdma0 7>, <&pdma0 6>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi0_bus>;
		status = "disabled";
	};

	spi_1: spi@13930000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13930000 0x100>;
		interrupts = <0 67 0>;
		dmas = <&pdma1 7>, <&pdma1 6>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi1_bus>;
		status = "disabled";
	};

	spi_2: spi@13940000 {
		compatible = "samsung,exynos4210-spi";
		reg = <0x13940000 0x100>;
		interrupts = <0 68 0>;
		dmas = <&pdma0 9>, <&pdma0 8>;
		dma-names = "tx", "rx";
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
		clock-names = "spi", "spi_busclk0";
		pinctrl-names = "default";
		pinctrl-0 = <&spi2_bus>;
		status = "disabled";
	};

	pwm@139D0000 {
		compatible = "samsung,exynos4210-pwm";
		reg = <0x139D0000 0x1000>;
		interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
		clocks = <&clock CLK_PWM>;
		clock-names = "timers";
		#pwm-cells = <3>;
		status = "disabled";
	};

	amba {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "arm,amba-bus";
		interrupt-parent = <&gic>;
		ranges;

		pdma0: pdma@12680000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12680000 0x1000>;
			interrupts = <0 35 0>;
			clocks = <&clock CLK_PDMA0>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		pdma1: pdma@12690000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12690000 0x1000>;
			interrupts = <0 36 0>;
			clocks = <&clock CLK_PDMA1>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <32>;
		};

		mdma1: mdma@12850000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0x12850000 0x1000>;
			interrupts = <0 34 0>;
			clocks = <&clock CLK_MDMA>;
			clock-names = "apb_pclk";
			#dma-cells = <1>;
			#dma-channels = <8>;
			#dma-requests = <1>;
		};
	};

	fimd: fimd@11c00000 {
		compatible = "samsung,exynos4210-fimd";
		interrupt-parent = <&combiner>;
		reg = <0x11c00000 0x20000>;
		interrupt-names = "fifo", "vsync", "lcd_sys";
		interrupts = <11 0>, <11 1>, <11 2>;
		clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
		clock-names = "sclk_fimd", "fimd";
		samsung,power-domain = <&pd_lcd0>;
		samsung,sysreg = <&sys_reg>;
		status = "disabled";
	};
};
Commit	Line	Data
b571abb3 TF	1	/*
	2	* Samsung's Exynos4 SoC series common device tree source
	3	*
	4	* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
	5	* http://www.samsung.com
	6	* Copyright (c) 2010-2011 Linaro Ltd.
	7	* www.linaro.org
	8	*
	9	* Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
	10	* SoCs from Exynos4 series can include this file and provide values for SoCs
	11	* specfic bindings.
	12	*
	13	* Note: This file does not include device nodes for all the controllers in
	14	* Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
	15	* nodes can be added to this file.
	16	*
	17	* This program is free software; you can redistribute it and/or modify
	18	* it under the terms of the GNU General Public License version 2 as
	19	* published by the Free Software Foundation.
	20	*/
	21
1c75a78a	22	#include <dt-bindings/clock/exynos4.h>
990a7bfd	23	#include <dt-bindings/clock/exynos-audss-clk.h>
3799279f	24	#include "skeleton.dtsi"
b571abb3 TF	25
	26	/ {
	27	interrupt-parent = <&gic>;
	28
	29	aliases {
	30	spi0 = &spi_0;
	31	spi1 = &spi_1;
	32	spi2 = &spi_2;
34db4990 DA	33	i2c0 = &i2c_0;
	34	i2c1 = &i2c_1;
	35	i2c2 = &i2c_2;
	36	i2c3 = &i2c_3;
	37	i2c4 = &i2c_4;
	38	i2c5 = &i2c_5;
	39	i2c6 = &i2c_6;
	40	i2c7 = &i2c_7;
d1b8a41d SN	41	csis0 = &csis_0;
	42	csis1 = &csis_1;
	43	fimc0 = &fimc_0;
	44	fimc1 = &fimc_1;
	45	fimc2 = &fimc_2;
	46	fimc3 = &fimc_3;
1e64f48e TF	47	serial0 = &serial_0;
	48	serial1 = &serial_1;
	49	serial2 = &serial_2;
	50	serial3 = &serial_3;
b571abb3 TF	51	};
b571abb3 TF	52
990a7bfd SN	53	clock_audss: clock-controller@03810000 {
	54	compatible = "samsung,exynos4210-audss-clock";
	55	reg = <0x03810000 0x0C>;
	56	#clock-cells = <1>;
	57	};
	58
	59	i2s0: i2s@03830000 {
	60	compatible = "samsung,s5pv210-i2s";
	61	reg = <0x03830000 0x100>;
	62	clocks = <&clock_audss EXYNOS_I2S_BUS>;
	63	clock-names = "iis";
	64	dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
	65	dma-names = "tx", "rx", "tx-sec";
	66	samsung,idma-addr = <0x03000000>;
	67	status = "disabled";
	68	};
	69
096ee6ad TA	70	chipid@10000000 {
	71	compatible = "samsung,exynos4210-chipid";
	72	reg = <0x10000000 0x100>;
	73	};
	74
21b190d2 SN	75	mipi_phy: video-phy@10020710 {
	76	compatible = "samsung,s5pv210-mipi-video-phy";
	77	reg = <0x10020710 8>;
	78	#phy-cells = <1>;
	79	};
	80
91d88f03 TF	81	pd_mfc: mfc-power-domain@10023C40 {
	82	compatible = "samsung,exynos4210-pd";
	83	reg = <0x10023C40 0x20>;
	84	};
	85
	86	pd_g3d: g3d-power-domain@10023C60 {
	87	compatible = "samsung,exynos4210-pd";
	88	reg = <0x10023C60 0x20>;
	89	};
	90
	91	pd_lcd0: lcd0-power-domain@10023C80 {
	92	compatible = "samsung,exynos4210-pd";
	93	reg = <0x10023C80 0x20>;
	94	};
	95
	96	pd_tv: tv-power-domain@10023C20 {
	97	compatible = "samsung,exynos4210-pd";
	98	reg = <0x10023C20 0x20>;
	99	};
	100
	101	pd_cam: cam-power-domain@10023C00 {
	102	compatible = "samsung,exynos4210-pd";
	103	reg = <0x10023C00 0x20>;
	104	};
	105
	106	pd_gps: gps-power-domain@10023CE0 {
	107	compatible = "samsung,exynos4210-pd";
	108	reg = <0x10023CE0 0x20>;
b571abb3 TF	109	};
b571abb3 TF	110
10ea1f18 CC	111	pd_gps_alive: gps-alive-power-domain@10023D00 {
	112	compatible = "samsung,exynos4210-pd";
	113	reg = <0x10023D00 0x20>;
	114	};
	115
0572b725	116	gic: interrupt-controller@10490000 {
b571abb3 TF	117	compatible = "arm,cortex-a9-gic";
	118	#interrupt-cells = <3>;
	119	interrupt-controller;
cf286b40	120	reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
b571abb3 TF	121	};
b571abb3 TF	122
0572b725	123	combiner: interrupt-controller@10440000 {
b571abb3 TF	124	compatible = "samsung,exynos4210-combiner";
	125	#interrupt-cells = <2>;
	126	interrupt-controller;
	127	reg = <0x10440000 0x1000>;
	128	};
	129
6f4b82a3 CP	130	pmu {
	131	compatible = "arm,cortex-a9-pmu";
	132	interrupt-parent = <&combiner>;
	133	interrupts = <2 2>, <3 2>;
	134	};
	135
9f052d0c	136	sys_reg: syscon@10010000 {
a64b1b22 SN	137	compatible = "samsung,exynos4-sysreg", "syscon";
	138	reg = <0x10010000 0x400>;
	139	};
	140
7b9613ac CP	141	pmu_system_controller: system-controller@10020000 {
	142	compatible = "samsung,exynos4210-pmu", "syscon";
	143	reg = <0x10020000 0x4000>;
	144	};
	145
8b7dd64c AH	146	dsi_0: dsi@11C80000 {
	147	compatible = "samsung,exynos4210-mipi-dsi";
	148	reg = <0x11C80000 0x10000>;
	149	interrupts = <0 79 0>;
	150	samsung,power-domain = <&pd_lcd0>;
	151	phys = <&mipi_phy 1>;
	152	phy-names = "dsim";
c8366bac	153	clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
8b7dd64c AH	154	clock-names = "bus_clk", "pll_clk";
	155	status = "disabled";
	156	#address-cells = <1>;
	157	#size-cells = <0>;
	158	};
	159
d1b8a41d SN	160	camera {
	161	compatible = "samsung,fimc", "simple-bus";
	162	status = "disabled";
	163	#address-cells = <1>;
	164	#size-cells = <1>;
ee5eda64 SN	165	#clock-cells = <1>;
ee5eda64 SN	166	clock-output-names = "cam_a_clkout", "cam_b_clkout";
d1b8a41d SN	167	ranges;
d1b8a41d SN	168
d1b8a41d SN	169	fimc_0: fimc@11800000 {
	170	compatible = "samsung,exynos4210-fimc";
	171	reg = <0x11800000 0x1000>;
	172	interrupts = <0 84 0>;
1c75a78a	173	clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
d1b8a41d SN	174	clock-names = "fimc", "sclk_fimc";
	175	samsung,power-domain = <&pd_cam>;
	176	samsung,sysreg = <&sys_reg>;
	177	status = "disabled";
	178	};
	179
	180	fimc_1: fimc@11810000 {
	181	compatible = "samsung,exynos4210-fimc";
	182	reg = <0x11810000 0x1000>;
	183	interrupts = <0 85 0>;
1c75a78a	184	clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
d1b8a41d SN	185	clock-names = "fimc", "sclk_fimc";
	186	samsung,power-domain = <&pd_cam>;
	187	samsung,sysreg = <&sys_reg>;
	188	status = "disabled";
	189	};
	190
	191	fimc_2: fimc@11820000 {
	192	compatible = "samsung,exynos4210-fimc";
	193	reg = <0x11820000 0x1000>;
	194	interrupts = <0 86 0>;
1c75a78a	195	clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
d1b8a41d SN	196	clock-names = "fimc", "sclk_fimc";
	197	samsung,power-domain = <&pd_cam>;
	198	samsung,sysreg = <&sys_reg>;
	199	status = "disabled";
	200	};
	201
	202	fimc_3: fimc@11830000 {
	203	compatible = "samsung,exynos4210-fimc";
	204	reg = <0x11830000 0x1000>;
	205	interrupts = <0 87 0>;
1c75a78a	206	clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
d1b8a41d SN	207	clock-names = "fimc", "sclk_fimc";
	208	samsung,power-domain = <&pd_cam>;
	209	samsung,sysreg = <&sys_reg>;
	210	status = "disabled";
	211	};
	212
	213	csis_0: csis@11880000 {
	214	compatible = "samsung,exynos4210-csis";
	215	reg = <0x11880000 0x4000>;
	216	interrupts = <0 78 0>;
1c75a78a	217	clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
d1b8a41d SN	218	clock-names = "csis", "sclk_csis";
	219	bus-width = <4>;
	220	samsung,power-domain = <&pd_cam>;
21b190d2 SN	221	phys = <&mipi_phy 0>;
21b190d2 SN	222	phy-names = "csis";
d1b8a41d SN	223	status = "disabled";
	224	#address-cells = <1>;
	225	#size-cells = <0>;
	226	};
	227
	228	csis_1: csis@11890000 {
	229	compatible = "samsung,exynos4210-csis";
	230	reg = <0x11890000 0x4000>;
	231	interrupts = <0 80 0>;
1c75a78a	232	clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
d1b8a41d SN	233	clock-names = "csis", "sclk_csis";
	234	bus-width = <2>;
	235	samsung,power-domain = <&pd_cam>;
21b190d2 SN	236	phys = <&mipi_phy 2>;
21b190d2 SN	237	phy-names = "csis";
d1b8a41d SN	238	status = "disabled";
	239	#address-cells = <1>;
	240	#size-cells = <0>;
	241	};
	242	};
	243
b571abb3 TF	244	watchdog@10060000 {
	245	compatible = "samsung,s3c2410-wdt";
	246	reg = <0x10060000 0x100>;
	247	interrupts = <0 43 0>;
1c75a78a	248	clocks = <&clock CLK_WDT>;
7ad34337	249	clock-names = "watchdog";
c9e23f00	250	status = "disabled";
b571abb3 TF	251	};
	252
	253	rtc@10070000 {
	254	compatible = "samsung,s3c6410-rtc";
	255	reg = <0x10070000 0x100>;
	256	interrupts = <0 44 0>, <0 45 0>;
1c75a78a	257	clocks = <&clock CLK_RTC>;
7ad34337	258	clock-names = "rtc";
c9e23f00	259	status = "disabled";
b571abb3 TF	260	};
	261
	262	keypad@100A0000 {
	263	compatible = "samsung,s5pv210-keypad";
	264	reg = <0x100A0000 0x100>;
	265	interrupts = <0 109 0>;
1c75a78a	266	clocks = <&clock CLK_KEYIF>;
7ad34337	267	clock-names = "keypad";
c9e23f00	268	status = "disabled";
b571abb3 TF	269	};
	270
	271	sdhci@12510000 {
	272	compatible = "samsung,exynos4210-sdhci";
	273	reg = <0x12510000 0x100>;
	274	interrupts = <0 73 0>;
1c75a78a	275	clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
7ad34337	276	clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00	277	status = "disabled";
b571abb3 TF	278	};
	279
	280	sdhci@12520000 {
	281	compatible = "samsung,exynos4210-sdhci";
	282	reg = <0x12520000 0x100>;
	283	interrupts = <0 74 0>;
1c75a78a	284	clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
7ad34337	285	clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00	286	status = "disabled";
b571abb3 TF	287	};
	288
	289	sdhci@12530000 {
	290	compatible = "samsung,exynos4210-sdhci";
	291	reg = <0x12530000 0x100>;
	292	interrupts = <0 75 0>;
1c75a78a	293	clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
7ad34337	294	clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00	295	status = "disabled";
b571abb3 TF	296	};
	297
	298	sdhci@12540000 {
	299	compatible = "samsung,exynos4210-sdhci";
	300	reg = <0x12540000 0x100>;
	301	interrupts = <0 76 0>;
1c75a78a	302	clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
7ad34337	303	clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00	304	status = "disabled";
26bbd41f CP	305	};
	306
	307	exynos_usbphy: exynos-usbphy@125B0000 {
	308	compatible = "samsung,exynos4210-usb2-phy";
	309	reg = <0x125B0000 0x100>;
	310	samsung,pmureg-phandle = <&pmu_system_controller>;
	311	clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
	312	clock-names = "phy", "ref";
	313	#phy-cells = <1>;
	314	status = "disabled";
ef14d94c CP	315	};
	316
	317	hsotg@12480000 {
	318	compatible = "samsung,s3c6400-hsotg";
	319	reg = <0x12480000 0x20000>;
	320	interrupts = <0 71 0>;
	321	clocks = <&clock CLK_USB_DEVICE>;
	322	clock-names = "otg";
	323	phys = <&exynos_usbphy 0>;
	324	phy-names = "usb2-phy";
	325	status = "disabled";
b571abb3 TF	326	};
b571abb3 TF	327
6f9d02a0 DK	328	ehci@12580000 {
	329	compatible = "samsung,exynos4210-ehci";
	330	reg = <0x12580000 0x100>;
	331	interrupts = <0 70 0>;
1c75a78a	332	clocks = <&clock CLK_USB_HOST>;
6f9d02a0 DK	333	clock-names = "usbhost";
6f9d02a0 DK	334	status = "disabled";
366126d5 MS	335	#address-cells = <1>;
	336	#size-cells = <0>;
	337	port@0 {
	338	reg = <0>;
	339	phys = <&exynos_usbphy 1>;
	340	status = "disabled";
	341	};
	342	port@1 {
	343	reg = <1>;
	344	phys = <&exynos_usbphy 2>;
	345	status = "disabled";
	346	};
	347	port@2 {
	348	reg = <2>;
	349	phys = <&exynos_usbphy 3>;
	350	status = "disabled";
	351	};
6f9d02a0 DK	352	};
	353
	354	ohci@12590000 {
	355	compatible = "samsung,exynos4210-ohci";
	356	reg = <0x12590000 0x100>;
	357	interrupts = <0 70 0>;
1c75a78a	358	clocks = <&clock CLK_USB_HOST>;
6f9d02a0 DK	359	clock-names = "usbhost";
6f9d02a0 DK	360	status = "disabled";
366126d5 MS	361	#address-cells = <1>;
	362	#size-cells = <0>;
	363	port@0 {
	364	reg = <0>;
	365	phys = <&exynos_usbphy 1>;
	366	status = "disabled";
	367	};
6f9d02a0 DK	368	};
6f9d02a0 DK	369
990a7bfd SN	370	i2s1: i2s@13960000 {
	371	compatible = "samsung,s5pv210-i2s";
	372	reg = <0x13960000 0x100>;
	373	clocks = <&clock CLK_I2S1>;
	374	clock-names = "iis";
	375	dmas = <&pdma1 12>, <&pdma1 11>;
	376	dma-names = "tx", "rx";
	377	status = "disabled";
	378	};
	379
	380	i2s2: i2s@13970000 {
	381	compatible = "samsung,s5pv210-i2s";
	382	reg = <0x13970000 0x100>;
	383	clocks = <&clock CLK_I2S2>;
	384	clock-names = "iis";
	385	dmas = <&pdma0 14>, <&pdma0 13>;
	386	dma-names = "tx", "rx";
	387	status = "disabled";
	388	};
	389
20901f74 SK	390	mfc: codec@13400000 {
	391	compatible = "samsung,mfc-v5";
	392	reg = <0x13400000 0x10000>;
	393	interrupts = <0 94 0>;
	394	samsung,power-domain = <&pd_mfc>;
1c75a78a	395	clocks = <&clock CLK_MFC>;
3a0ef8dc	396	clock-names = "mfc";
20901f74 SK	397	status = "disabled";
	398	};
	399
1e64f48e	400	serial_0: serial@13800000 {
b571abb3 TF	401	compatible = "samsung,exynos4210-uart";
	402	reg = <0x13800000 0x100>;
	403	interrupts = <0 52 0>;
1c75a78a	404	clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
7ad34337	405	clock-names = "uart", "clk_uart_baud0";
c9e23f00	406	status = "disabled";
b571abb3 TF	407	};
b571abb3 TF	408
1e64f48e	409	serial_1: serial@13810000 {
b571abb3 TF	410	compatible = "samsung,exynos4210-uart";
	411	reg = <0x13810000 0x100>;
	412	interrupts = <0 53 0>;
1c75a78a	413	clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
7ad34337	414	clock-names = "uart", "clk_uart_baud0";
c9e23f00	415	status = "disabled";
b571abb3 TF	416	};
b571abb3 TF	417
1e64f48e	418	serial_2: serial@13820000 {
b571abb3 TF	419	compatible = "samsung,exynos4210-uart";
	420	reg = <0x13820000 0x100>;
	421	interrupts = <0 54 0>;
1c75a78a	422	clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
7ad34337	423	clock-names = "uart", "clk_uart_baud0";
c9e23f00	424	status = "disabled";
b571abb3 TF	425	};
b571abb3 TF	426
1e64f48e	427	serial_3: serial@13830000 {
b571abb3 TF	428	compatible = "samsung,exynos4210-uart";
	429	reg = <0x13830000 0x100>;
	430	interrupts = <0 55 0>;
1c75a78a	431	clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
7ad34337	432	clock-names = "uart", "clk_uart_baud0";
c9e23f00	433	status = "disabled";
b571abb3 TF	434	};
b571abb3 TF	435
34db4990	436	i2c_0: i2c@13860000 {
1b198d56 TF	437	#address-cells = <1>;
1b198d56 TF	438	#size-cells = <0>;
b571abb3 TF	439	compatible = "samsung,s3c2440-i2c";
	440	reg = <0x13860000 0x100>;
	441	interrupts = <0 58 0>;
1c75a78a	442	clocks = <&clock CLK_I2C0>;
7ad34337	443	clock-names = "i2c";
045c8f63 TA	444	pinctrl-names = "default";
045c8f63 TA	445	pinctrl-0 = <&i2c0_bus>;
c9e23f00	446	status = "disabled";
b571abb3 TF	447	};
b571abb3 TF	448
34db4990	449	i2c_1: i2c@13870000 {
1b198d56 TF	450	#address-cells = <1>;
1b198d56 TF	451	#size-cells = <0>;
b571abb3 TF	452	compatible = "samsung,s3c2440-i2c";
	453	reg = <0x13870000 0x100>;
	454	interrupts = <0 59 0>;
1c75a78a	455	clocks = <&clock CLK_I2C1>;
7ad34337	456	clock-names = "i2c";
045c8f63 TA	457	pinctrl-names = "default";
045c8f63 TA	458	pinctrl-0 = <&i2c1_bus>;
c9e23f00	459	status = "disabled";
b571abb3 TF	460	};
b571abb3 TF	461
34db4990	462	i2c_2: i2c@13880000 {
1b198d56 TF	463	#address-cells = <1>;
1b198d56 TF	464	#size-cells = <0>;
b571abb3 TF	465	compatible = "samsung,s3c2440-i2c";
	466	reg = <0x13880000 0x100>;
	467	interrupts = <0 60 0>;
1c75a78a	468	clocks = <&clock CLK_I2C2>;
7ad34337	469	clock-names = "i2c";
9c869d1f TS	470	pinctrl-names = "default";
9c869d1f TS	471	pinctrl-0 = <&i2c2_bus>;
c9e23f00	472	status = "disabled";
b571abb3 TF	473	};
b571abb3 TF	474
34db4990	475	i2c_3: i2c@13890000 {
1b198d56 TF	476	#address-cells = <1>;
1b198d56 TF	477	#size-cells = <0>;
b571abb3 TF	478	compatible = "samsung,s3c2440-i2c";
	479	reg = <0x13890000 0x100>;
	480	interrupts = <0 61 0>;
1c75a78a	481	clocks = <&clock CLK_I2C3>;
7ad34337	482	clock-names = "i2c";
9c869d1f TS	483	pinctrl-names = "default";
9c869d1f TS	484	pinctrl-0 = <&i2c3_bus>;
c9e23f00	485	status = "disabled";
b571abb3 TF	486	};
b571abb3 TF	487
34db4990	488	i2c_4: i2c@138A0000 {
1b198d56 TF	489	#address-cells = <1>;
1b198d56 TF	490	#size-cells = <0>;
b571abb3 TF	491	compatible = "samsung,s3c2440-i2c";
	492	reg = <0x138A0000 0x100>;
	493	interrupts = <0 62 0>;
1c75a78a	494	clocks = <&clock CLK_I2C4>;
7ad34337	495	clock-names = "i2c";
9c869d1f TS	496	pinctrl-names = "default";
9c869d1f TS	497	pinctrl-0 = <&i2c4_bus>;
c9e23f00	498	status = "disabled";
b571abb3 TF	499	};
b571abb3 TF	500
34db4990	501	i2c_5: i2c@138B0000 {
1b198d56 TF	502	#address-cells = <1>;
1b198d56 TF	503	#size-cells = <0>;
b571abb3 TF	504	compatible = "samsung,s3c2440-i2c";
	505	reg = <0x138B0000 0x100>;
	506	interrupts = <0 63 0>;
1c75a78a	507	clocks = <&clock CLK_I2C5>;
7ad34337	508	clock-names = "i2c";
9c869d1f TS	509	pinctrl-names = "default";
9c869d1f TS	510	pinctrl-0 = <&i2c5_bus>;
c9e23f00	511	status = "disabled";
b571abb3 TF	512	};
b571abb3 TF	513
34db4990	514	i2c_6: i2c@138C0000 {
1b198d56 TF	515	#address-cells = <1>;
1b198d56 TF	516	#size-cells = <0>;
b571abb3 TF	517	compatible = "samsung,s3c2440-i2c";
	518	reg = <0x138C0000 0x100>;
	519	interrupts = <0 64 0>;
1c75a78a	520	clocks = <&clock CLK_I2C6>;
7ad34337	521	clock-names = "i2c";
9c869d1f TS	522	pinctrl-names = "default";
9c869d1f TS	523	pinctrl-0 = <&i2c6_bus>;
c9e23f00	524	status = "disabled";
b571abb3 TF	525	};
b571abb3 TF	526
34db4990	527	i2c_7: i2c@138D0000 {
1b198d56 TF	528	#address-cells = <1>;
1b198d56 TF	529	#size-cells = <0>;
b571abb3 TF	530	compatible = "samsung,s3c2440-i2c";
	531	reg = <0x138D0000 0x100>;
	532	interrupts = <0 65 0>;
1c75a78a	533	clocks = <&clock CLK_I2C7>;
7ad34337	534	clock-names = "i2c";
9c869d1f TS	535	pinctrl-names = "default";
9c869d1f TS	536	pinctrl-0 = <&i2c7_bus>;
c9e23f00	537	status = "disabled";
b571abb3 TF	538	};
	539
	540	spi_0: spi@13920000 {
	541	compatible = "samsung,exynos4210-spi";
	542	reg = <0x13920000 0x100>;
	543	interrupts = <0 66 0>;
48b3af1e SN	544	dmas = <&pdma0 7>, <&pdma0 6>;
48b3af1e SN	545	dma-names = "tx", "rx";
b571abb3 TF	546	#address-cells = <1>;
b571abb3 TF	547	#size-cells = <0>;
1c75a78a	548	clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
7ad34337	549	clock-names = "spi", "spi_busclk0";
045c8f63 TA	550	pinctrl-names = "default";
045c8f63 TA	551	pinctrl-0 = <&spi0_bus>;
c9e23f00	552	status = "disabled";
b571abb3 TF	553	};
	554
	555	spi_1: spi@13930000 {
	556	compatible = "samsung,exynos4210-spi";
	557	reg = <0x13930000 0x100>;
	558	interrupts = <0 67 0>;
48b3af1e SN	559	dmas = <&pdma1 7>, <&pdma1 6>;
48b3af1e SN	560	dma-names = "tx", "rx";
b571abb3 TF	561	#address-cells = <1>;
b571abb3 TF	562	#size-cells = <0>;
1c75a78a	563	clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
7ad34337	564	clock-names = "spi", "spi_busclk0";
045c8f63 TA	565	pinctrl-names = "default";
045c8f63 TA	566	pinctrl-0 = <&spi1_bus>;
c9e23f00	567	status = "disabled";
b571abb3 TF	568	};
	569
	570	spi_2: spi@13940000 {
	571	compatible = "samsung,exynos4210-spi";
	572	reg = <0x13940000 0x100>;
	573	interrupts = <0 68 0>;
48b3af1e SN	574	dmas = <&pdma0 9>, <&pdma0 8>;
48b3af1e SN	575	dma-names = "tx", "rx";
b571abb3 TF	576	#address-cells = <1>;
b571abb3 TF	577	#size-cells = <0>;
1c75a78a	578	clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
7ad34337	579	clock-names = "spi", "spi_busclk0";
045c8f63 TA	580	pinctrl-names = "default";
045c8f63 TA	581	pinctrl-0 = <&spi2_bus>;
c9e23f00	582	status = "disabled";
b571abb3 TF	583	};
b571abb3 TF	584
cc4193ea TF	585	pwm@139D0000 {
	586	compatible = "samsung,exynos4210-pwm";
	587	reg = <0x139D0000 0x1000>;
	588	interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
1c75a78a	589	clocks = <&clock CLK_PWM>;
ec06dbe7	590	clock-names = "timers";
2fd82d33	591	#pwm-cells = <3>;
cc4193ea TF	592	status = "disabled";
	593	};
	594
b571abb3 TF	595	amba {
	596	#address-cells = <1>;
	597	#size-cells = <1>;
	598	compatible = "arm,amba-bus";
	599	interrupt-parent = <&gic>;
	600	ranges;
	601
	602	pdma0: pdma@12680000 {
	603	compatible = "arm,pl330", "arm,primecell";
	604	reg = <0x12680000 0x1000>;
	605	interrupts = <0 35 0>;
1c75a78a	606	clocks = <&clock CLK_PDMA0>;
7ad34337	607	clock-names = "apb_pclk";
0a96d4d3 PV	608	#dma-cells = <1>;
	609	#dma-channels = <8>;
	610	#dma-requests = <32>;
b571abb3 TF	611	};
	612
	613	pdma1: pdma@12690000 {
	614	compatible = "arm,pl330", "arm,primecell";
	615	reg = <0x12690000 0x1000>;
	616	interrupts = <0 36 0>;
1c75a78a	617	clocks = <&clock CLK_PDMA1>;
7ad34337	618	clock-names = "apb_pclk";
0a96d4d3 PV	619	#dma-cells = <1>;
	620	#dma-channels = <8>;
	621	#dma-requests = <32>;
b571abb3	622	};
f7e758af BZ	623
	624	mdma1: mdma@12850000 {
	625	compatible = "arm,pl330", "arm,primecell";
	626	reg = <0x12850000 0x1000>;
	627	interrupts = <0 34 0>;
1c75a78a	628	clocks = <&clock CLK_MDMA>;
7ad34337	629	clock-names = "apb_pclk";
0a96d4d3 PV	630	#dma-cells = <1>;
	631	#dma-channels = <8>;
	632	#dma-requests = <1>;
f7e758af	633	};
b571abb3	634	};
768c3a56 VS	635
	636	fimd: fimd@11c00000 {
	637	compatible = "samsung,exynos4210-fimd";
	638	interrupt-parent = <&combiner>;
	639	reg = <0x11c00000 0x20000>;
	640	interrupt-names = "fifo", "vsync", "lcd_sys";
	641	interrupts = <11 0>, <11 1>, <11 2>;
1c75a78a	642	clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
768c3a56 VS	643	clock-names = "sclk_fimd", "fimd";
768c3a56 VS	644	samsung,power-domain = <&pd_lcd0>;
2eb62941	645	samsung,sysreg = <&sys_reg>;
768c3a56 VS	646	status = "disabled";
768c3a56 VS	647	};
b571abb3	648	};