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ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
[linux-2.6-block.git] / arch / arm / boot / dts / exynos4.dtsi
CommitLineData
b571abb3
TF		 1/*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
1c75a78a 22#include <dt-bindings/clock/exynos4.h>
990a7bfd 23#include <dt-bindings/clock/exynos-audss-clk.h>
3799279f 24#include "skeleton.dtsi"
b571abb3
TF		 25
26/ {
27 interrupt-parent = <&gic>;
28
29 aliases {
30 spi0 = &spi_0;
31 spi1 = &spi_1;
32 spi2 = &spi_2;
34db4990
DA		 33 i2c0 = &i2c_0;
34 i2c1 = &i2c_1;
35 i2c2 = &i2c_2;
36 i2c3 = &i2c_3;
37 i2c4 = &i2c_4;
38 i2c5 = &i2c_5;
39 i2c6 = &i2c_6;
40 i2c7 = &i2c_7;
ed80d4ca 41 i2c8 = &i2c_8;
d1b8a41d
SN		 42 csis0 = &csis_0;
43 csis1 = &csis_1;
44 fimc0 = &fimc_0;
45 fimc1 = &fimc_1;
46 fimc2 = &fimc_2;
47 fimc3 = &fimc_3;
1e64f48e
TF		 48 serial0 = &serial_0;
49 serial1 = &serial_1;
50 serial2 = &serial_2;
51 serial3 = &serial_3;
b571abb3
TF		 52 };
53
990a7bfd
SN		 54 clock_audss: clock-controller@03810000 {
55 compatible = "samsung,exynos4210-audss-clock";
56 reg = <0x03810000 0x0C>;
57 #clock-cells = <1>;
58 };
59
60 i2s0: i2s@03830000 {
61 compatible = "samsung,s5pv210-i2s";
62 reg = <0x03830000 0x100>;
63 clocks = <&clock_audss EXYNOS_I2S_BUS>;
64 clock-names = "iis";
3635acef
SN		 65 #clock-cells = <1>;
66 clock-output-names = "i2s_cdclk0";
990a7bfd
SN		 67 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
68 dma-names = "tx", "rx", "tx-sec";
69 samsung,idma-addr = <0x03000000>;
16696337 70 #sound-dai-cells = <1>;
990a7bfd
SN		 71 status = "disabled";
72 };
73
096ee6ad
TA		 74 chipid@10000000 {
75 compatible = "samsung,exynos4210-chipid";
76 reg = <0x10000000 0x100>;
77 };
78
21b190d2
SN		 79 mipi_phy: video-phy@10020710 {
80 compatible = "samsung,s5pv210-mipi-video-phy";
81 reg = <0x10020710 8>;
82 #phy-cells = <1>;
c8ef0bee 83 syscon = <&pmu_system_controller>;
21b190d2
SN		 84 };
85
91d88f03
TF		 86 pd_mfc: mfc-power-domain@10023C40 {
87 compatible = "samsung,exynos4210-pd";
88 reg = <0x10023C40 0x20>;
0da65870 89 #power-domain-cells = <0>;
91d88f03
TF		 90 };
91
92 pd_g3d: g3d-power-domain@10023C60 {
93 compatible = "samsung,exynos4210-pd";
94 reg = <0x10023C60 0x20>;
0da65870 95 #power-domain-cells = <0>;
91d88f03
TF		 96 };
97
98 pd_lcd0: lcd0-power-domain@10023C80 {
99 compatible = "samsung,exynos4210-pd";
100 reg = <0x10023C80 0x20>;
0da65870 101 #power-domain-cells = <0>;
91d88f03
TF		 102 };
103
104 pd_tv: tv-power-domain@10023C20 {
105 compatible = "samsung,exynos4210-pd";
106 reg = <0x10023C20 0x20>;
0da65870 107 #power-domain-cells = <0>;
ec459c0c 108 power-domains = <&pd_lcd0>;
91d88f03
TF		 109 };
110
111 pd_cam: cam-power-domain@10023C00 {
112 compatible = "samsung,exynos4210-pd";
113 reg = <0x10023C00 0x20>;
0da65870 114 #power-domain-cells = <0>;
91d88f03
TF		 115 };
116
117 pd_gps: gps-power-domain@10023CE0 {
118 compatible = "samsung,exynos4210-pd";
119 reg = <0x10023CE0 0x20>;
0da65870 120 #power-domain-cells = <0>;
b571abb3
TF		 121 };
122
10ea1f18
CC		 123 pd_gps_alive: gps-alive-power-domain@10023D00 {
124 compatible = "samsung,exynos4210-pd";
125 reg = <0x10023D00 0x20>;
0da65870 126 #power-domain-cells = <0>;
10ea1f18
CC		 127 };
128
0572b725 129 gic: interrupt-controller@10490000 {
b571abb3
TF		 130 compatible = "arm,cortex-a9-gic";
131 #interrupt-cells = <3>;
132 interrupt-controller;
cf286b40 133 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
b571abb3
TF		 134 };
135
0572b725 136 combiner: interrupt-controller@10440000 {
b571abb3
TF		 137 compatible = "samsung,exynos4210-combiner";
138 #interrupt-cells = <2>;
139 interrupt-controller;
140 reg = <0x10440000 0x1000>;
141 };
142
6f4b82a3
CP		 143 pmu {
144 compatible = "arm,cortex-a9-pmu";
145 interrupt-parent = <&combiner>;
146 interrupts = <2 2>, <3 2>;
147 };
148
9f052d0c 149 sys_reg: syscon@10010000 {
a64b1b22
SN		 150 compatible = "samsung,exynos4-sysreg", "syscon";
151 reg = <0x10010000 0x400>;
152 };
153
7b9613ac
CP		 154 pmu_system_controller: system-controller@10020000 {
155 compatible = "samsung,exynos4210-pmu", "syscon";
156 reg = <0x10020000 0x4000>;
8b283c02
MZ		 157 interrupt-controller;
158 #interrupt-cells = <3>;
159 interrupt-parent = <&gic>;
7b9613ac
CP		 160 };
161
8b7dd64c
AH		 162 dsi_0: dsi@11C80000 {
163 compatible = "samsung,exynos4210-mipi-dsi";
164 reg = <0x11C80000 0x10000>;
165 interrupts = <0 79 0>;
0da65870 166 power-domains = <&pd_lcd0>;
8b7dd64c
AH		 167 phys = <&mipi_phy 1>;
168 phy-names = "dsim";
c8366bac 169 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
4f01e650 170 clock-names = "bus_clk", "sclk_mipi";
8b7dd64c
AH		 171 status = "disabled";
172 #address-cells = <1>;
173 #size-cells = <0>;
174 };
175
d1b8a41d
SN		 176 camera {
177 compatible = "samsung,fimc", "simple-bus";
178 status = "disabled";
179 #address-cells = <1>;
180 #size-cells = <1>;
ee5eda64
SN		 181 #clock-cells = <1>;
182 clock-output-names = "cam_a_clkout", "cam_b_clkout";
d1b8a41d
SN		 183 ranges;
184
d1b8a41d
SN		 185 fimc_0: fimc@11800000 {
186 compatible = "samsung,exynos4210-fimc";
187 reg = <0x11800000 0x1000>;
188 interrupts = <0 84 0>;
1c75a78a 189 clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
d1b8a41d 190 clock-names = "fimc", "sclk_fimc";
0da65870 191 power-domains = <&pd_cam>;
d1b8a41d
SN		 192 samsung,sysreg = <&sys_reg>;
193 status = "disabled";
194 };
195
196 fimc_1: fimc@11810000 {
197 compatible = "samsung,exynos4210-fimc";
198 reg = <0x11810000 0x1000>;
199 interrupts = <0 85 0>;
1c75a78a 200 clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
d1b8a41d 201 clock-names = "fimc", "sclk_fimc";
0da65870 202 power-domains = <&pd_cam>;
d1b8a41d
SN		 203 samsung,sysreg = <&sys_reg>;
204 status = "disabled";
205 };
206
207 fimc_2: fimc@11820000 {
208 compatible = "samsung,exynos4210-fimc";
209 reg = <0x11820000 0x1000>;
210 interrupts = <0 86 0>;
1c75a78a 211 clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
d1b8a41d 212 clock-names = "fimc", "sclk_fimc";
0da65870 213 power-domains = <&pd_cam>;
d1b8a41d
SN		 214 samsung,sysreg = <&sys_reg>;
215 status = "disabled";
216 };
217
218 fimc_3: fimc@11830000 {
219 compatible = "samsung,exynos4210-fimc";
220 reg = <0x11830000 0x1000>;
221 interrupts = <0 87 0>;
1c75a78a 222 clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
d1b8a41d 223 clock-names = "fimc", "sclk_fimc";
0da65870 224 power-domains = <&pd_cam>;
d1b8a41d
SN		 225 samsung,sysreg = <&sys_reg>;
226 status = "disabled";
227 };
228
229 csis_0: csis@11880000 {
230 compatible = "samsung,exynos4210-csis";
231 reg = <0x11880000 0x4000>;
232 interrupts = <0 78 0>;
1c75a78a 233 clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
d1b8a41d
SN		 234 clock-names = "csis", "sclk_csis";
235 bus-width = <4>;
0da65870 236 power-domains = <&pd_cam>;
21b190d2
SN		 237 phys = <&mipi_phy 0>;
238 phy-names = "csis";
d1b8a41d
SN		 239 status = "disabled";
240 #address-cells = <1>;
241 #size-cells = <0>;
242 };
243
244 csis_1: csis@11890000 {
245 compatible = "samsung,exynos4210-csis";
246 reg = <0x11890000 0x4000>;
247 interrupts = <0 80 0>;
1c75a78a 248 clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
d1b8a41d
SN		 249 clock-names = "csis", "sclk_csis";
250 bus-width = <2>;
0da65870 251 power-domains = <&pd_cam>;
21b190d2
SN		 252 phys = <&mipi_phy 2>;
253 phy-names = "csis";
d1b8a41d
SN		 254 status = "disabled";
255 #address-cells = <1>;
256 #size-cells = <0>;
257 };
258 };
259
b571abb3
TF		 260 watchdog@10060000 {
261 compatible = "samsung,s3c2410-wdt";
262 reg = <0x10060000 0x100>;
263 interrupts = <0 43 0>;
1c75a78a 264 clocks = <&clock CLK_WDT>;
7ad34337 265 clock-names = "watchdog";
c9e23f00 266 status = "disabled";
b571abb3
TF		 267 };
268
269 rtc@10070000 {
270 compatible = "samsung,s3c6410-rtc";
271 reg = <0x10070000 0x100>;
8b283c02 272 interrupt-parent = <&pmu_system_controller>;
b571abb3 273 interrupts = <0 44 0>, <0 45 0>;
1c75a78a 274 clocks = <&clock CLK_RTC>;
7ad34337 275 clock-names = "rtc";
c9e23f00 276 status = "disabled";
b571abb3
TF		 277 };
278
279 keypad@100A0000 {
280 compatible = "samsung,s5pv210-keypad";
281 reg = <0x100A0000 0x100>;
282 interrupts = <0 109 0>;
1c75a78a 283 clocks = <&clock CLK_KEYIF>;
7ad34337 284 clock-names = "keypad";
c9e23f00 285 status = "disabled";
b571abb3
TF		 286 };
287
288 sdhci@12510000 {
289 compatible = "samsung,exynos4210-sdhci";
290 reg = <0x12510000 0x100>;
291 interrupts = <0 73 0>;
1c75a78a 292 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
7ad34337 293 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 294 status = "disabled";
b571abb3
TF		 295 };
296
297 sdhci@12520000 {
298 compatible = "samsung,exynos4210-sdhci";
299 reg = <0x12520000 0x100>;
300 interrupts = <0 74 0>;
1c75a78a 301 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
7ad34337 302 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 303 status = "disabled";
b571abb3
TF		 304 };
305
306 sdhci@12530000 {
307 compatible = "samsung,exynos4210-sdhci";
308 reg = <0x12530000 0x100>;
309 interrupts = <0 75 0>;
1c75a78a 310 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
7ad34337 311 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 312 status = "disabled";
b571abb3
TF		 313 };
314
315 sdhci@12540000 {
316 compatible = "samsung,exynos4210-sdhci";
317 reg = <0x12540000 0x100>;
318 interrupts = <0 76 0>;
1c75a78a 319 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
7ad34337 320 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 321 status = "disabled";
26bbd41f
CP		 322 };
323
324 exynos_usbphy: exynos-usbphy@125B0000 {
325 compatible = "samsung,exynos4210-usb2-phy";
326 reg = <0x125B0000 0x100>;
327 samsung,pmureg-phandle = <&pmu_system_controller>;
328 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
329 clock-names = "phy", "ref";
330 #phy-cells = <1>;
331 status = "disabled";
ef14d94c
CP		 332 };
333
334 hsotg@12480000 {
335 compatible = "samsung,s3c6400-hsotg";
336 reg = <0x12480000 0x20000>;
337 interrupts = <0 71 0>;
338 clocks = <&clock CLK_USB_DEVICE>;
339 clock-names = "otg";
340 phys = <&exynos_usbphy 0>;
341 phy-names = "usb2-phy";
342 status = "disabled";
b571abb3
TF		 343 };
344
6f9d02a0
DK		 345 ehci@12580000 {
346 compatible = "samsung,exynos4210-ehci";
347 reg = <0x12580000 0x100>;
348 interrupts = <0 70 0>;
1c75a78a 349 clocks = <&clock CLK_USB_HOST>;
6f9d02a0
DK		 350 clock-names = "usbhost";
351 status = "disabled";
366126d5
MS		 352 #address-cells = <1>;
353 #size-cells = <0>;
354 port@0 {
355 reg = <0>;
356 phys = <&exynos_usbphy 1>;
357 status = "disabled";
358 };
359 port@1 {
360 reg = <1>;
361 phys = <&exynos_usbphy 2>;
362 status = "disabled";
363 };
364 port@2 {
365 reg = <2>;
366 phys = <&exynos_usbphy 3>;
367 status = "disabled";
368 };
6f9d02a0
DK		 369 };
370
371 ohci@12590000 {
372 compatible = "samsung,exynos4210-ohci";
373 reg = <0x12590000 0x100>;
374 interrupts = <0 70 0>;
1c75a78a 375 clocks = <&clock CLK_USB_HOST>;
6f9d02a0
DK		 376 clock-names = "usbhost";
377 status = "disabled";
366126d5
MS		 378 #address-cells = <1>;
379 #size-cells = <0>;
380 port@0 {
381 reg = <0>;
382 phys = <&exynos_usbphy 1>;
383 status = "disabled";
384 };
6f9d02a0
DK		 385 };
386
990a7bfd 387 i2s1: i2s@13960000 {
fddcd300 388 compatible = "samsung,s3c6410-i2s";
990a7bfd
SN		 389 reg = <0x13960000 0x100>;
390 clocks = <&clock CLK_I2S1>;
391 clock-names = "iis";
3635acef
SN		 392 #clock-cells = <1>;
393 clock-output-names = "i2s_cdclk1";
990a7bfd
SN		 394 dmas = <&pdma1 12>, <&pdma1 11>;
395 dma-names = "tx", "rx";
16696337 396 #sound-dai-cells = <1>;
990a7bfd
SN		 397 status = "disabled";
398 };
399
400 i2s2: i2s@13970000 {
fddcd300 401 compatible = "samsung,s3c6410-i2s";
990a7bfd
SN		 402 reg = <0x13970000 0x100>;
403 clocks = <&clock CLK_I2S2>;
404 clock-names = "iis";
3635acef
SN		 405 #clock-cells = <1>;
406 clock-output-names = "i2s_cdclk2";
990a7bfd
SN		 407 dmas = <&pdma0 14>, <&pdma0 13>;
408 dma-names = "tx", "rx";
16696337 409 #sound-dai-cells = <1>;
990a7bfd
SN		 410 status = "disabled";
411 };
412
20901f74
SK		 413 mfc: codec@13400000 {
414 compatible = "samsung,mfc-v5";
415 reg = <0x13400000 0x10000>;
416 interrupts = <0 94 0>;
0da65870 417 power-domains = <&pd_mfc>;
e7160bfc
MS		 418 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
419 clock-names = "mfc", "sclk_mfc";
20901f74
SK		 420 status = "disabled";
421 };
422
1e64f48e 423 serial_0: serial@13800000 {
b571abb3
TF		 424 compatible = "samsung,exynos4210-uart";
425 reg = <0x13800000 0x100>;
426 interrupts = <0 52 0>;
1c75a78a 427 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
7ad34337 428 clock-names = "uart", "clk_uart_baud0";
c9e23f00 429 status = "disabled";
b571abb3
TF		 430 };
431
1e64f48e 432 serial_1: serial@13810000 {
b571abb3
TF		 433 compatible = "samsung,exynos4210-uart";
434 reg = <0x13810000 0x100>;
435 interrupts = <0 53 0>;
1c75a78a 436 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
7ad34337 437 clock-names = "uart", "clk_uart_baud0";
c9e23f00 438 status = "disabled";
b571abb3
TF		 439 };
440
1e64f48e 441 serial_2: serial@13820000 {
b571abb3
TF		 442 compatible = "samsung,exynos4210-uart";
443 reg = <0x13820000 0x100>;
444 interrupts = <0 54 0>;
1c75a78a 445 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
7ad34337 446 clock-names = "uart", "clk_uart_baud0";
c9e23f00 447 status = "disabled";
b571abb3
TF		 448 };
449
1e64f48e 450 serial_3: serial@13830000 {
b571abb3
TF		 451 compatible = "samsung,exynos4210-uart";
452 reg = <0x13830000 0x100>;
453 interrupts = <0 55 0>;
1c75a78a 454 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
7ad34337 455 clock-names = "uart", "clk_uart_baud0";
c9e23f00 456 status = "disabled";
b571abb3
TF		 457 };
458
34db4990 459 i2c_0: i2c@13860000 {
1b198d56
TF		 460 #address-cells = <1>;
461 #size-cells = <0>;
b571abb3
TF		 462 compatible = "samsung,s3c2440-i2c";
463 reg = <0x13860000 0x100>;
464 interrupts = <0 58 0>;
1c75a78a 465 clocks = <&clock CLK_I2C0>;
7ad34337 466 clock-names = "i2c";
045c8f63
TA		 467 pinctrl-names = "default";
468 pinctrl-0 = <&i2c0_bus>;
c9e23f00 469 status = "disabled";
b571abb3
TF		 470 };
471
34db4990 472 i2c_1: i2c@13870000 {
1b198d56
TF		 473 #address-cells = <1>;
474 #size-cells = <0>;
b571abb3
TF		 475 compatible = "samsung,s3c2440-i2c";
476 reg = <0x13870000 0x100>;
477 interrupts = <0 59 0>;
1c75a78a 478 clocks = <&clock CLK_I2C1>;
7ad34337 479 clock-names = "i2c";
045c8f63
TA		 480 pinctrl-names = "default";
481 pinctrl-0 = <&i2c1_bus>;
c9e23f00 482 status = "disabled";
b571abb3
TF		 483 };
484
34db4990 485 i2c_2: i2c@13880000 {
1b198d56
TF		 486 #address-cells = <1>;
487 #size-cells = <0>;
b571abb3
TF		 488 compatible = "samsung,s3c2440-i2c";
489 reg = <0x13880000 0x100>;
490 interrupts = <0 60 0>;
1c75a78a 491 clocks = <&clock CLK_I2C2>;
7ad34337 492 clock-names = "i2c";
9c869d1f
TS		 493 pinctrl-names = "default";
494 pinctrl-0 = <&i2c2_bus>;
c9e23f00 495 status = "disabled";
b571abb3
TF		 496 };
497
34db4990 498 i2c_3: i2c@13890000 {
1b198d56
TF		 499 #address-cells = <1>;
500 #size-cells = <0>;
b571abb3
TF		 501 compatible = "samsung,s3c2440-i2c";
502 reg = <0x13890000 0x100>;
503 interrupts = <0 61 0>;
1c75a78a 504 clocks = <&clock CLK_I2C3>;
7ad34337 505 clock-names = "i2c";
9c869d1f
TS		 506 pinctrl-names = "default";
507 pinctrl-0 = <&i2c3_bus>;
c9e23f00 508 status = "disabled";
b571abb3
TF		 509 };
510
34db4990 511 i2c_4: i2c@138A0000 {
1b198d56
TF		 512 #address-cells = <1>;
513 #size-cells = <0>;
b571abb3
TF		 514 compatible = "samsung,s3c2440-i2c";
515 reg = <0x138A0000 0x100>;
516 interrupts = <0 62 0>;
1c75a78a 517 clocks = <&clock CLK_I2C4>;
7ad34337 518 clock-names = "i2c";
9c869d1f
TS		 519 pinctrl-names = "default";
520 pinctrl-0 = <&i2c4_bus>;
c9e23f00 521 status = "disabled";
b571abb3
TF		 522 };
523
34db4990 524 i2c_5: i2c@138B0000 {
1b198d56
TF		 525 #address-cells = <1>;
526 #size-cells = <0>;
b571abb3
TF		 527 compatible = "samsung,s3c2440-i2c";
528 reg = <0x138B0000 0x100>;
529 interrupts = <0 63 0>;
1c75a78a 530 clocks = <&clock CLK_I2C5>;
7ad34337 531 clock-names = "i2c";
9c869d1f
TS		 532 pinctrl-names = "default";
533 pinctrl-0 = <&i2c5_bus>;
c9e23f00 534 status = "disabled";
b571abb3
TF		 535 };
536
34db4990 537 i2c_6: i2c@138C0000 {
1b198d56
TF		 538 #address-cells = <1>;
539 #size-cells = <0>;
b571abb3
TF		 540 compatible = "samsung,s3c2440-i2c";
541 reg = <0x138C0000 0x100>;
542 interrupts = <0 64 0>;
1c75a78a 543 clocks = <&clock CLK_I2C6>;
7ad34337 544 clock-names = "i2c";
9c869d1f
TS		 545 pinctrl-names = "default";
546 pinctrl-0 = <&i2c6_bus>;
c9e23f00 547 status = "disabled";
b571abb3
TF		 548 };
549
34db4990 550 i2c_7: i2c@138D0000 {
1b198d56
TF		 551 #address-cells = <1>;
552 #size-cells = <0>;
b571abb3
TF		 553 compatible = "samsung,s3c2440-i2c";
554 reg = <0x138D0000 0x100>;
555 interrupts = <0 65 0>;
1c75a78a 556 clocks = <&clock CLK_I2C7>;
7ad34337 557 clock-names = "i2c";
9c869d1f
TS		 558 pinctrl-names = "default";
559 pinctrl-0 = <&i2c7_bus>;
c9e23f00 560 status = "disabled";
b571abb3
TF		 561 };
562
ed80d4ca
MS		 563 i2c_8: i2c@138E0000 {
564 #address-cells = <1>;
565 #size-cells = <0>;
566 compatible = "samsung,s3c2440-hdmiphy-i2c";
567 reg = <0x138E0000 0x100>;
568 interrupts = <0 93 0>;
569 clocks = <&clock CLK_I2C_HDMI>;
570 clock-names = "i2c";
571 status = "disabled";
572
573 hdmi_i2c_phy: hdmiphy@38 {
574 compatible = "exynos4210-hdmiphy";
575 reg = <0x38>;
576 };
577 };
578
b571abb3
TF		 579 spi_0: spi@13920000 {
580 compatible = "samsung,exynos4210-spi";
581 reg = <0x13920000 0x100>;
582 interrupts = <0 66 0>;
48b3af1e
SN		 583 dmas = <&pdma0 7>, <&pdma0 6>;
584 dma-names = "tx", "rx";
b571abb3
TF		 585 #address-cells = <1>;
586 #size-cells = <0>;
1c75a78a 587 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
7ad34337 588 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 589 pinctrl-names = "default";
590 pinctrl-0 = <&spi0_bus>;
c9e23f00 591 status = "disabled";
b571abb3
TF		 592 };
593
594 spi_1: spi@13930000 {
595 compatible = "samsung,exynos4210-spi";
596 reg = <0x13930000 0x100>;
597 interrupts = <0 67 0>;
48b3af1e
SN		 598 dmas = <&pdma1 7>, <&pdma1 6>;
599 dma-names = "tx", "rx";
b571abb3
TF		 600 #address-cells = <1>;
601 #size-cells = <0>;
1c75a78a 602 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
7ad34337 603 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 604 pinctrl-names = "default";
605 pinctrl-0 = <&spi1_bus>;
c9e23f00 606 status = "disabled";
b571abb3
TF		 607 };
608
609 spi_2: spi@13940000 {
610 compatible = "samsung,exynos4210-spi";
611 reg = <0x13940000 0x100>;
612 interrupts = <0 68 0>;
48b3af1e
SN		 613 dmas = <&pdma0 9>, <&pdma0 8>;
614 dma-names = "tx", "rx";
b571abb3
TF		 615 #address-cells = <1>;
616 #size-cells = <0>;
1c75a78a 617 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
7ad34337 618 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 619 pinctrl-names = "default";
620 pinctrl-0 = <&spi2_bus>;
c9e23f00 621 status = "disabled";
b571abb3
TF		 622 };
623
cc4193ea
TF		 624 pwm@139D0000 {
625 compatible = "samsung,exynos4210-pwm";
626 reg = <0x139D0000 0x1000>;
627 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
1c75a78a 628 clocks = <&clock CLK_PWM>;
ec06dbe7 629 clock-names = "timers";
2fd82d33 630 #pwm-cells = <3>;
cc4193ea
TF		 631 status = "disabled";
632 };
633
b571abb3
TF		 634 amba {
635 #address-cells = <1>;
636 #size-cells = <1>;
637 compatible = "arm,amba-bus";
638 interrupt-parent = <&gic>;
639 ranges;
640
641 pdma0: pdma@12680000 {
642 compatible = "arm,pl330", "arm,primecell";
643 reg = <0x12680000 0x1000>;
644 interrupts = <0 35 0>;
1c75a78a 645 clocks = <&clock CLK_PDMA0>;
7ad34337 646 clock-names = "apb_pclk";
0a96d4d3
PV		 647 #dma-cells = <1>;
648 #dma-channels = <8>;
649 #dma-requests = <32>;
b571abb3
TF		 650 };
651
652 pdma1: pdma@12690000 {
653 compatible = "arm,pl330", "arm,primecell";
654 reg = <0x12690000 0x1000>;
655 interrupts = <0 36 0>;
1c75a78a 656 clocks = <&clock CLK_PDMA1>;
7ad34337 657 clock-names = "apb_pclk";
0a96d4d3
PV		 658 #dma-cells = <1>;
659 #dma-channels = <8>;
660 #dma-requests = <32>;
b571abb3 661 };
f7e758af
BZ		 662
663 mdma1: mdma@12850000 {
664 compatible = "arm,pl330", "arm,primecell";
665 reg = <0x12850000 0x1000>;
666 interrupts = <0 34 0>;
1c75a78a 667 clocks = <&clock CLK_MDMA>;
7ad34337 668 clock-names = "apb_pclk";
0a96d4d3
PV		 669 #dma-cells = <1>;
670 #dma-channels = <8>;
671 #dma-requests = <1>;
f7e758af 672 };
b571abb3 673 };
768c3a56
VS		 674
675 fimd: fimd@11c00000 {
676 compatible = "samsung,exynos4210-fimd";
677 interrupt-parent = <&combiner>;
678 reg = <0x11c00000 0x20000>;
679 interrupt-names = "fifo", "vsync", "lcd_sys";
680 interrupts = <11 0>, <11 1>, <11 2>;
1c75a78a 681 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
768c3a56 682 clock-names = "sclk_fimd", "fimd";
0da65870 683 power-domains = <&pd_lcd0>;
2eb62941 684 samsung,sysreg = <&sys_reg>;
768c3a56
VS		 685 status = "disabled";
686 };
30e0e476 687
9843a223
LM		 688 tmu: tmu@100C0000 {
689 #include "exynos4412-tmu-sensor-conf.dtsi"
690 };
691
ed80d4ca
MS		 692 hdmi: hdmi@12D00000 {
693 compatible = "samsung,exynos4210-hdmi";
694 reg = <0x12D00000 0x70000>;
695 interrupts = <0 92 0>;
696 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
697 "mout_hdmi";
698 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
699 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
700 <&clock CLK_MOUT_HDMI>;
701 phy = <&hdmi_i2c_phy>;
702 power-domains = <&pd_tv>;
703 samsung,syscon-phandle = <&pmu_system_controller>;
704 status = "disabled";
705 };
706
707 mixer: mixer@12C10000 {
708 compatible = "samsung,exynos4210-mixer";
709 interrupts = <0 91 0>;
710 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
711 power-domains = <&pd_tv>;
712 status = "disabled";
713 };
714
30e0e476
CC		 715 ppmu_dmc0: ppmu_dmc0@106a0000 {
716 compatible = "samsung,exynos-ppmu";
717 reg = <0x106a0000 0x2000>;
718 clocks = <&clock CLK_PPMUDMC0>;
719 clock-names = "ppmu";
720 status = "disabled";
721 };
722
723 ppmu_dmc1: ppmu_dmc1@106b0000 {
724 compatible = "samsung,exynos-ppmu";
725 reg = <0x106b0000 0x2000>;
726 clocks = <&clock CLK_PPMUDMC1>;
727 clock-names = "ppmu";
728 status = "disabled";
729 };
730
731 ppmu_cpu: ppmu_cpu@106c0000 {
732 compatible = "samsung,exynos-ppmu";
733 reg = <0x106c0000 0x2000>;
734 clocks = <&clock CLK_PPMUCPU>;
735 clock-names = "ppmu";
736 status = "disabled";
737 };
738
739 ppmu_acp: ppmu_acp@10ae0000 {
740 compatible = "samsung,exynos-ppmu";
741 reg = <0x106e0000 0x2000>;
742 status = "disabled";
743 };
744
745 ppmu_rightbus: ppmu_rightbus@112a0000 {
746 compatible = "samsung,exynos-ppmu";
747 reg = <0x112a0000 0x2000>;
748 clocks = <&clock CLK_PPMURIGHT>;
749 clock-names = "ppmu";
750 status = "disabled";
751 };
752
753 ppmu_leftbus: ppmu_leftbus0@116a0000 {
754 compatible = "samsung,exynos-ppmu";
755 reg = <0x116a0000 0x2000>;
756 clocks = <&clock CLK_PPMULEFT>;
757 clock-names = "ppmu";
758 status = "disabled";
759 };
760
761 ppmu_camif: ppmu_camif@11ac0000 {
762 compatible = "samsung,exynos-ppmu";
763 reg = <0x11ac0000 0x2000>;
764 clocks = <&clock CLK_PPMUCAMIF>;
765 clock-names = "ppmu";
766 status = "disabled";
767 };
768
769 ppmu_lcd0: ppmu_lcd0@11e40000 {
770 compatible = "samsung,exynos-ppmu";
771 reg = <0x11e40000 0x2000>;
772 clocks = <&clock CLK_PPMULCD0>;
773 clock-names = "ppmu";
774 status = "disabled";
775 };
776
777 ppmu_fsys: ppmu_g3d@12630000 {
778 compatible = "samsung,exynos-ppmu";
779 reg = <0x12630000 0x2000>;
780 status = "disabled";
781 };
782
783 ppmu_image: ppmu_image@12aa0000 {
784 compatible = "samsung,exynos-ppmu";
785 reg = <0x12aa0000 0x2000>;
786 clocks = <&clock CLK_PPMUIMAGE>;
787 clock-names = "ppmu";
788 status = "disabled";
789 };
790
791 ppmu_tv: ppmu_tv@12e40000 {
792 compatible = "samsung,exynos-ppmu";
793 reg = <0x12e40000 0x2000>;
794 clocks = <&clock CLK_PPMUTV>;
795 clock-names = "ppmu";
796 status = "disabled";
797 };
798
799 ppmu_g3d: ppmu_g3d@13220000 {
800 compatible = "samsung,exynos-ppmu";
801 reg = <0x13220000 0x2000>;
802 clocks = <&clock CLK_PPMUG3D>;
803 clock-names = "ppmu";
804 status = "disabled";
805 };
806
807 ppmu_mfc_left: ppmu_mfc_left@13660000 {
808 compatible = "samsung,exynos-ppmu";
809 reg = <0x13660000 0x2000>;
810 clocks = <&clock CLK_PPMUMFC_L>;
811 clock-names = "ppmu";
812 status = "disabled";
813 };
814
815 ppmu_mfc_right: ppmu_mfc_right@13670000 {
816 compatible = "samsung,exynos-ppmu";
817 reg = <0x13670000 0x2000>;
818 clocks = <&clock CLK_PPMUMFC_R>;
819 clock-names = "ppmu";
820 status = "disabled";
821 };
b571abb3 822};
Linux 6.x block layer and io_uring tree(s)