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ARM: dts: exynos: Fix imprecise abort on Mali GPU probe on Exynos4210
[linux-2.6-block.git] / arch / arm / boot / dts / exynos4.dtsi
CommitLineData
cc4637f7 1// SPDX-License-Identifier: GPL-2.0
b571abb3
TF		 2/*
3 * Samsung's Exynos4 SoC series common device tree source
4 *
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
7 * Copyright (c) 2010-2011 Linaro Ltd.
8 * www.linaro.org
9 *
10 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
11 * SoCs from Exynos4 series can include this file and provide values for SoCs
12 * specfic bindings.
13 *
14 * Note: This file does not include device nodes for all the controllers in
15 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
16 * nodes can be added to this file.
b571abb3
TF		 17 */
18
1c75a78a 19#include <dt-bindings/clock/exynos4.h>
990a7bfd 20#include <dt-bindings/clock/exynos-audss-clk.h>
74e2c958 21#include <dt-bindings/interrupt-controller/arm-gic.h>
63aee4fa 22#include <dt-bindings/interrupt-controller/irq.h>
b571abb3
TF		 23
24/ {
25 interrupt-parent = <&gic>;
1354835a
JMC		 26 #address-cells = <1>;
27 #size-cells = <1>;
b571abb3
TF		 28
29 aliases {
30 spi0 = &spi_0;
31 spi1 = &spi_1;
32 spi2 = &spi_2;
34db4990
DA		 33 i2c0 = &i2c_0;
34 i2c1 = &i2c_1;
35 i2c2 = &i2c_2;
36 i2c3 = &i2c_3;
37 i2c4 = &i2c_4;
38 i2c5 = &i2c_5;
39 i2c6 = &i2c_6;
40 i2c7 = &i2c_7;
ed80d4ca 41 i2c8 = &i2c_8;
d1b8a41d
SN		 42 csis0 = &csis_0;
43 csis1 = &csis_1;
44 fimc0 = &fimc_0;
45 fimc1 = &fimc_1;
46 fimc2 = &fimc_2;
47 fimc3 = &fimc_3;
1e64f48e
TF		 48 serial0 = &serial_0;
49 serial1 = &serial_1;
50 serial2 = &serial_2;
51 serial3 = &serial_3;
b571abb3
TF		 52 };
53
13efd80a
KK		 54 gpu: gpu@13000000 {
55 compatible = "samsung,exynos4210-mali", "arm,mali-400";
56 reg = <0x13000000 0x10000>;
13efd80a
KK		 57 /*
58 * CLK_G3D is not actually bus clock but a IP-level clock.
59 * The bus clock is not described in hardware manual.
60 */
61 clocks = <&clock CLK_G3D>,
62 <&clock CLK_SCLK_G3D>;
63 clock-names = "bus", "core";
64 power-domains = <&pd_g3d>;
65 status = "disabled";
66 };
67
be003001
KK		 68 pmu: pmu {
69 compatible = "arm,cortex-a9-pmu";
70 interrupt-parent = <&combiner>;
6da4e11c 71 status = "disabled";
be003001
KK		 72 };
73
73a901d0
MP		 74 soc: soc {
75 compatible = "simple-bus";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 ranges;
990a7bfd 79
73a901d0
MP		 80 clock_audss: clock-controller@3810000 {
81 compatible = "samsung,exynos4210-audss-clock";
82 reg = <0x03810000 0x0C>;
83 #clock-cells = <1>;
84 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
85 <&clock CLK_SCLK_AUDIO0>,
86 <&clock CLK_SCLK_AUDIO0>;
87 clock-names = "pll_ref", "pll_in", "sclk_audio",
88 "sclk_pcm_in";
89 };
096ee6ad 90
73a901d0
MP		 91 i2s0: i2s@3830000 {
92 compatible = "samsung,s5pv210-i2s";
93 reg = <0x03830000 0x100>;
94 clocks = <&clock_audss EXYNOS_I2S_BUS>,
95 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
96 <&clock_audss EXYNOS_SCLK_I2S>;
97 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
98 #clock-cells = <1>;
99 clock-output-names = "i2s_cdclk0";
100 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
101 dma-names = "tx", "rx", "tx-sec";
102 samsung,idma-addr = <0x03000000>;
103 #sound-dai-cells = <1>;
104 status = "disabled";
105 };
05a3589f 106
73a901d0
MP		 107 chipid@10000000 {
108 compatible = "samsung,exynos4210-chipid";
109 reg = <0x10000000 0x100>;
110 };
df4400ac 111
73a901d0
MP		 112 scu: snoop-control-unit@10500000 {
113 compatible = "arm,cortex-a9-scu";
114 reg = <0x10500000 0x2000>;
115 };
21b190d2 116
73a901d0
MP		 117 memory-controller@12570000 {
118 compatible = "samsung,exynos4210-srom";
119 reg = <0x12570000 0x14>;
120 };
91d88f03 121
73a901d0
MP		 122 mipi_phy: video-phy {
123 compatible = "samsung,s5pv210-mipi-video-phy";
124 #phy-cells = <1>;
125 syscon = <&pmu_system_controller>;
126 };
91d88f03 127
73a901d0
MP		 128 pd_mfc: mfc-power-domain@10023c40 {
129 compatible = "samsung,exynos4210-pd";
130 reg = <0x10023C40 0x20>;
131 #power-domain-cells = <0>;
132 label = "MFC";
133 };
91d88f03 134
73a901d0
MP		 135 pd_g3d: g3d-power-domain@10023c60 {
136 compatible = "samsung,exynos4210-pd";
137 reg = <0x10023C60 0x20>;
138 #power-domain-cells = <0>;
139 label = "G3D";
140 };
91d88f03 141
73a901d0
MP		 142 pd_lcd0: lcd0-power-domain@10023c80 {
143 compatible = "samsung,exynos4210-pd";
144 reg = <0x10023C80 0x20>;
145 #power-domain-cells = <0>;
146 label = "LCD0";
147 };
91d88f03 148
73a901d0
MP		 149 pd_tv: tv-power-domain@10023c20 {
150 compatible = "samsung,exynos4210-pd";
151 reg = <0x10023C20 0x20>;
152 #power-domain-cells = <0>;
153 power-domains = <&pd_lcd0>;
154 label = "TV";
155 };
b571abb3 156
73a901d0
MP		 157 pd_cam: cam-power-domain@10023c00 {
158 compatible = "samsung,exynos4210-pd";
159 reg = <0x10023C00 0x20>;
160 #power-domain-cells = <0>;
161 label = "CAM";
162 };
10ea1f18 163
73a901d0
MP		 164 pd_gps: gps-power-domain@10023ce0 {
165 compatible = "samsung,exynos4210-pd";
166 reg = <0x10023CE0 0x20>;
167 #power-domain-cells = <0>;
168 label = "GPS";
169 };
b571abb3 170
73a901d0
MP		 171 pd_gps_alive: gps-alive-power-domain@10023d00 {
172 compatible = "samsung,exynos4210-pd";
173 reg = <0x10023D00 0x20>;
174 #power-domain-cells = <0>;
175 label = "GPS alive";
176 };
b571abb3 177
73a901d0
MP		 178 gic: interrupt-controller@10490000 {
179 compatible = "arm,cortex-a9-gic";
180 #interrupt-cells = <3>;
181 interrupt-controller;
182 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
183 };
6f4b82a3 184
73a901d0
MP		 185 combiner: interrupt-controller@10440000 {
186 compatible = "samsung,exynos4210-combiner";
187 #interrupt-cells = <2>;
188 interrupt-controller;
189 reg = <0x10440000 0x1000>;
190 };
a64b1b22 191
73a901d0
MP		 192 sys_reg: syscon@10010000 {
193 compatible = "samsung,exynos4-sysreg", "syscon";
194 reg = <0x10010000 0x400>;
195 };
8b7dd64c 196
73a901d0
MP		 197 pmu_system_controller: system-controller@10020000 {
198 compatible = "samsung,exynos4210-pmu", "syscon";
199 reg = <0x10020000 0x4000>;
200 interrupt-controller;
201 #interrupt-cells = <3>;
202 interrupt-parent = <&gic>;
203 };
d1b8a41d 204
73a901d0
MP		 205 dsi_0: dsi@11c80000 {
206 compatible = "samsung,exynos4210-mipi-dsi";
207 reg = <0x11C80000 0x10000>;
208 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
209 power-domains = <&pd_lcd0>;
210 phys = <&mipi_phy 1>;
211 phy-names = "dsim";
212 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
213 clock-names = "bus_clk", "sclk_mipi";
d1b8a41d 214 status = "disabled";
73a901d0
MP		 215 #address-cells = <1>;
216 #size-cells = <0>;
d1b8a41d
SN		 217 };
218
73a901d0
MP		 219 camera: camera {
220 compatible = "samsung,fimc", "simple-bus";
d1b8a41d 221 status = "disabled";
73a901d0
MP		 222 #address-cells = <1>;
223 #size-cells = <1>;
224 #clock-cells = <1>;
225 clock-output-names = "cam_a_clkout", "cam_b_clkout";
226 ranges;
227
228 fimc_0: fimc@11800000 {
229 compatible = "samsung,exynos4210-fimc";
230 reg = <0x11800000 0x1000>;
231 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
232 clocks = <&clock CLK_FIMC0>,
233 <&clock CLK_SCLK_FIMC0>;
234 clock-names = "fimc", "sclk_fimc";
235 power-domains = <&pd_cam>;
236 samsung,sysreg = <&sys_reg>;
237 iommus = <&sysmmu_fimc0>;
238 status = "disabled";
239 };
240
241 fimc_1: fimc@11810000 {
242 compatible = "samsung,exynos4210-fimc";
243 reg = <0x11810000 0x1000>;
244 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
245 clocks = <&clock CLK_FIMC1>,
246 <&clock CLK_SCLK_FIMC1>;
247 clock-names = "fimc", "sclk_fimc";
248 power-domains = <&pd_cam>;
249 samsung,sysreg = <&sys_reg>;
250 iommus = <&sysmmu_fimc1>;
251 status = "disabled";
252 };
253
254 fimc_2: fimc@11820000 {
255 compatible = "samsung,exynos4210-fimc";
256 reg = <0x11820000 0x1000>;
257 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
258 clocks = <&clock CLK_FIMC2>,
259 <&clock CLK_SCLK_FIMC2>;
260 clock-names = "fimc", "sclk_fimc";
261 power-domains = <&pd_cam>;
262 samsung,sysreg = <&sys_reg>;
263 iommus = <&sysmmu_fimc2>;
264 status = "disabled";
265 };
266
267 fimc_3: fimc@11830000 {
268 compatible = "samsung,exynos4210-fimc";
269 reg = <0x11830000 0x1000>;
270 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
271 clocks = <&clock CLK_FIMC3>,
272 <&clock CLK_SCLK_FIMC3>;
273 clock-names = "fimc", "sclk_fimc";
274 power-domains = <&pd_cam>;
275 samsung,sysreg = <&sys_reg>;
276 iommus = <&sysmmu_fimc3>;
277 status = "disabled";
278 };
279
280 csis_0: csis@11880000 {
281 compatible = "samsung,exynos4210-csis";
282 reg = <0x11880000 0x4000>;
283 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
284 clocks = <&clock CLK_CSIS0>,
285 <&clock CLK_SCLK_CSIS0>;
286 clock-names = "csis", "sclk_csis";
287 bus-width = <4>;
288 power-domains = <&pd_cam>;
289 phys = <&mipi_phy 0>;
290 phy-names = "csis";
291 status = "disabled";
292 #address-cells = <1>;
293 #size-cells = <0>;
294 };
295
296 csis_1: csis@11890000 {
297 compatible = "samsung,exynos4210-csis";
298 reg = <0x11890000 0x4000>;
299 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
300 clocks = <&clock CLK_CSIS1>,
301 <&clock CLK_SCLK_CSIS1>;
302 clock-names = "csis", "sclk_csis";
303 bus-width = <2>;
304 power-domains = <&pd_cam>;
305 phys = <&mipi_phy 2>;
306 phy-names = "csis";
307 status = "disabled";
308 #address-cells = <1>;
309 #size-cells = <0>;
310 };
d1b8a41d
SN		 311 };
312
73a901d0
MP		 313 rtc: rtc@10070000 {
314 compatible = "samsung,s3c6410-rtc";
315 reg = <0x10070000 0x100>;
316 interrupt-parent = <&pmu_system_controller>;
317 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
318 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
319 clocks = <&clock CLK_RTC>;
320 clock-names = "rtc";
d1b8a41d
SN		 321 status = "disabled";
322 };
323
73a901d0
MP		 324 keypad: keypad@100a0000 {
325 compatible = "samsung,s5pv210-keypad";
326 reg = <0x100A0000 0x100>;
327 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
328 clocks = <&clock CLK_KEYIF>;
329 clock-names = "keypad";
d1b8a41d
SN		 330 status = "disabled";
331 };
332
73a901d0
MP		 333 sdhci_0: sdhci@12510000 {
334 compatible = "samsung,exynos4210-sdhci";
335 reg = <0x12510000 0x100>;
336 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
337 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
338 clock-names = "hsmmc", "mmc_busclk.2";
d1b8a41d 339 status = "disabled";
d1b8a41d
SN		 340 };
341
73a901d0
MP		 342 sdhci_1: sdhci@12520000 {
343 compatible = "samsung,exynos4210-sdhci";
344 reg = <0x12520000 0x100>;
345 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
346 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
347 clock-names = "hsmmc", "mmc_busclk.2";
d1b8a41d 348 status = "disabled";
d1b8a41d 349 };
b571abb3 350
73a901d0
MP		 351 sdhci_2: sdhci@12530000 {
352 compatible = "samsung,exynos4210-sdhci";
353 reg = <0x12530000 0x100>;
354 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
355 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
356 clock-names = "hsmmc", "mmc_busclk.2";
357 status = "disabled";
358 };
26bbd41f 359
73a901d0
MP		 360 sdhci_3: sdhci@12540000 {
361 compatible = "samsung,exynos4210-sdhci";
362 reg = <0x12540000 0x100>;
363 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
364 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
365 clock-names = "hsmmc", "mmc_busclk.2";
366 status = "disabled";
367 };
ef14d94c 368
73a901d0
MP		 369 exynos_usbphy: exynos-usbphy@125b0000 {
370 compatible = "samsung,exynos4210-usb2-phy";
371 reg = <0x125B0000 0x100>;
372 samsung,pmureg-phandle = <&pmu_system_controller>;
373 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
374 clock-names = "phy", "ref";
375 #phy-cells = <1>;
376 status = "disabled";
377 };
b571abb3 378
73a901d0
MP		 379 hsotg: hsotg@12480000 {
380 compatible = "samsung,s3c6400-hsotg";
381 reg = <0x12480000 0x20000>;
382 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
383 clocks = <&clock CLK_USB_DEVICE>;
384 clock-names = "otg";
385 phys = <&exynos_usbphy 0>;
386 phy-names = "usb2-phy";
dfaf06ba 387 status = "disabled";
366126d5 388 };
73a901d0
MP		 389
390 ehci: ehci@12580000 {
391 compatible = "samsung,exynos4210-ehci";
392 reg = <0x12580000 0x100>;
393 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
394 clocks = <&clock CLK_USB_HOST>;
395 clock-names = "usbhost";
dfaf06ba 396 status = "disabled";
73a901d0
MP		 397 #address-cells = <1>;
398 #size-cells = <0>;
399 port@0 {
400 reg = <0>;
401 phys = <&exynos_usbphy 1>;
402 status = "disabled";
403 };
404 port@1 {
405 reg = <1>;
406 phys = <&exynos_usbphy 2>;
407 status = "disabled";
408 };
409 port@2 {
410 reg = <2>;
411 phys = <&exynos_usbphy 3>;
412 status = "disabled";
413 };
366126d5 414 };
73a901d0
MP		 415
416 ohci: ohci@12590000 {
417 compatible = "samsung,exynos4210-ohci";
418 reg = <0x12590000 0x100>;
419 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
420 clocks = <&clock CLK_USB_HOST>;
421 clock-names = "usbhost";
dfaf06ba 422 status = "disabled";
73a901d0
MP		 423 #address-cells = <1>;
424 #size-cells = <0>;
425 port@0 {
426 reg = <0>;
427 phys = <&exynos_usbphy 1>;
428 status = "disabled";
429 };
366126d5 430 };
6f9d02a0 431
73a901d0
MP		 432 i2s1: i2s@13960000 {
433 compatible = "samsung,s3c6410-i2s";
434 reg = <0x13960000 0x100>;
435 clocks = <&clock CLK_I2S1>;
436 clock-names = "iis";
437 #clock-cells = <1>;
438 clock-output-names = "i2s_cdclk1";
439 dmas = <&pdma1 12>, <&pdma1 11>;
440 dma-names = "tx", "rx";
441 #sound-dai-cells = <1>;
dfaf06ba 442 status = "disabled";
366126d5 443 };
6f9d02a0 444
73a901d0
MP		 445 i2s2: i2s@13970000 {
446 compatible = "samsung,s3c6410-i2s";
447 reg = <0x13970000 0x100>;
448 clocks = <&clock CLK_I2S2>;
449 clock-names = "iis";
450 #clock-cells = <1>;
451 clock-output-names = "i2s_cdclk2";
452 dmas = <&pdma0 14>, <&pdma0 13>;
453 dma-names = "tx", "rx";
454 #sound-dai-cells = <1>;
455 status = "disabled";
456 };
990a7bfd 457
73a901d0
MP		 458 mfc: codec@13400000 {
459 compatible = "samsung,mfc-v5";
460 reg = <0x13400000 0x10000>;
461 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
462 power-domains = <&pd_mfc>;
463 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
464 clock-names = "mfc", "sclk_mfc";
465 iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>;
466 iommu-names = "left", "right";
467 };
990a7bfd 468
73a901d0
MP		 469 serial_0: serial@13800000 {
470 compatible = "samsung,exynos4210-uart";
471 reg = <0x13800000 0x100>;
472 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
473 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
474 clock-names = "uart", "clk_uart_baud0";
475 dmas = <&pdma0 15>, <&pdma0 16>;
476 dma-names = "rx", "tx";
477 status = "disabled";
478 };
20901f74 479
73a901d0
MP		 480 serial_1: serial@13810000 {
481 compatible = "samsung,exynos4210-uart";
482 reg = <0x13810000 0x100>;
483 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
484 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
485 clock-names = "uart", "clk_uart_baud0";
486 dmas = <&pdma1 15>, <&pdma1 16>;
487 dma-names = "rx", "tx";
488 status = "disabled";
489 };
b571abb3 490
73a901d0
MP		 491 serial_2: serial@13820000 {
492 compatible = "samsung,exynos4210-uart";
493 reg = <0x13820000 0x100>;
494 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
495 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
496 clock-names = "uart", "clk_uart_baud0";
497 dmas = <&pdma0 17>, <&pdma0 18>;
498 dma-names = "rx", "tx";
499 status = "disabled";
500 };
b571abb3 501
73a901d0
MP		 502 serial_3: serial@13830000 {
503 compatible = "samsung,exynos4210-uart";
504 reg = <0x13830000 0x100>;
505 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
506 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
507 clock-names = "uart", "clk_uart_baud0";
508 dmas = <&pdma1 17>, <&pdma1 18>;
509 dma-names = "rx", "tx";
510 status = "disabled";
511 };
b571abb3 512
73a901d0
MP		 513 i2c_0: i2c@13860000 {
514 #address-cells = <1>;
515 #size-cells = <0>;
516 compatible = "samsung,s3c2440-i2c";
517 reg = <0x13860000 0x100>;
518 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
519 clocks = <&clock CLK_I2C0>;
520 clock-names = "i2c";
521 pinctrl-names = "default";
522 pinctrl-0 = <&i2c0_bus>;
523 status = "disabled";
524 };
b571abb3 525
73a901d0
MP		 526 i2c_1: i2c@13870000 {
527 #address-cells = <1>;
528 #size-cells = <0>;
529 compatible = "samsung,s3c2440-i2c";
530 reg = <0x13870000 0x100>;
531 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
532 clocks = <&clock CLK_I2C1>;
533 clock-names = "i2c";
534 pinctrl-names = "default";
535 pinctrl-0 = <&i2c1_bus>;
536 status = "disabled";
537 };
b571abb3 538
73a901d0
MP		 539 i2c_2: i2c@13880000 {
540 #address-cells = <1>;
541 #size-cells = <0>;
542 compatible = "samsung,s3c2440-i2c";
543 reg = <0x13880000 0x100>;
544 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
545 clocks = <&clock CLK_I2C2>;
546 clock-names = "i2c";
547 pinctrl-names = "default";
548 pinctrl-0 = <&i2c2_bus>;
549 status = "disabled";
550 };
b571abb3 551
73a901d0
MP		 552 i2c_3: i2c@13890000 {
553 #address-cells = <1>;
554 #size-cells = <0>;
555 compatible = "samsung,s3c2440-i2c";
556 reg = <0x13890000 0x100>;
557 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&clock CLK_I2C3>;
559 clock-names = "i2c";
560 pinctrl-names = "default";
561 pinctrl-0 = <&i2c3_bus>;
562 status = "disabled";
563 };
b571abb3 564
73a901d0
MP		 565 i2c_4: i2c@138a0000 {
566 #address-cells = <1>;
567 #size-cells = <0>;
568 compatible = "samsung,s3c2440-i2c";
569 reg = <0x138A0000 0x100>;
570 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
571 clocks = <&clock CLK_I2C4>;
572 clock-names = "i2c";
573 pinctrl-names = "default";
574 pinctrl-0 = <&i2c4_bus>;
575 status = "disabled";
576 };
b571abb3 577
73a901d0
MP		 578 i2c_5: i2c@138b0000 {
579 #address-cells = <1>;
580 #size-cells = <0>;
581 compatible = "samsung,s3c2440-i2c";
582 reg = <0x138B0000 0x100>;
583 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
584 clocks = <&clock CLK_I2C5>;
585 clock-names = "i2c";
586 pinctrl-names = "default";
587 pinctrl-0 = <&i2c5_bus>;
588 status = "disabled";
589 };
b571abb3 590
73a901d0
MP		 591 i2c_6: i2c@138c0000 {
592 #address-cells = <1>;
593 #size-cells = <0>;
594 compatible = "samsung,s3c2440-i2c";
595 reg = <0x138C0000 0x100>;
596 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&clock CLK_I2C6>;
598 clock-names = "i2c";
599 pinctrl-names = "default";
600 pinctrl-0 = <&i2c6_bus>;
601 status = "disabled";
602 };
b571abb3 603
73a901d0
MP		 604 i2c_7: i2c@138d0000 {
605 #address-cells = <1>;
606 #size-cells = <0>;
607 compatible = "samsung,s3c2440-i2c";
608 reg = <0x138D0000 0x100>;
609 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
610 clocks = <&clock CLK_I2C7>;
611 clock-names = "i2c";
612 pinctrl-names = "default";
613 pinctrl-0 = <&i2c7_bus>;
614 status = "disabled";
615 };
b571abb3 616
73a901d0
MP		 617 i2c_8: i2c@138e0000 {
618 #address-cells = <1>;
619 #size-cells = <0>;
620 compatible = "samsung,s3c2440-hdmiphy-i2c";
621 reg = <0x138E0000 0x100>;
622 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
623 clocks = <&clock CLK_I2C_HDMI>;
624 clock-names = "i2c";
625 status = "disabled";
b571abb3 626
73a901d0
MP		 627 hdmi_i2c_phy: hdmiphy@38 {
628 compatible = "exynos4210-hdmiphy";
629 reg = <0x38>;
630 };
ed80d4ca 631 };
ed80d4ca 632
73a901d0
MP		 633 spi_0: spi@13920000 {
634 compatible = "samsung,exynos4210-spi";
635 reg = <0x13920000 0x100>;
636 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
637 dmas = <&pdma0 7>, <&pdma0 6>;
638 dma-names = "tx", "rx";
639 #address-cells = <1>;
640 #size-cells = <0>;
641 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
642 clock-names = "spi", "spi_busclk0";
643 pinctrl-names = "default";
644 pinctrl-0 = <&spi0_bus>;
645 status = "disabled";
646 };
b571abb3 647
73a901d0
MP		 648 spi_1: spi@13930000 {
649 compatible = "samsung,exynos4210-spi";
650 reg = <0x13930000 0x100>;
651 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
652 dmas = <&pdma1 7>, <&pdma1 6>;
653 dma-names = "tx", "rx";
654 #address-cells = <1>;
655 #size-cells = <0>;
656 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
657 clock-names = "spi", "spi_busclk0";
658 pinctrl-names = "default";
659 pinctrl-0 = <&spi1_bus>;
660 status = "disabled";
661 };
b571abb3 662
73a901d0
MP		 663 spi_2: spi@13940000 {
664 compatible = "samsung,exynos4210-spi";
665 reg = <0x13940000 0x100>;
666 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
667 dmas = <&pdma0 9>, <&pdma0 8>;
668 dma-names = "tx", "rx";
669 #address-cells = <1>;
670 #size-cells = <0>;
671 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
672 clock-names = "spi", "spi_busclk0";
673 pinctrl-names = "default";
674 pinctrl-0 = <&spi2_bus>;
675 status = "disabled";
676 };
cc4193ea 677
73a901d0
MP		 678 pwm: pwm@139d0000 {
679 compatible = "samsung,exynos4210-pwm";
680 reg = <0x139D0000 0x1000>;
681 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
682 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
683 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
684 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
686 clocks = <&clock CLK_PWM>;
687 clock-names = "timers";
688 #pwm-cells = <3>;
689 status = "disabled";
690 };
b571abb3 691
0fd5ff9e 692 amba: amba {
73a901d0
MP		 693 #address-cells = <1>;
694 #size-cells = <1>;
695 compatible = "simple-bus";
696 interrupt-parent = <&gic>;
697 ranges;
698
699 pdma0: pdma@12680000 {
700 compatible = "arm,pl330", "arm,primecell";
701 reg = <0x12680000 0x1000>;
702 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
703 clocks = <&clock CLK_PDMA0>;
704 clock-names = "apb_pclk";
705 #dma-cells = <1>;
706 #dma-channels = <8>;
707 #dma-requests = <32>;
708 };
709
710 pdma1: pdma@12690000 {
711 compatible = "arm,pl330", "arm,primecell";
712 reg = <0x12690000 0x1000>;
713 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
714 clocks = <&clock CLK_PDMA1>;
715 clock-names = "apb_pclk";
716 #dma-cells = <1>;
717 #dma-channels = <8>;
718 #dma-requests = <32>;
719 };
720
721 mdma1: mdma@12850000 {
722 compatible = "arm,pl330", "arm,primecell";
723 reg = <0x12850000 0x1000>;
724 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
725 clocks = <&clock CLK_MDMA>;
726 clock-names = "apb_pclk";
727 #dma-cells = <1>;
728 #dma-channels = <8>;
729 #dma-requests = <1>;
730 };
f7e758af 731 };
768c3a56 732
73a901d0
MP		 733 fimd: fimd@11c00000 {
734 compatible = "samsung,exynos4210-fimd";
735 interrupt-parent = <&combiner>;
736 reg = <0x11c00000 0x20000>;
737 interrupt-names = "fifo", "vsync", "lcd_sys";
738 interrupts = <11 0>, <11 1>, <11 2>;
739 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
740 clock-names = "sclk_fimd", "fimd";
741 power-domains = <&pd_lcd0>;
742 iommus = <&sysmmu_fimd0>;
743 samsung,sysreg = <&sys_reg>;
744 status = "disabled";
745 };
30e0e476 746
73a901d0
MP		 747 tmu: tmu@100c0000 {
748 interrupt-parent = <&combiner>;
749 reg = <0x100C0000 0x100>;
750 interrupts = <2 4>;
751 status = "disabled";
c05b799e 752 #thermal-sensor-cells = <0>;
73a901d0 753 };
9843a223 754
73a901d0
MP		 755 jpeg_codec: jpeg-codec@11840000 {
756 compatible = "samsung,exynos4210-jpeg";
757 reg = <0x11840000 0x1000>;
758 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
759 clocks = <&clock CLK_JPEG>;
760 clock-names = "jpeg";
761 power-domains = <&pd_cam>;
762 iommus = <&sysmmu_jpeg>;
763 };
f470b859 764
73a901d0
MP		 765 rotator: rotator@12810000 {
766 compatible = "samsung,exynos4210-rotator";
767 reg = <0x12810000 0x64>;
768 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
769 clocks = <&clock CLK_ROTATOR>;
770 clock-names = "rotator";
771 iommus = <&sysmmu_rotator>;
772 };
0c7e90b5 773
73a901d0
MP		 774 hdmi: hdmi@12d00000 {
775 compatible = "samsung,exynos4210-hdmi";
776 reg = <0x12D00000 0x70000>;
777 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
778 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
779 "sclk_hdmiphy", "mout_hdmi";
780 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
781 <&clock CLK_SCLK_PIXEL>,
782 <&clock CLK_SCLK_HDMIPHY>,
783 <&clock CLK_MOUT_HDMI>;
784 phy = <&hdmi_i2c_phy>;
785 power-domains = <&pd_tv>;
786 samsung,syscon-phandle = <&pmu_system_controller>;
787 #sound-dai-cells = <0>;
788 status = "disabled";
789 };
c795c88d 790
73a901d0
MP		 791 hdmicec: cec@100b0000 {
792 compatible = "samsung,s5p-cec";
793 reg = <0x100B0000 0x200>;
794 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
795 clocks = <&clock CLK_HDMI_CEC>;
796 clock-names = "hdmicec";
797 samsung,syscon-phandle = <&pmu_system_controller>;
798 hdmi-phandle = <&hdmi>;
799 pinctrl-names = "default";
800 pinctrl-0 = <&hdmi_cec>;
801 status = "disabled";
802 };
ed80d4ca 803
73a901d0
MP		 804 mixer: mixer@12c10000 {
805 compatible = "samsung,exynos4210-mixer";
806 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
807 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
808 power-domains = <&pd_tv>;
809 iommus = <&sysmmu_tv>;
810 status = "disabled";
811 };
ed80d4ca 812
73a901d0
MP		 813 ppmu_dmc0: ppmu_dmc0@106a0000 {
814 compatible = "samsung,exynos-ppmu";
815 reg = <0x106a0000 0x2000>;
816 clocks = <&clock CLK_PPMUDMC0>;
817 clock-names = "ppmu";
818 status = "disabled";
819 };
30e0e476 820
73a901d0
MP		 821 ppmu_dmc1: ppmu_dmc1@106b0000 {
822 compatible = "samsung,exynos-ppmu";
823 reg = <0x106b0000 0x2000>;
824 clocks = <&clock CLK_PPMUDMC1>;
825 clock-names = "ppmu";
826 status = "disabled";
827 };
30e0e476 828
73a901d0
MP		 829 ppmu_cpu: ppmu_cpu@106c0000 {
830 compatible = "samsung,exynos-ppmu";
831 reg = <0x106c0000 0x2000>;
832 clocks = <&clock CLK_PPMUCPU>;
833 clock-names = "ppmu";
834 status = "disabled";
835 };
30e0e476 836
73a901d0
MP		 837 ppmu_rightbus: ppmu_rightbus@112a0000 {
838 compatible = "samsung,exynos-ppmu";
839 reg = <0x112a0000 0x2000>;
840 clocks = <&clock CLK_PPMURIGHT>;
841 clock-names = "ppmu";
842 status = "disabled";
843 };
30e0e476 844
73a901d0
MP		 845 ppmu_leftbus: ppmu_leftbus0@116a0000 {
846 compatible = "samsung,exynos-ppmu";
847 reg = <0x116a0000 0x2000>;
848 clocks = <&clock CLK_PPMULEFT>;
849 clock-names = "ppmu";
850 status = "disabled";
851 };
30e0e476 852
73a901d0
MP		 853 ppmu_camif: ppmu_camif@11ac0000 {
854 compatible = "samsung,exynos-ppmu";
855 reg = <0x11ac0000 0x2000>;
856 clocks = <&clock CLK_PPMUCAMIF>;
857 clock-names = "ppmu";
858 status = "disabled";
859 };
30e0e476 860
73a901d0
MP		 861 ppmu_lcd0: ppmu_lcd0@11e40000 {
862 compatible = "samsung,exynos-ppmu";
863 reg = <0x11e40000 0x2000>;
864 clocks = <&clock CLK_PPMULCD0>;
865 clock-names = "ppmu";
866 status = "disabled";
867 };
30e0e476 868
73a901d0
MP		 869 ppmu_fsys: ppmu_g3d@12630000 {
870 compatible = "samsung,exynos-ppmu";
871 reg = <0x12630000 0x2000>;
872 status = "disabled";
873 };
30e0e476 874
73a901d0
MP		 875 ppmu_image: ppmu_image@12aa0000 {
876 compatible = "samsung,exynos-ppmu";
877 reg = <0x12aa0000 0x2000>;
878 clocks = <&clock CLK_PPMUIMAGE>;
879 clock-names = "ppmu";
880 status = "disabled";
881 };
30e0e476 882
73a901d0
MP		 883 ppmu_tv: ppmu_tv@12e40000 {
884 compatible = "samsung,exynos-ppmu";
885 reg = <0x12e40000 0x2000>;
886 clocks = <&clock CLK_PPMUTV>;
887 clock-names = "ppmu";
888 status = "disabled";
889 };
30e0e476 890
73a901d0
MP		 891 ppmu_g3d: ppmu_g3d@13220000 {
892 compatible = "samsung,exynos-ppmu";
893 reg = <0x13220000 0x2000>;
894 clocks = <&clock CLK_PPMUG3D>;
895 clock-names = "ppmu";
896 status = "disabled";
897 };
30e0e476 898
73a901d0
MP		 899 ppmu_mfc_left: ppmu_mfc_left@13660000 {
900 compatible = "samsung,exynos-ppmu";
901 reg = <0x13660000 0x2000>;
902 clocks = <&clock CLK_PPMUMFC_L>;
903 clock-names = "ppmu";
904 status = "disabled";
905 };
30e0e476 906
73a901d0
MP		 907 ppmu_mfc_right: ppmu_mfc_right@13670000 {
908 compatible = "samsung,exynos-ppmu";
909 reg = <0x13670000 0x2000>;
910 clocks = <&clock CLK_PPMUMFC_R>;
911 clock-names = "ppmu";
912 status = "disabled";
913 };
71d3a9fb 914
73a901d0
MP		 915 sysmmu_mfc_l: sysmmu@13620000 {
916 compatible = "samsung,exynos-sysmmu";
917 reg = <0x13620000 0x1000>;
918 interrupt-parent = <&combiner>;
919 interrupts = <5 5>;
920 clock-names = "sysmmu", "master";
921 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
922 power-domains = <&pd_mfc>;
923 #iommu-cells = <0>;
924 };
71d3a9fb 925
73a901d0
MP		 926 sysmmu_mfc_r: sysmmu@13630000 {
927 compatible = "samsung,exynos-sysmmu";
928 reg = <0x13630000 0x1000>;
929 interrupt-parent = <&combiner>;
930 interrupts = <5 6>;
931 clock-names = "sysmmu", "master";
932 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
933 power-domains = <&pd_mfc>;
934 #iommu-cells = <0>;
935 };
71d3a9fb 936
73a901d0
MP		 937 sysmmu_tv: sysmmu@12e20000 {
938 compatible = "samsung,exynos-sysmmu";
939 reg = <0x12E20000 0x1000>;
940 interrupt-parent = <&combiner>;
941 interrupts = <5 4>;
942 clock-names = "sysmmu", "master";
943 clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
944 power-domains = <&pd_tv>;
945 #iommu-cells = <0>;
946 };
71d3a9fb 947
73a901d0
MP		 948 sysmmu_fimc0: sysmmu@11a20000 {
949 compatible = "samsung,exynos-sysmmu";
950 reg = <0x11A20000 0x1000>;
951 interrupt-parent = <&combiner>;
952 interrupts = <4 2>;
953 clock-names = "sysmmu", "master";
954 clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>;
955 power-domains = <&pd_cam>;
956 #iommu-cells = <0>;
957 };
71d3a9fb 958
73a901d0
MP		 959 sysmmu_fimc1: sysmmu@11a30000 {
960 compatible = "samsung,exynos-sysmmu";
961 reg = <0x11A30000 0x1000>;
962 interrupt-parent = <&combiner>;
963 interrupts = <4 3>;
964 clock-names = "sysmmu", "master";
965 clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>;
966 power-domains = <&pd_cam>;
967 #iommu-cells = <0>;
968 };
71d3a9fb 969
73a901d0
MP		 970 sysmmu_fimc2: sysmmu@11a40000 {
971 compatible = "samsung,exynos-sysmmu";
972 reg = <0x11A40000 0x1000>;
973 interrupt-parent = <&combiner>;
974 interrupts = <4 4>;
975 clock-names = "sysmmu", "master";
976 clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>;
977 power-domains = <&pd_cam>;
978 #iommu-cells = <0>;
979 };
71d3a9fb 980
73a901d0
MP		 981 sysmmu_fimc3: sysmmu@11a50000 {
982 compatible = "samsung,exynos-sysmmu";
983 reg = <0x11A50000 0x1000>;
984 interrupt-parent = <&combiner>;
985 interrupts = <4 5>;
986 clock-names = "sysmmu", "master";
987 clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>;
988 power-domains = <&pd_cam>;
989 #iommu-cells = <0>;
990 };
71d3a9fb 991
73a901d0
MP		 992 sysmmu_jpeg: sysmmu@11a60000 {
993 compatible = "samsung,exynos-sysmmu";
994 reg = <0x11A60000 0x1000>;
995 interrupt-parent = <&combiner>;
996 interrupts = <4 6>;
997 clock-names = "sysmmu", "master";
998 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
999 power-domains = <&pd_cam>;
1000 #iommu-cells = <0>;
1001 };
71d3a9fb 1002
73a901d0
MP		 1003 sysmmu_rotator: sysmmu@12a30000 {
1004 compatible = "samsung,exynos-sysmmu";
1005 reg = <0x12A30000 0x1000>;
1006 interrupt-parent = <&combiner>;
1007 interrupts = <5 0>;
1008 clock-names = "sysmmu", "master";
1009 clocks = <&clock CLK_SMMU_ROTATOR>,
1010 <&clock CLK_ROTATOR>;
1011 #iommu-cells = <0>;
1012 };
71d3a9fb 1013
73a901d0
MP		 1014 sysmmu_fimd0: sysmmu@11e20000 {
1015 compatible = "samsung,exynos-sysmmu";
1016 reg = <0x11E20000 0x1000>;
1017 interrupt-parent = <&combiner>;
1018 interrupts = <5 2>;
1019 clock-names = "sysmmu", "master";
1020 clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>;
1021 power-domains = <&pd_lcd0>;
1022 #iommu-cells = <0>;
1023 };
a452977c 1024
73a901d0
MP		 1025 sss: sss@10830000 {
1026 compatible = "samsung,exynos4210-secss";
1027 reg = <0x10830000 0x300>;
1028 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1029 clocks = <&clock CLK_SSS>;
1030 clock-names = "secss";
1031 };
6c5eb1db 1032
73a901d0
MP		 1033 prng: rng@10830400 {
1034 compatible = "samsung,exynos4-rng";
1035 reg = <0x10830400 0x200>;
1036 clocks = <&clock CLK_SSS>;
1037 clock-names = "secss";
1038 };
a452977c 1039 };
b571abb3 1040};
a03e9dac
KK		 1041
1042#include "exynos-syscon-restart.dtsi"
Linux 6.x block layer and io_uring tree(s)