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7d6ab9b8 RH |
1 | /* |
2 | * Copyright 2011-2012 Calxeda, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
17 | /dts-v1/; | |
18 | ||
19 | /* First 4KB has pen for secondary cores. */ | |
20 | /memreserve/ 0x00000000 0x0001000; | |
21 | ||
22 | / { | |
23 | model = "Calxeda ECX-2000"; | |
24 | compatible = "calxeda,ecx-2000"; | |
25 | #address-cells = <2>; | |
26 | #size-cells = <2>; | |
27 | clock-ranges; | |
28 | ||
29 | cpus { | |
30 | #address-cells = <1>; | |
31 | #size-cells = <0>; | |
32 | ||
33 | cpu@0 { | |
34 | compatible = "arm,cortex-a15"; | |
36ff67bc | 35 | device_type = "cpu"; |
7d6ab9b8 RH |
36 | reg = <0>; |
37 | clocks = <&a9pll>; | |
38 | clock-names = "cpu"; | |
39 | }; | |
40 | ||
41 | cpu@1 { | |
42 | compatible = "arm,cortex-a15"; | |
36ff67bc | 43 | device_type = "cpu"; |
7d6ab9b8 RH |
44 | reg = <1>; |
45 | clocks = <&a9pll>; | |
46 | clock-names = "cpu"; | |
47 | }; | |
48 | ||
49 | cpu@2 { | |
50 | compatible = "arm,cortex-a15"; | |
36ff67bc | 51 | device_type = "cpu"; |
7d6ab9b8 RH |
52 | reg = <2>; |
53 | clocks = <&a9pll>; | |
54 | clock-names = "cpu"; | |
55 | }; | |
56 | ||
57 | cpu@3 { | |
58 | compatible = "arm,cortex-a15"; | |
36ff67bc | 59 | device_type = "cpu"; |
7d6ab9b8 RH |
60 | reg = <3>; |
61 | clocks = <&a9pll>; | |
62 | clock-names = "cpu"; | |
63 | }; | |
64 | }; | |
65 | ||
66 | memory@0 { | |
67 | name = "memory"; | |
68 | device_type = "memory"; | |
69 | reg = <0x00000000 0x00000000 0x00000000 0xff800000>; | |
70 | }; | |
71 | ||
72 | memory@200000000 { | |
73 | name = "memory"; | |
74 | device_type = "memory"; | |
75 | reg = <0x00000002 0x00000000 0x00000003 0x00000000>; | |
76 | }; | |
77 | ||
78 | soc { | |
79 | ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; | |
80 | ||
81 | timer { | |
82 | compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, | |
83 | <1 14 0xf08>, | |
84 | <1 11 0xf08>, | |
85 | <1 10 0xf08>; | |
86 | }; | |
87 | ||
982ac2a7 RH |
88 | memory-controller@fff00000 { |
89 | compatible = "calxeda,ecx-2000-ddr-ctrl"; | |
90 | reg = <0xfff00000 0x1000>; | |
91 | interrupts = <0 91 4>; | |
92 | }; | |
93 | ||
7d6ab9b8 RH |
94 | intc: interrupt-controller@fff11000 { |
95 | compatible = "arm,cortex-a15-gic"; | |
96 | #interrupt-cells = <3>; | |
97 | #size-cells = <0>; | |
98 | #address-cells = <1>; | |
99 | interrupt-controller; | |
100 | interrupts = <1 9 0xf04>; | |
101 | reg = <0xfff11000 0x1000>, | |
102 | <0xfff12000 0x1000>, | |
103 | <0xfff14000 0x2000>, | |
104 | <0xfff16000 0x2000>; | |
105 | }; | |
106 | ||
107 | pmu { | |
108 | compatible = "arm,cortex-a9-pmu"; | |
109 | interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; | |
110 | }; | |
111 | }; | |
112 | }; | |
113 | ||
114 | /include/ "ecx-common.dtsi" |