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33085b3e HS |
1 | /* |
2 | * Copyright 2012 DENX Software Engineering GmbH | |
3 | * Heiko Schocher <hs@denx.de> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | */ | |
10 | /include/ "skeleton.dtsi" | |
11 | ||
12 | / { | |
13 | arm { | |
14 | #address-cells = <1>; | |
15 | #size-cells = <1>; | |
16 | ranges; | |
17 | intc: interrupt-controller { | |
18 | compatible = "ti,cp-intc"; | |
19 | interrupt-controller; | |
20 | #interrupt-cells = <1>; | |
21 | ti,intc-size = <100>; | |
22 | reg = <0xfffee000 0x2000>; | |
23 | }; | |
24 | }; | |
25 | soc { | |
26 | compatible = "simple-bus"; | |
27 | model = "da850"; | |
28 | #address-cells = <1>; | |
29 | #size-cells = <1>; | |
30 | ranges = <0x0 0x01c00000 0x400000>; | |
31 | ||
1faaba3d KA |
32 | pmx_core: pinmux@1c14120 { |
33 | compatible = "pinctrl-single"; | |
34 | reg = <0x14120 0x50>; | |
35 | #address-cells = <1>; | |
36 | #size-cells = <0>; | |
37 | pinctrl-single,bit-per-mux; | |
38 | pinctrl-single,register-width = <32>; | |
39 | pinctrl-single,function-mask = <0xffffffff>; | |
40 | status = "disabled"; | |
99b8800c KA |
41 | |
42 | nand_cs3_pins: pinmux_nand_pins { | |
43 | pinctrl-single,bits = < | |
44 | /* EMA_OE, EMA_WE */ | |
45 | 0x1c 0x00110000 0x00ff0000 | |
46 | /* EMA_CS[4],EMA_CS[3]*/ | |
47 | 0x1c 0x00000110 0x00000ff0 | |
48 | /* | |
49 | * EMA_D[0], EMA_D[1], EMA_D[2], | |
50 | * EMA_D[3], EMA_D[4], EMA_D[5], | |
51 | * EMA_D[6], EMA_D[7] | |
52 | */ | |
53 | 0x24 0x11111111 0xffffffff | |
54 | /* EMA_A[1], EMA_A[2] */ | |
55 | 0x30 0x01100000 0x0ff00000 | |
56 | >; | |
57 | }; | |
1faaba3d | 58 | }; |
33085b3e HS |
59 | serial0: serial@1c42000 { |
60 | compatible = "ns16550a"; | |
61 | reg = <0x42000 0x100>; | |
62 | clock-frequency = <150000000>; | |
63 | reg-shift = <2>; | |
64 | interrupts = <25>; | |
65 | interrupt-parent = <&intc>; | |
66 | status = "disabled"; | |
67 | }; | |
68 | serial1: serial@1d0c000 { | |
69 | compatible = "ns16550a"; | |
70 | reg = <0x10c000 0x100>; | |
71 | clock-frequency = <150000000>; | |
72 | reg-shift = <2>; | |
73 | interrupts = <53>; | |
74 | interrupt-parent = <&intc>; | |
75 | status = "disabled"; | |
76 | }; | |
77 | serial2: serial@1d0d000 { | |
78 | compatible = "ns16550a"; | |
79 | reg = <0x10d000 0x100>; | |
80 | clock-frequency = <150000000>; | |
81 | reg-shift = <2>; | |
82 | interrupts = <61>; | |
83 | interrupt-parent = <&intc>; | |
84 | status = "disabled"; | |
85 | }; | |
86 | }; | |
99b8800c KA |
87 | nand_cs3@62000000 { |
88 | compatible = "ti,davinci-nand"; | |
89 | reg = <0x62000000 0x807ff | |
90 | 0x68000000 0x8000>; | |
91 | ti,davinci-chipselect = <1>; | |
92 | ti,davinci-mask-ale = <0>; | |
93 | ti,davinci-mask-cle = <0>; | |
94 | ti,davinci-mask-chipsel = <0>; | |
95 | ti,davinci-ecc-mode = "hw"; | |
96 | ti,davinci-ecc-bits = <4>; | |
97 | ti,davinci-nand-use-bbt; | |
98 | status = "disabled"; | |
99 | }; | |
33085b3e | 100 | }; |