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33085b3e HS |
1 | /* |
2 | * Copyright 2012 DENX Software Engineering GmbH | |
3 | * Heiko Schocher <hs@denx.de> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | */ | |
a2bcd776 | 10 | #include "skeleton.dtsi" |
33085b3e HS |
11 | |
12 | / { | |
13 | arm { | |
14 | #address-cells = <1>; | |
15 | #size-cells = <1>; | |
16 | ranges; | |
17 | intc: interrupt-controller { | |
18 | compatible = "ti,cp-intc"; | |
19 | interrupt-controller; | |
20 | #interrupt-cells = <1>; | |
21 | ti,intc-size = <100>; | |
22 | reg = <0xfffee000 0x2000>; | |
23 | }; | |
24 | }; | |
25 | soc { | |
26 | compatible = "simple-bus"; | |
27 | model = "da850"; | |
28 | #address-cells = <1>; | |
29 | #size-cells = <1>; | |
30 | ranges = <0x0 0x01c00000 0x400000>; | |
c57ff58d | 31 | interrupt-parent = <&intc>; |
33085b3e | 32 | |
1faaba3d KA |
33 | pmx_core: pinmux@1c14120 { |
34 | compatible = "pinctrl-single"; | |
35 | reg = <0x14120 0x50>; | |
36 | #address-cells = <1>; | |
37 | #size-cells = <0>; | |
38 | pinctrl-single,bit-per-mux; | |
39 | pinctrl-single,register-width = <32>; | |
055cb2a9 | 40 | pinctrl-single,function-mask = <0xf>; |
1faaba3d | 41 | status = "disabled"; |
99b8800c KA |
42 | |
43 | nand_cs3_pins: pinmux_nand_pins { | |
44 | pinctrl-single,bits = < | |
45 | /* EMA_OE, EMA_WE */ | |
46 | 0x1c 0x00110000 0x00ff0000 | |
47 | /* EMA_CS[4],EMA_CS[3]*/ | |
48 | 0x1c 0x00000110 0x00000ff0 | |
49 | /* | |
50 | * EMA_D[0], EMA_D[1], EMA_D[2], | |
51 | * EMA_D[3], EMA_D[4], EMA_D[5], | |
52 | * EMA_D[6], EMA_D[7] | |
53 | */ | |
54 | 0x24 0x11111111 0xffffffff | |
55 | /* EMA_A[1], EMA_A[2] */ | |
56 | 0x30 0x01100000 0x0ff00000 | |
57 | >; | |
58 | }; | |
01729ccf VBM |
59 | i2c0_pins: pinmux_i2c0_pins { |
60 | pinctrl-single,bits = < | |
61 | /* I2C0_SDA,I2C0_SCL */ | |
62 | 0x10 0x00002200 0x0000ff00 | |
63 | >; | |
64 | }; | |
88df4122 MP |
65 | mmc0_pins: pinmux_mmc_pins { |
66 | pinctrl-single,bits = < | |
67 | /* MMCSD0_DAT[3] MMCSD0_DAT[2] | |
68 | * MMCSD0_DAT[1] MMCSD0_DAT[0] | |
69 | * MMCSD0_CMD MMCSD0_CLK | |
70 | */ | |
71 | 0x28 0x00222222 0x00ffffff | |
72 | >; | |
73 | }; | |
64fa59c4 PA |
74 | ehrpwm0a_pins: pinmux_ehrpwm0a_pins { |
75 | pinctrl-single,bits = < | |
76 | /* EPWM0A */ | |
77 | 0xc 0x00000002 0x0000000f | |
78 | >; | |
79 | }; | |
80 | ehrpwm0b_pins: pinmux_ehrpwm0b_pins { | |
81 | pinctrl-single,bits = < | |
82 | /* EPWM0B */ | |
83 | 0xc 0x00000020 0x000000f0 | |
84 | >; | |
85 | }; | |
86 | ehrpwm1a_pins: pinmux_ehrpwm1a_pins { | |
87 | pinctrl-single,bits = < | |
88 | /* EPWM1A */ | |
89 | 0x14 0x00000002 0x0000000f | |
90 | >; | |
91 | }; | |
92 | ehrpwm1b_pins: pinmux_ehrpwm1b_pins { | |
93 | pinctrl-single,bits = < | |
94 | /* EPWM1B */ | |
95 | 0x14 0x00000020 0x000000f0 | |
96 | >; | |
97 | }; | |
98 | ecap0_pins: pinmux_ecap0_pins { | |
99 | pinctrl-single,bits = < | |
100 | /* ECAP0_APWM0 */ | |
101 | 0x8 0x20000000 0xf0000000 | |
102 | >; | |
103 | }; | |
104 | ecap1_pins: pinmux_ecap1_pins { | |
105 | pinctrl-single,bits = < | |
106 | /* ECAP1_APWM1 */ | |
107 | 0x4 0x40000000 0xf0000000 | |
108 | >; | |
109 | }; | |
110 | ecap2_pins: pinmux_ecap2_pins { | |
111 | pinctrl-single,bits = < | |
112 | /* ECAP2_APWM2 */ | |
113 | 0x4 0x00000004 0x0000000f | |
114 | >; | |
115 | }; | |
c6347e48 MP |
116 | spi1_pins: pinmux_spi_pins { |
117 | pinctrl-single,bits = < | |
118 | /* SIMO, SOMI, CLK */ | |
119 | 0x14 0x00110100 0x00ff0f00 | |
120 | >; | |
121 | }; | |
122 | spi1_cs0_pin: pinmux_spi1_cs0 { | |
123 | pinctrl-single,bits = < | |
124 | /* CS0 */ | |
125 | 0x14 0x00000010 0x000000f0 | |
126 | >; | |
127 | }; | |
1faaba3d | 128 | }; |
33085b3e HS |
129 | serial0: serial@1c42000 { |
130 | compatible = "ns16550a"; | |
131 | reg = <0x42000 0x100>; | |
132 | clock-frequency = <150000000>; | |
133 | reg-shift = <2>; | |
134 | interrupts = <25>; | |
33085b3e HS |
135 | status = "disabled"; |
136 | }; | |
137 | serial1: serial@1d0c000 { | |
138 | compatible = "ns16550a"; | |
139 | reg = <0x10c000 0x100>; | |
140 | clock-frequency = <150000000>; | |
141 | reg-shift = <2>; | |
142 | interrupts = <53>; | |
33085b3e HS |
143 | status = "disabled"; |
144 | }; | |
145 | serial2: serial@1d0d000 { | |
146 | compatible = "ns16550a"; | |
147 | reg = <0x10d000 0x100>; | |
148 | clock-frequency = <150000000>; | |
149 | reg-shift = <2>; | |
150 | interrupts = <61>; | |
33085b3e HS |
151 | status = "disabled"; |
152 | }; | |
1661636d MK |
153 | rtc0: rtc@1c23000 { |
154 | compatible = "ti,da830-rtc"; | |
155 | reg = <0x23000 0x1000>; | |
156 | interrupts = <19 | |
157 | 19>; | |
158 | status = "disabled"; | |
159 | }; | |
01729ccf VBM |
160 | i2c0: i2c@1c22000 { |
161 | compatible = "ti,davinci-i2c"; | |
162 | reg = <0x22000 0x1000>; | |
163 | interrupts = <15>; | |
164 | #address-cells = <1>; | |
165 | #size-cells = <0>; | |
166 | status = "disabled"; | |
167 | }; | |
518f97db KA |
168 | wdt: wdt@1c21000 { |
169 | compatible = "ti,davinci-wdt"; | |
170 | reg = <0x21000 0x1000>; | |
171 | status = "disabled"; | |
172 | }; | |
88df4122 MP |
173 | mmc0: mmc@1c40000 { |
174 | compatible = "ti,da830-mmc"; | |
175 | reg = <0x40000 0x1000>; | |
176 | interrupts = <16>; | |
177 | status = "disabled"; | |
178 | }; | |
64fa59c4 PA |
179 | ehrpwm0: ehrpwm@01f00000 { |
180 | compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; | |
181 | #pwm-cells = <3>; | |
182 | reg = <0x300000 0x2000>; | |
183 | status = "disabled"; | |
184 | }; | |
185 | ehrpwm1: ehrpwm@01f02000 { | |
186 | compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; | |
187 | #pwm-cells = <3>; | |
188 | reg = <0x302000 0x2000>; | |
189 | status = "disabled"; | |
190 | }; | |
191 | ecap0: ecap@01f06000 { | |
192 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; | |
193 | #pwm-cells = <3>; | |
194 | reg = <0x306000 0x80>; | |
195 | status = "disabled"; | |
196 | }; | |
197 | ecap1: ecap@01f07000 { | |
198 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; | |
199 | #pwm-cells = <3>; | |
200 | reg = <0x307000 0x80>; | |
201 | status = "disabled"; | |
202 | }; | |
203 | ecap2: ecap@01f08000 { | |
204 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; | |
205 | #pwm-cells = <3>; | |
206 | reg = <0x308000 0x80>; | |
207 | status = "disabled"; | |
208 | }; | |
c6347e48 MP |
209 | spi1: spi@1f0e000 { |
210 | #address-cells = <1>; | |
211 | #size-cells = <0>; | |
212 | compatible = "ti,da830-spi"; | |
213 | reg = <0x30e000 0x1000>; | |
214 | num-cs = <4>; | |
215 | ti,davinci-spi-intr-line = <1>; | |
216 | interrupts = <56>; | |
217 | status = "disabled"; | |
218 | }; | |
33085b3e | 219 | }; |
99b8800c KA |
220 | nand_cs3@62000000 { |
221 | compatible = "ti,davinci-nand"; | |
222 | reg = <0x62000000 0x807ff | |
223 | 0x68000000 0x8000>; | |
224 | ti,davinci-chipselect = <1>; | |
225 | ti,davinci-mask-ale = <0>; | |
226 | ti,davinci-mask-cle = <0>; | |
227 | ti,davinci-mask-chipsel = <0>; | |
228 | ti,davinci-ecc-mode = "hw"; | |
229 | ti,davinci-ecc-bits = <4>; | |
230 | ti,davinci-nand-use-bbt; | |
231 | status = "disabled"; | |
232 | }; | |
33085b3e | 233 | }; |