[linux-2.6-block.git] / arch / arm / boot / dts / bcm21664.dtsi

/*
 * Copyright (C) 2014 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "dt-bindings/clock/bcm21664.h"

#include "skeleton.dtsi"

/ {
	model = "BCM21664 SoC";
	compatible = "brcm,bcm21664";
	interrupt-parent = <&gic>;

	chosen {
		bootargs = "console=ttyS0,115200n8";
	};

	gic: interrupt-controller@3ff00100 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0x3ff01000 0x1000>,
		      <0x3ff00100 0x100>;
	};

	smc@0x3404e000 {
		compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
		reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
	};

	uart@3e000000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e000000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e001000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e001000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e002000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e002000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	L2: l2-cache {
		compatible = "arm,pl310-cache";
		reg = <0x3ff20000 0x1000>;
		cache-unified;
		cache-level = <2>;
	};

	brcm,resetmgr@35001f00 {
		compatible = "brcm,bcm21664-resetmgr";
		reg = <0x35001f00 0x24>;
	};

	timer@35006000 {
		compatible = "brcm,kona-timer";
		reg = <0x35006000 0x1c>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
	};

	gpio: gpio@35003000 {
		compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
		reg = <0x35003000 0x524>;
		interrupts =
		       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
		gpio-controller;
		interrupt-controller;
	};

	sdio1: sdio@3f180000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f180000 0x801c>;
		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
		status = "disabled";
	};

	sdio2: sdio@3f190000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f190000 0x801c>;
		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
		status = "disabled";
	};

	sdio3: sdio@3f1a0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1a0000 0x801c>;
		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
		status = "disabled";
	};

	sdio4: sdio@3f1b0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1b0000 0x801c>;
		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
		status = "disabled";
	};

	i2c@3e016000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e016000 0x70>;
		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
		status = "disabled";
	};

	i2c@3e017000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e017000 0x70>;
		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
		status = "disabled";
	};

	i2c@3e018000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e018000 0x70>;
		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
		status = "disabled";
	};

	i2c@3e01c000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e01c000 0x70>;
		interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
		status = "disabled";
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/*
		 * Fixed clocks are defined before CCUs whose
		 * clocks may depend on them.
		 */

		ref_32k_clk: ref_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		bbl_32k_clk: bbl_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		ref_13m_clk: ref_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		var_13m_clk: var_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		dft_19_5m_clk: dft_19_5m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <19500000>;
		};

		ref_crystal_clk: ref_crystal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <26000000>;
		};

		ref_52m_clk: ref_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		var_52m_clk: var_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		usb_otg_ahb_clk: usb_otg_ahb {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		ref_96m_clk: ref_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		var_96m_clk: var_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		ref_104m_clk: ref_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		var_104m_clk: var_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		ref_156m_clk: ref_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		var_156m_clk: var_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		root_ccu: root_ccu {
			compatible = BCM21664_DT_ROOT_CCU_COMPAT;
			reg = <0x35001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "frac_1m";
		};

		aon_ccu: aon_ccu {
			compatible = BCM21664_DT_AON_CCU_COMPAT;
			reg = <0x35002000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "hub_timer";
		};

		master_ccu: master_ccu {
			compatible = BCM21664_DT_MASTER_CCU_COMPAT;
			reg = <0x3f001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "sdio1",
					     "sdio2",
					     "sdio3",
					     "sdio4",
					     "sdio1_sleep",
					     "sdio2_sleep",
					     "sdio3_sleep",
					     "sdio4_sleep";
		};

		slave_ccu: slave_ccu {
			compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
			reg = <0x3e011000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "uartb",
					     "uartb2",
					     "uartb3",
					     "bsc1",
					     "bsc2",
					     "bsc3",
					     "bsc4";
		};
	};

	usbotg: usb@3f120000 {
		compatible = "snps,dwc2";
		reg = <0x3f120000 0x10000>;
		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&usb_otg_ahb_clk>;
		clock-names = "otg";
		phys = <&usbphy>;
		phy-names = "usb2-phy";
		status = "disabled";
	};

	usbphy: usb-phy@3f130000 {
		compatible = "brcm,kona-usb2-phy";
		reg = <0x3f130000 0x28>;
		#phy-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
2eba905e MM	1	/*
	2	* Copyright (C) 2014 Broadcom Corporation
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License as
	6	* published by the Free Software Foundation version 2.
	7	*
	8	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	9	* kind, whether express or implied; without even the implied warranty
	10	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
	14	#include <dt-bindings/interrupt-controller/arm-gic.h>
	15	#include <dt-bindings/interrupt-controller/irq.h>
	16
8d90c5af AE	17	#include "dt-bindings/clock/bcm21664.h"
8d90c5af AE	18
2eba905e MM	19	#include "skeleton.dtsi"
	20
	21	/ {
	22	model = "BCM21664 SoC";
	23	compatible = "brcm,bcm21664";
	24	interrupt-parent = <&gic>;
	25
	26	chosen {
	27	bootargs = "console=ttyS0,115200n8";
	28	};
	29
	30	gic: interrupt-controller@3ff00100 {
	31	compatible = "arm,cortex-a9-gic";
	32	#interrupt-cells = <3>;
	33	#address-cells = <0>;
	34	interrupt-controller;
	35	reg = <0x3ff01000 0x1000>,
	36	<0x3ff00100 0x100>;
	37	};
	38
	39	smc@0x3404e000 {
	40	compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
	41	reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
	42	};
	43
	44	uart@3e000000 {
	45	compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
	46	status = "disabled";
	47	reg = <0x3e000000 0x118>;
8d90c5af	48	clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
2eba905e MM	49	interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
	50	reg-shift = <2>;
	51	reg-io-width = <4>;
	52	};
	53
	54	uart@3e001000 {
	55	compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
	56	status = "disabled";
	57	reg = <0x3e001000 0x118>;
8d90c5af	58	clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
2eba905e MM	59	interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
	60	reg-shift = <2>;
	61	reg-io-width = <4>;
	62	};
	63
	64	uart@3e002000 {
	65	compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
	66	status = "disabled";
	67	reg = <0x3e002000 0x118>;
8d90c5af	68	clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
2eba905e MM	69	interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
	70	reg-shift = <2>;
	71	reg-io-width = <4>;
	72	};
	73
	74	L2: l2-cache {
	75	compatible = "arm,pl310-cache";
	76	reg = <0x3ff20000 0x1000>;
	77	cache-unified;
	78	cache-level = <2>;
	79	};
	80
	81	brcm,resetmgr@35001f00 {
	82	compatible = "brcm,bcm21664-resetmgr";
	83	reg = <0x35001f00 0x24>;
	84	};
	85
	86	timer@35006000 {
	87	compatible = "brcm,kona-timer";
	88	reg = <0x35006000 0x1c>;
	89	interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	90	clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
2eba905e MM	91	};
	92
	93	gpio: gpio@35003000 {
	94	compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
	95	reg = <0x35003000 0x524>;
	96	interrupts =
	97	<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
	98	GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
	99	GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
	100	GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
	101	#gpio-cells = <2>;
	102	#interrupt-cells = <2>;
	103	gpio-controller;
	104	interrupt-controller;
	105	};
	106
	107	sdio1: sdio@3f180000 {
	108	compatible = "brcm,kona-sdhci";
	109	reg = <0x3f180000 0x801c>;
	110	interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	111	clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
2eba905e MM	112	status = "disabled";
	113	};
	114
	115	sdio2: sdio@3f190000 {
	116	compatible = "brcm,kona-sdhci";
	117	reg = <0x3f190000 0x801c>;
	118	interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	119	clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
2eba905e MM	120	status = "disabled";
	121	};
	122
	123	sdio3: sdio@3f1a0000 {
	124	compatible = "brcm,kona-sdhci";
	125	reg = <0x3f1a0000 0x801c>;
	126	interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	127	clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
2eba905e MM	128	status = "disabled";
	129	};
	130
	131	sdio4: sdio@3f1b0000 {
	132	compatible = "brcm,kona-sdhci";
	133	reg = <0x3f1b0000 0x801c>;
	134	interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	135	clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
2eba905e MM	136	status = "disabled";
	137	};
	138
	139	i2c@3e016000 {
	140	compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
	141	reg = <0x3e016000 0x70>;
	142	interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
	143	#address-cells = <1>;
	144	#size-cells = <0>;
8d90c5af	145	clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
2eba905e MM	146	status = "disabled";
	147	};
	148
	149	i2c@3e017000 {
	150	compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
	151	reg = <0x3e017000 0x70>;
	152	interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
	153	#address-cells = <1>;
	154	#size-cells = <0>;
8d90c5af	155	clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
2eba905e MM	156	status = "disabled";
	157	};
	158
	159	i2c@3e018000 {
	160	compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
	161	reg = <0x3e018000 0x70>;
	162	interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
	163	#address-cells = <1>;
	164	#size-cells = <0>;
8d90c5af	165	clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
2eba905e MM	166	status = "disabled";
	167	};
	168
	169	i2c@3e01c000 {
	170	compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
	171	reg = <0x3e01c000 0x70>;
	172	interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
	173	#address-cells = <1>;
	174	#size-cells = <0>;
8d90c5af	175	clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
2eba905e MM	176	status = "disabled";
	177	};
	178
	179	clocks {
8d90c5af AE	180	#address-cells = <1>;
	181	#size-cells = <1>;
	182	ranges;
2eba905e	183
8d90c5af AE	184	/*
	185	* Fixed clocks are defined before CCUs whose
	186	* clocks may depend on them.
	187	*/
	188
	189	ref_32k_clk: ref_32k {
2eba905e	190	#clock-cells = <0>;
8d90c5af AE	191	compatible = "fixed-clock";
8d90c5af AE	192	clock-frequency = <32768>;
2eba905e MM	193	};
2eba905e MM	194
8d90c5af	195	bbl_32k_clk: bbl_32k {
2eba905e	196	#clock-cells = <0>;
8d90c5af AE	197	compatible = "fixed-clock";
8d90c5af AE	198	clock-frequency = <32768>;
2eba905e MM	199	};
2eba905e MM	200
8d90c5af AE	201	ref_13m_clk: ref_13m {
8d90c5af AE	202	#clock-cells = <0>;
2eba905e MM	203	compatible = "fixed-clock";
2eba905e MM	204	clock-frequency = <13000000>;
2eba905e MM	205	};
2eba905e MM	206
8d90c5af AE	207	var_13m_clk: var_13m {
8d90c5af AE	208	#clock-cells = <0>;
2eba905e MM	209	compatible = "fixed-clock";
2eba905e MM	210	clock-frequency = <13000000>;
2eba905e MM	211	};
2eba905e MM	212
8d90c5af	213	dft_19_5m_clk: dft_19_5m {
2eba905e	214	#clock-cells = <0>;
8d90c5af AE	215	compatible = "fixed-clock";
8d90c5af AE	216	clock-frequency = <19500000>;
2eba905e MM	217	};
2eba905e MM	218
8d90c5af AE	219	ref_crystal_clk: ref_crystal {
8d90c5af AE	220	#clock-cells = <0>;
2eba905e MM	221	compatible = "fixed-clock";
2eba905e MM	222	clock-frequency = <26000000>;
2eba905e MM	223	};
2eba905e MM	224
8d90c5af	225	ref_52m_clk: ref_52m {
2eba905e	226	#clock-cells = <0>;
8d90c5af AE	227	compatible = "fixed-clock";
8d90c5af AE	228	clock-frequency = <52000000>;
2eba905e MM	229	};
2eba905e MM	230
8d90c5af	231	var_52m_clk: var_52m {
2eba905e	232	#clock-cells = <0>;
8d90c5af AE	233	compatible = "fixed-clock";
8d90c5af AE	234	clock-frequency = <52000000>;
2eba905e MM	235	};
2eba905e MM	236
8d90c5af	237	usb_otg_ahb_clk: usb_otg_ahb {
2eba905e	238	#clock-cells = <0>;
8d90c5af AE	239	compatible = "fixed-clock";
8d90c5af AE	240	clock-frequency = <52000000>;
2eba905e MM	241	};
2eba905e MM	242
8d90c5af	243	ref_96m_clk: ref_96m {
2eba905e	244	#clock-cells = <0>;
8d90c5af AE	245	compatible = "fixed-clock";
8d90c5af AE	246	clock-frequency = <96000000>;
2eba905e MM	247	};
2eba905e MM	248
8d90c5af	249	var_96m_clk: var_96m {
2eba905e	250	#clock-cells = <0>;
8d90c5af AE	251	compatible = "fixed-clock";
8d90c5af AE	252	clock-frequency = <96000000>;
2eba905e MM	253	};
2eba905e MM	254
8d90c5af	255	ref_104m_clk: ref_104m {
2eba905e	256	#clock-cells = <0>;
8d90c5af AE	257	compatible = "fixed-clock";
8d90c5af AE	258	clock-frequency = <104000000>;
2eba905e MM	259	};
2eba905e MM	260
8d90c5af	261	var_104m_clk: var_104m {
2eba905e	262	#clock-cells = <0>;
8d90c5af AE	263	compatible = "fixed-clock";
8d90c5af AE	264	clock-frequency = <104000000>;
2eba905e MM	265	};
2eba905e MM	266
8d90c5af	267	ref_156m_clk: ref_156m {
2eba905e	268	#clock-cells = <0>;
8d90c5af AE	269	compatible = "fixed-clock";
8d90c5af AE	270	clock-frequency = <156000000>;
2eba905e MM	271	};
2eba905e MM	272
8d90c5af	273	var_156m_clk: var_156m {
2eba905e	274	#clock-cells = <0>;
8d90c5af AE	275	compatible = "fixed-clock";
	276	clock-frequency = <156000000>;
	277	};
	278
	279	root_ccu: root_ccu {
	280	compatible = BCM21664_DT_ROOT_CCU_COMPAT;
	281	reg = <0x35001000 0x0f00>;
	282	#clock-cells = <1>;
	283	clock-output-names = "frac_1m";
	284	};
	285
	286	aon_ccu: aon_ccu {
	287	compatible = BCM21664_DT_AON_CCU_COMPAT;
	288	reg = <0x35002000 0x0f00>;
	289	#clock-cells = <1>;
	290	clock-output-names = "hub_timer";
	291	};
	292
	293	master_ccu: master_ccu {
	294	compatible = BCM21664_DT_MASTER_CCU_COMPAT;
	295	reg = <0x3f001000 0x0f00>;
	296	#clock-cells = <1>;
	297	clock-output-names = "sdio1",
	298	"sdio2",
	299	"sdio3",
	300	"sdio4",
	301	"sdio1_sleep",
	302	"sdio2_sleep",
	303	"sdio3_sleep",
	304	"sdio4_sleep";
	305	};
	306
	307	slave_ccu: slave_ccu {
	308	compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
	309	reg = <0x3e011000 0x0f00>;
	310	#clock-cells = <1>;
	311	clock-output-names = "uartb",
	312	"uartb2",
	313	"uartb3",
	314	"bsc1",
	315	"bsc2",
	316	"bsc3",
	317	"bsc4";
2eba905e MM	318	};
	319	};
	320
	321	usbotg: usb@3f120000 {
	322	compatible = "snps,dwc2";
	323	reg = <0x3f120000 0x10000>;
	324	interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
	325	clocks = <&usb_otg_ahb_clk>;
	326	clock-names = "otg";
	327	phys = <&usbphy>;
	328	phy-names = "usb2-phy";
	329	status = "disabled";
	330	};
	331
	332	usbphy: usb-phy@3f130000 {
	333	compatible = "brcm,kona-usb2-phy";
	334	reg = <0x3f130000 0x28>;
	335	#phy-cells = <0>;
	336	status = "disabled";
	337	};
	338	};