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8ac49e04 | 1 | /* |
e3b62ffd | 2 | * Copyright (C) 2012-2013 Broadcom Corporation |
8ac49e04 CD |
3 | * |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License as | |
6 | * published by the Free Software Foundation version 2. | |
7 | * | |
8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
9 | * kind, whether express or implied; without even the implied warranty | |
10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
5401cc43 MP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
15 | #include <dt-bindings/interrupt-controller/irq.h> | |
16 | ||
2bb9453b AE |
17 | #include "dt-bindings/clock/bcm281xx.h" |
18 | ||
74375653 | 19 | #include "skeleton.dtsi" |
8ac49e04 CD |
20 | |
21 | / { | |
22 | model = "BCM11351 SoC"; | |
15e22ddf | 23 | compatible = "brcm,bcm11351"; |
8ac49e04 CD |
24 | interrupt-parent = <&gic>; |
25 | ||
26 | chosen { | |
27 | bootargs = "console=ttyS0,115200n8"; | |
28 | }; | |
29 | ||
30 | gic: interrupt-controller@3ff00100 { | |
31 | compatible = "arm,cortex-a9-gic"; | |
32 | #interrupt-cells = <3>; | |
33 | #address-cells = <0>; | |
34 | interrupt-controller; | |
35 | reg = <0x3ff01000 0x1000>, | |
36 | <0x3ff00100 0x100>; | |
37 | }; | |
38 | ||
7f6c62e2 | 39 | smc@0x3404c000 { |
15e22ddf | 40 | compatible = "brcm,bcm11351-smc", "brcm,kona-smc"; |
d22dc5ed | 41 | reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */ |
7f6c62e2 CD |
42 | }; |
43 | ||
8ac49e04 | 44 | uart@3e000000 { |
15e22ddf | 45 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
8ac49e04 CD |
46 | status = "disabled"; |
47 | reg = <0x3e000000 0x1000>; | |
2bb9453b | 48 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>; |
5401cc43 | 49 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; |
8ac49e04 CD |
50 | reg-shift = <2>; |
51 | reg-io-width = <4>; | |
52 | }; | |
53 | ||
84491c0f TK |
54 | uart@3e001000 { |
55 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | |
56 | status = "disabled"; | |
57 | reg = <0x3e001000 0x1000>; | |
2bb9453b | 58 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>; |
84491c0f TK |
59 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; |
60 | reg-shift = <2>; | |
61 | reg-io-width = <4>; | |
62 | }; | |
63 | ||
64 | uart@3e002000 { | |
65 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | |
66 | status = "disabled"; | |
67 | reg = <0x3e002000 0x1000>; | |
2bb9453b | 68 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>; |
84491c0f TK |
69 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
70 | reg-shift = <2>; | |
71 | reg-io-width = <4>; | |
72 | }; | |
73 | ||
74 | uart@3e003000 { | |
75 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | |
76 | status = "disabled"; | |
77 | reg = <0x3e003000 0x1000>; | |
2bb9453b | 78 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>; |
84491c0f TK |
79 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
80 | reg-shift = <2>; | |
81 | reg-io-width = <4>; | |
82 | }; | |
83 | ||
8ac49e04 | 84 | L2: l2-cache { |
15e22ddf | 85 | compatible = "brcm,bcm11351-a2-pl310-cache"; |
3b656fed CD |
86 | reg = <0x3ff20000 0x1000>; |
87 | cache-unified; | |
88 | cache-level = <2>; | |
8ac49e04 | 89 | }; |
5f03dc20 | 90 | |
e3b62ffd MM |
91 | watchdog@35002f40 { |
92 | compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt"; | |
93 | reg = <0x35002f40 0x6c>; | |
94 | }; | |
95 | ||
5f03dc20 | 96 | timer@35006000 { |
15e22ddf | 97 | compatible = "brcm,kona-timer"; |
5f03dc20 | 98 | reg = <0x35006000 0x1000>; |
5401cc43 | 99 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
2bb9453b | 100 | clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>; |
5f03dc20 CD |
101 | }; |
102 | ||
d394c7bb MM |
103 | gpio: gpio@35003000 { |
104 | compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; | |
105 | reg = <0x35003000 0x800>; | |
106 | interrupts = | |
107 | <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH | |
108 | GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH | |
109 | GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH | |
110 | GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
111 | GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH | |
112 | GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; | |
113 | #gpio-cells = <2>; | |
114 | #interrupt-cells = <2>; | |
115 | gpio-controller; | |
116 | interrupt-controller; | |
117 | }; | |
118 | ||
d7358f84 | 119 | sdio1: sdio@3f180000 { |
15e22ddf | 120 | compatible = "brcm,kona-sdhci"; |
2dbfe748 | 121 | reg = <0x3f180000 0x10000>; |
9c0dae04 | 122 | interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; |
2bb9453b | 123 | clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>; |
2dbfe748 CD |
124 | status = "disabled"; |
125 | }; | |
126 | ||
d7358f84 | 127 | sdio2: sdio@3f190000 { |
15e22ddf | 128 | compatible = "brcm,kona-sdhci"; |
2dbfe748 | 129 | reg = <0x3f190000 0x10000>; |
9c0dae04 | 130 | interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; |
2bb9453b | 131 | clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>; |
2dbfe748 CD |
132 | status = "disabled"; |
133 | }; | |
134 | ||
d7358f84 | 135 | sdio3: sdio@3f1a0000 { |
15e22ddf | 136 | compatible = "brcm,kona-sdhci"; |
2dbfe748 | 137 | reg = <0x3f1a0000 0x10000>; |
9c0dae04 | 138 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
2bb9453b | 139 | clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>; |
2dbfe748 CD |
140 | status = "disabled"; |
141 | }; | |
142 | ||
d7358f84 | 143 | sdio4: sdio@3f1b0000 { |
15e22ddf | 144 | compatible = "brcm,kona-sdhci"; |
2dbfe748 | 145 | reg = <0x3f1b0000 0x10000>; |
9c0dae04 | 146 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
2bb9453b | 147 | clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>; |
2dbfe748 CD |
148 | status = "disabled"; |
149 | }; | |
150 | ||
67a57be8 | 151 | pinctrl@35004800 { |
a2530060 | 152 | compatible = "brcm,bcm11351-pinctrl"; |
67a57be8 SY |
153 | reg = <0x35004800 0x430>; |
154 | }; | |
f8a504c4 | 155 | |
dfc4334b TK |
156 | i2c@3e016000 { |
157 | compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; | |
158 | reg = <0x3e016000 0x80>; | |
159 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; | |
160 | #address-cells = <1>; | |
161 | #size-cells = <0>; | |
2bb9453b | 162 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>; |
dfc4334b TK |
163 | status = "disabled"; |
164 | }; | |
165 | ||
166 | i2c@3e017000 { | |
167 | compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; | |
168 | reg = <0x3e017000 0x80>; | |
169 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
170 | #address-cells = <1>; | |
171 | #size-cells = <0>; | |
2bb9453b | 172 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>; |
dfc4334b TK |
173 | status = "disabled"; |
174 | }; | |
175 | ||
176 | i2c@3e018000 { | |
177 | compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; | |
178 | reg = <0x3e018000 0x80>; | |
179 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | |
180 | #address-cells = <1>; | |
181 | #size-cells = <0>; | |
2bb9453b | 182 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>; |
dfc4334b TK |
183 | status = "disabled"; |
184 | }; | |
185 | ||
186 | i2c@3500d000 { | |
187 | compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; | |
188 | reg = <0x3500d000 0x80>; | |
189 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
190 | #address-cells = <1>; | |
191 | #size-cells = <0>; | |
2bb9453b | 192 | clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>; |
dfc4334b TK |
193 | status = "disabled"; |
194 | }; | |
195 | ||
cc33e42d TK |
196 | pwm: pwm@3e01a000 { |
197 | compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm"; | |
198 | reg = <0x3e01a000 0xcc>; | |
199 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>; | |
200 | #pwm-cells = <3>; | |
201 | status = "disabled"; | |
202 | }; | |
203 | ||
0bd898b8 | 204 | clocks { |
2bb9453b AE |
205 | #address-cells = <1>; |
206 | #size-cells = <1>; | |
207 | ranges; | |
208 | ||
209 | root_ccu: root_ccu { | |
210 | compatible = "brcm,bcm11351-root-ccu"; | |
211 | reg = <0x35001000 0x0f00>; | |
212 | #clock-cells = <1>; | |
213 | clock-output-names = "frac_1m"; | |
214 | }; | |
215 | ||
216 | hub_ccu: hub_ccu { | |
217 | compatible = "brcm,bcm11351-hub-ccu"; | |
218 | reg = <0x34000000 0x0f00>; | |
219 | #clock-cells = <1>; | |
220 | clock-output-names = "tmon_1m"; | |
221 | }; | |
222 | ||
223 | aon_ccu: aon_ccu { | |
224 | compatible = "brcm,bcm11351-aon-ccu"; | |
225 | reg = <0x35002000 0x0f00>; | |
226 | #clock-cells = <1>; | |
227 | clock-output-names = "hub_timer", | |
228 | "pmu_bsc", | |
229 | "pmu_bsc_var"; | |
230 | }; | |
231 | ||
232 | master_ccu: master_ccu { | |
233 | compatible = "brcm,bcm11351-master-ccu"; | |
234 | reg = <0x3f001000 0x0f00>; | |
235 | #clock-cells = <1>; | |
236 | clock-output-names = "sdio1", | |
237 | "sdio2", | |
238 | "sdio3", | |
239 | "sdio4", | |
240 | "usb_ic", | |
241 | "hsic2_48m", | |
242 | "hsic2_12m"; | |
243 | }; | |
244 | ||
245 | slave_ccu: slave_ccu { | |
246 | compatible = "brcm,bcm11351-slave-ccu"; | |
247 | reg = <0x3e011000 0x0f00>; | |
248 | #clock-cells = <1>; | |
249 | clock-output-names = "uartb", | |
250 | "uartb2", | |
251 | "uartb3", | |
252 | "uartb4", | |
253 | "ssp0", | |
254 | "ssp2", | |
255 | "bsc1", | |
256 | "bsc2", | |
257 | "bsc3", | |
258 | "pwm"; | |
259 | }; | |
260 | ||
261 | ref_1m_clk: ref_1m { | |
0bd898b8 | 262 | #clock-cells = <0>; |
2bb9453b AE |
263 | compatible = "fixed-clock"; |
264 | clock-frequency = <1000000>; | |
0bd898b8 TK |
265 | }; |
266 | ||
2bb9453b AE |
267 | ref_32k_clk: ref_32k { |
268 | #clock-cells = <0>; | |
0bd898b8 | 269 | compatible = "fixed-clock"; |
2bb9453b AE |
270 | clock-frequency = <32768>; |
271 | }; | |
272 | ||
273 | bbl_32k_clk: bbl_32k { | |
0bd898b8 | 274 | #clock-cells = <0>; |
2bb9453b AE |
275 | compatible = "fixed-clock"; |
276 | clock-frequency = <32768>; | |
0bd898b8 TK |
277 | }; |
278 | ||
2bb9453b AE |
279 | ref_13m_clk: ref_13m { |
280 | #clock-cells = <0>; | |
0bd898b8 TK |
281 | compatible = "fixed-clock"; |
282 | clock-frequency = <13000000>; | |
0bd898b8 TK |
283 | }; |
284 | ||
2bb9453b AE |
285 | var_13m_clk: var_13m { |
286 | #clock-cells = <0>; | |
0bd898b8 TK |
287 | compatible = "fixed-clock"; |
288 | clock-frequency = <13000000>; | |
0bd898b8 TK |
289 | }; |
290 | ||
2bb9453b | 291 | dft_19_5m_clk: dft_19_5m { |
0bd898b8 | 292 | #clock-cells = <0>; |
2bb9453b AE |
293 | compatible = "fixed-clock"; |
294 | clock-frequency = <19500000>; | |
0bd898b8 TK |
295 | }; |
296 | ||
2bb9453b AE |
297 | ref_crystal_clk: ref_crystal { |
298 | #clock-cells = <0>; | |
0bd898b8 TK |
299 | compatible = "fixed-clock"; |
300 | clock-frequency = <26000000>; | |
0bd898b8 TK |
301 | }; |
302 | ||
2bb9453b | 303 | ref_cx40_clk: ref_cx40 { |
0bd898b8 | 304 | #clock-cells = <0>; |
2bb9453b AE |
305 | compatible = "fixed-clock"; |
306 | clock-frequency = <40000000>; | |
0bd898b8 TK |
307 | }; |
308 | ||
2bb9453b | 309 | ref_52m_clk: ref_52m { |
0bd898b8 | 310 | #clock-cells = <0>; |
2bb9453b AE |
311 | compatible = "fixed-clock"; |
312 | clock-frequency = <52000000>; | |
0bd898b8 TK |
313 | }; |
314 | ||
2bb9453b | 315 | var_52m_clk: var_52m { |
0bd898b8 | 316 | #clock-cells = <0>; |
2bb9453b AE |
317 | compatible = "fixed-clock"; |
318 | clock-frequency = <52000000>; | |
0bd898b8 TK |
319 | }; |
320 | ||
2bb9453b | 321 | usb_otg_ahb_clk: usb_otg_ahb { |
0bd898b8 | 322 | compatible = "fixed-clock"; |
2bb9453b | 323 | clock-frequency = <52000000>; |
0bd898b8 TK |
324 | #clock-cells = <0>; |
325 | }; | |
326 | ||
2bb9453b | 327 | ref_96m_clk: ref_96m { |
0bd898b8 | 328 | #clock-cells = <0>; |
2bb9453b AE |
329 | compatible = "fixed-clock"; |
330 | clock-frequency = <96000000>; | |
0bd898b8 TK |
331 | }; |
332 | ||
2bb9453b | 333 | var_96m_clk: var_96m { |
0bd898b8 | 334 | #clock-cells = <0>; |
2bb9453b AE |
335 | compatible = "fixed-clock"; |
336 | clock-frequency = <96000000>; | |
0bd898b8 TK |
337 | }; |
338 | ||
2bb9453b AE |
339 | ref_104m_clk: ref_104m { |
340 | #clock-cells = <0>; | |
0bd898b8 | 341 | compatible = "fixed-clock"; |
2bb9453b AE |
342 | clock-frequency = <104000000>; |
343 | }; | |
344 | ||
345 | var_104m_clk: var_104m { | |
0bd898b8 | 346 | #clock-cells = <0>; |
2bb9453b AE |
347 | compatible = "fixed-clock"; |
348 | clock-frequency = <104000000>; | |
0bd898b8 TK |
349 | }; |
350 | ||
2bb9453b AE |
351 | ref_156m_clk: ref_156m { |
352 | #clock-cells = <0>; | |
0bd898b8 | 353 | compatible = "fixed-clock"; |
2bb9453b AE |
354 | clock-frequency = <156000000>; |
355 | }; | |
356 | ||
357 | var_156m_clk: var_156m { | |
0bd898b8 | 358 | #clock-cells = <0>; |
2bb9453b AE |
359 | compatible = "fixed-clock"; |
360 | clock-frequency = <156000000>; | |
0bd898b8 TK |
361 | }; |
362 | ||
2bb9453b AE |
363 | ref_208m_clk: ref_208m { |
364 | #clock-cells = <0>; | |
0bd898b8 | 365 | compatible = "fixed-clock"; |
2bb9453b AE |
366 | clock-frequency = <208000000>; |
367 | }; | |
368 | ||
369 | var_208m_clk: var_208m { | |
0bd898b8 | 370 | #clock-cells = <0>; |
2bb9453b AE |
371 | compatible = "fixed-clock"; |
372 | clock-frequency = <208000000>; | |
0bd898b8 TK |
373 | }; |
374 | ||
2bb9453b AE |
375 | ref_312m_clk: ref_312m { |
376 | #clock-cells = <0>; | |
0bd898b8 | 377 | compatible = "fixed-clock"; |
2bb9453b AE |
378 | clock-frequency = <312000000>; |
379 | }; | |
380 | ||
381 | var_312m_clk: var_312m { | |
0bd898b8 | 382 | #clock-cells = <0>; |
2bb9453b AE |
383 | compatible = "fixed-clock"; |
384 | clock-frequency = <312000000>; | |
0bd898b8 TK |
385 | }; |
386 | }; | |
d97f7997 MP |
387 | |
388 | usbotg: usb@3f120000 { | |
389 | compatible = "snps,dwc2"; | |
390 | reg = <0x3f120000 0x10000>; | |
391 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; | |
392 | clocks = <&usb_otg_ahb_clk>; | |
393 | clock-names = "otg"; | |
394 | phys = <&usbphy>; | |
395 | phy-names = "usb2-phy"; | |
396 | status = "disabled"; | |
397 | }; | |
398 | ||
399 | usbphy: usb-phy@3f130000 { | |
400 | compatible = "brcm,kona-usb2-phy"; | |
401 | reg = <0x3f130000 0x28>; | |
402 | #phy-cells = <0>; | |
403 | status = "disabled"; | |
404 | }; | |
8ac49e04 | 405 | }; |