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ARM: at91/dt: at91sam9g45: remove useless adc properties
[linux-2.6-block.git] / arch / arm / boot / dts / at91sam9x5.dtsi
CommitLineData
467f1cf5
NF		 1/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
6db64d29 12#include "skeleton.dtsi"
d4ae89c8 13#include <dt-bindings/dma/at91.h>
c9d0f317 14#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 15#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 16#include <dt-bindings/gpio/gpio.h>
467f1cf5
NF		 17
18/ {
19 model = "Atmel AT91SAM9x5 family SoC";
20 compatible = "atmel,at91sam9x5";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 gpio0 = &pioA;
29 gpio1 = &pioB;
30 gpio2 = &pioC;
31 gpio3 = &pioD;
32 tcb0 = &tcb0;
33 tcb1 = &tcb1;
05dcd361
LD		 34 i2c0 = &i2c0;
35 i2c1 = &i2c1;
36 i2c2 = &i2c2;
099343c6 37 ssc0 = &ssc0;
f3ab0527 38 pwm0 = &pwm0;
467f1cf5
NF		 39 };
40 cpus {
e757a6ee
LP		 41 #address-cells = <0>;
42 #size-cells = <0>;
43
44 cpu {
45 compatible = "arm,arm926ej-s";
46 device_type = "cpu";
467f1cf5
NF		 47 };
48 };
49
dcce6ce8 50 memory {
467f1cf5
NF		 51 reg = <0x20000000 0x10000000>;
52 };
53
54 ahb {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 apb {
61 compatible = "simple-bus";
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65
66 aic: interrupt-controller@fffff000 {
f8a073ee 67 #interrupt-cells = <3>;
467f1cf5
NF		 68 compatible = "atmel,at91rm9200-aic";
69 interrupt-controller;
467f1cf5 70 reg = <0xfffff000 0x200>;
c6573943 71 atmel,external-irqs = <31>;
467f1cf5
NF		 72 };
73
a7776ec6
JCPV		 74 ramc0: ramc@ffffe800 {
75 compatible = "atmel,at91sam9g45-ddramc";
76 reg = <0xffffe800 0x200>;
77 };
78
eb5e76ff
JCPV		 79 pmc: pmc@fffffc00 {
80 compatible = "atmel,at91rm9200-pmc";
81 reg = <0xfffffc00 0x100>;
82 };
83
c8082d34
JCPV		 84 rstc@fffffe00 {
85 compatible = "atmel,at91sam9g45-rstc";
86 reg = <0xfffffe00 0x10>;
87 };
88
82015c4e
JCPV		 89 shdwc@fffffe10 {
90 compatible = "atmel,at91sam9x5-shdwc";
91 reg = <0xfffffe10 0x10>;
92 };
93
467f1cf5
NF		 94 pit: timer@fffffe30 {
95 compatible = "atmel,at91sam9260-pit";
96 reg = <0xfffffe30 0xf>;
5e8b3bc3 97 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
467f1cf5
NF		 98 };
99
100 tcb0: timer@f8008000 {
101 compatible = "atmel,at91sam9x5-tcb";
102 reg = <0xf8008000 0x100>;
5e8b3bc3 103 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
467f1cf5
NF		 104 };
105
106 tcb1: timer@f800c000 {
107 compatible = "atmel,at91sam9x5-tcb";
108 reg = <0xf800c000 0x100>;
5e8b3bc3 109 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
467f1cf5
NF		 110 };
111
112 dma0: dma-controller@ffffec00 {
113 compatible = "atmel,at91sam9g45-dma";
114 reg = <0xffffec00 0x200>;
5e8b3bc3 115 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 116 #dma-cells = <2>;
467f1cf5
NF		 117 };
118
119 dma1: dma-controller@ffffee00 {
120 compatible = "atmel,at91sam9g45-dma";
121 reg = <0xffffee00 0x200>;
5e8b3bc3 122 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 123 #dma-cells = <2>;
467f1cf5
NF		 124 };
125
ec6754a7 126 pinctrl@fffff400 {
e4541ff2
JCPV		 127 #address-cells = <1>;
128 #size-cells = <1>;
5314ec8e 129 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2
JCPV		 130 ranges = <0xfffff400 0xfffff400 0x800>;
131
5314ec8e 132 /* shared pinctrl settings */
ec6754a7
JCPV		 133 dbgu {
134 pinctrl_dbgu: dbgu-0 {
135 atmel,pins =
c9d0f317
JCPV		 136 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
137 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
ec6754a7
JCPV		 138 };
139 };
140
9e3129e9
JCPV		 141 usart0 {
142 pinctrl_usart0: usart0-0 {
ec6754a7 143 atmel,pins =
c9d0f317
JCPV		 144 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
145 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
ec6754a7
JCPV		 146 };
147
c58c0c5a 148 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 149 atmel,pins =
c9d0f317 150 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
c58c0c5a
JCPV		 151 };
152
153 pinctrl_usart0_cts: usart0_cts-0 {
154 atmel,pins =
c9d0f317 155 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
ec6754a7 156 };
1bab02ec
RG		 157
158 pinctrl_usart0_sck: usart0_sck-0 {
159 atmel,pins =
c9d0f317 160 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
1bab02ec 161 };
ec6754a7
JCPV		 162 };
163
9e3129e9
JCPV		 164 usart1 {
165 pinctrl_usart1: usart1-0 {
ec6754a7 166 atmel,pins =
c9d0f317
JCPV		 167 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
168 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
ec6754a7
JCPV		 169 };
170
c58c0c5a
JCPV		 171 pinctrl_usart1_rts: usart1_rts-0 {
172 atmel,pins =
c9d0f317 173 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
c58c0c5a
JCPV		 174 };
175
176 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 177 atmel,pins =
c9d0f317 178 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
ec6754a7 179 };
1bab02ec
RG		 180
181 pinctrl_usart1_sck: usart1_sck-0 {
182 atmel,pins =
c9d0f317 183 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
1bab02ec 184 };
ec6754a7
JCPV		 185 };
186
9e3129e9
JCPV		 187 usart2 {
188 pinctrl_usart2: usart2-0 {
ec6754a7 189 atmel,pins =
c9d0f317
JCPV		 190 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
191 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
ec6754a7
JCPV		 192 };
193
df923c15 194 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 195 atmel,pins =
c9d0f317 196 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
c58c0c5a
JCPV		 197 };
198
df923c15 199 pinctrl_usart2_cts: usart2_cts-0 {
c58c0c5a 200 atmel,pins =
c9d0f317 201 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
ec6754a7 202 };
1bab02ec
RG		 203
204 pinctrl_usart2_sck: usart2_sck-0 {
205 atmel,pins =
c9d0f317 206 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
1bab02ec 207 };
ec6754a7
JCPV		 208 };
209
9e3129e9
JCPV		 210 uart0 {
211 pinctrl_uart0: uart0-0 {
ec6754a7 212 atmel,pins =
c9d0f317
JCPV		 213 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
214 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
ec6754a7
JCPV		 215 };
216 };
217
9e3129e9
JCPV		 218 uart1 {
219 pinctrl_uart1: uart1-0 {
ec6754a7 220 atmel,pins =
c9d0f317
JCPV		 221 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
222 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
ec6754a7
JCPV		 223 };
224 };
5314ec8e 225
7a38d450
JCPV		 226 nand {
227 pinctrl_nand: nand-0 {
228 atmel,pins =
c9d0f317
JCPV		 229 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
230 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
231 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
232 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
233 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
234 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
235 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
236 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
237 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
238 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
239 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
240 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
241 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
242 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
7f06472f
RG		 243 };
244
245 pinctrl_nand_16bits: nand_16bits-0 {
246 atmel,pins =
c9d0f317
JCPV		 247 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
248 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
249 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
250 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
251 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
252 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
253 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
254 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
7a38d450
JCPV		 255 };
256 };
257
d4fe9ac7
JCPV		 258 mmc0 {
259 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
260 atmel,pins =
c9d0f317
JCPV		 261 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
262 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
263 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
d4fe9ac7
JCPV		 264 };
265
266 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
267 atmel,pins =
c9d0f317
JCPV		 268 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
269 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
270 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
d4fe9ac7
JCPV		 271 };
272 };
273
274 mmc1 {
275 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
276 atmel,pins =
c9d0f317
JCPV		 277 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
278 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
279 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
d4fe9ac7
JCPV		 280 };
281
282 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
283 atmel,pins =
c9d0f317
JCPV		 284 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
285 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
286 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
d4fe9ac7
JCPV		 287 };
288 };
289
544ae6b2
BS		 290 ssc0 {
291 pinctrl_ssc0_tx: ssc0_tx-0 {
292 atmel,pins =
c9d0f317
JCPV		 293 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
294 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
295 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
544ae6b2
BS		 296 };
297
298 pinctrl_ssc0_rx: ssc0_rx-0 {
299 atmel,pins =
c9d0f317
JCPV		 300 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
301 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
302 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
544ae6b2
BS		 303 };
304 };
305
a68b728f
WY		 306 spi0 {
307 pinctrl_spi0: spi0-0 {
308 atmel,pins =
c9d0f317
JCPV		 309 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
310 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
311 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
a68b728f
WY		 312 };
313 };
314
315 spi1 {
316 pinctrl_spi1: spi1-0 {
317 atmel,pins =
c9d0f317
JCPV		 318 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
319 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
320 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
a68b728f
WY		 321 };
322 };
323
e9a72ee8
RG		 324 i2c0 {
325 pinctrl_i2c0: i2c0-0 {
326 atmel,pins =
c9d0f317
JCPV		 327 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
328 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
e9a72ee8
RG		 329 };
330 };
331
332 i2c1 {
333 pinctrl_i2c1: i2c1-0 {
334 atmel,pins =
c9d0f317
JCPV		 335 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
336 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
e9a72ee8
RG		 337 };
338 };
339
340 i2c2 {
341 pinctrl_i2c2: i2c2-0 {
342 atmel,pins =
c9d0f317
JCPV		 343 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
344 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
e9a72ee8
RG		 345 };
346 };
347
463c9c7b
RG		 348 i2c_gpio0 {
349 pinctrl_i2c_gpio0: i2c_gpio0-0 {
350 atmel,pins =
c9d0f317
JCPV		 351 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
352 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
463c9c7b
RG		 353 };
354 };
355
356 i2c_gpio1 {
357 pinctrl_i2c_gpio1: i2c_gpio1-0 {
358 atmel,pins =
c9d0f317
JCPV		 359 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
360 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
463c9c7b
RG		 361 };
362 };
363
364 i2c_gpio2 {
365 pinctrl_i2c_gpio2: i2c_gpio2-0 {
366 atmel,pins =
c9d0f317
JCPV		 367 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
368 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
463c9c7b
RG		 369 };
370 };
371
028633c2
BB		 372 tcb0 {
373 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
374 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
375 };
376
377 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
378 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
379 };
380
381 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
382 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
383 };
384
385 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
386 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
387 };
388
389 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
390 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
391 };
392
393 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
394 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
395 };
396
397 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
398 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
399 };
400
401 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
402 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
403 };
404
405 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
406 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
407 };
408 };
409
410 tcb1 {
411 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
412 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
413 };
414
415 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
416 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
417 };
418
419 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
420 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
421 };
422
423 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
424 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
428 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
429 };
430
431 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
432 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
436 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
437 };
438
439 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
440 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
441 };
442
443 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
444 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
445 };
446 };
447
e4541ff2
JCPV		 448 pioA: gpio@fffff400 {
449 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
450 reg = <0xfffff400 0x200>;
5e8b3bc3 451 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 452 #gpio-cells = <2>;
453 gpio-controller;
454 interrupt-controller;
455 #interrupt-cells = <2>;
456 };
457
458 pioB: gpio@fffff600 {
459 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
460 reg = <0xfffff600 0x200>;
5e8b3bc3 461 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 462 #gpio-cells = <2>;
463 gpio-controller;
fc33ff43 464 #gpio-lines = <19>;
e4541ff2
JCPV		 465 interrupt-controller;
466 #interrupt-cells = <2>;
467 };
468
469 pioC: gpio@fffff800 {
470 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
471 reg = <0xfffff800 0x200>;
5e8b3bc3 472 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 473 #gpio-cells = <2>;
474 gpio-controller;
475 interrupt-controller;
476 #interrupt-cells = <2>;
477 };
478
479 pioD: gpio@fffffa00 {
480 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
481 reg = <0xfffffa00 0x200>;
5e8b3bc3 482 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 483 #gpio-cells = <2>;
484 gpio-controller;
fc33ff43 485 #gpio-lines = <22>;
e4541ff2
JCPV		 486 interrupt-controller;
487 #interrupt-cells = <2>;
488 };
467f1cf5
NF		 489 };
490
544ae6b2
BS		 491 ssc0: ssc@f0010000 {
492 compatible = "atmel,at91sam9g45-ssc";
493 reg = <0xf0010000 0x4000>;
5e8b3bc3 494 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
7da49ad1
RG		 495 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
496 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
497 dma-names = "tx", "rx";
544ae6b2
BS		 498 pinctrl-names = "default";
499 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
500 status = "disabled";
501 };
502
9873137a
LD		 503 mmc0: mmc@f0008000 {
504 compatible = "atmel,hsmci";
505 reg = <0xf0008000 0x600>;
5e8b3bc3 506 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 507 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 508 dma-names = "rxtx";
e7cca254 509 pinctrl-names = "default";
9873137a
LD		 510 #address-cells = <1>;
511 #size-cells = <0>;
512 status = "disabled";
513 };
514
515 mmc1: mmc@f000c000 {
516 compatible = "atmel,hsmci";
517 reg = <0xf000c000 0x600>;
5e8b3bc3 518 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 519 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 520 dma-names = "rxtx";
e7cca254 521 pinctrl-names = "default";
9873137a
LD		 522 #address-cells = <1>;
523 #size-cells = <0>;
524 status = "disabled";
525 };
526
467f1cf5
NF		 527 dbgu: serial@fffff200 {
528 compatible = "atmel,at91sam9260-usart";
529 reg = <0xfffff200 0x200>;
5e8b3bc3 530 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 531 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_dbgu>;
467f1cf5
NF		 533 status = "disabled";
534 };
535
536 usart0: serial@f801c000 {
537 compatible = "atmel,at91sam9260-usart";
538 reg = <0xf801c000 0x200>;
5e8b3bc3 539 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 540 pinctrl-names = "default";
9e3129e9 541 pinctrl-0 = <&pinctrl_usart0>;
467f1cf5
NF		 542 status = "disabled";
543 };
544
545 usart1: serial@f8020000 {
546 compatible = "atmel,at91sam9260-usart";
547 reg = <0xf8020000 0x200>;
5e8b3bc3 548 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 549 pinctrl-names = "default";
9e3129e9 550 pinctrl-0 = <&pinctrl_usart1>;
467f1cf5
NF		 551 status = "disabled";
552 };
553
554 usart2: serial@f8024000 {
555 compatible = "atmel,at91sam9260-usart";
556 reg = <0xf8024000 0x200>;
5e8b3bc3 557 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 558 pinctrl-names = "default";
9e3129e9 559 pinctrl-0 = <&pinctrl_usart2>;
467f1cf5
NF		 560 status = "disabled";
561 };
562
05dcd361
LD		 563 i2c0: i2c@f8010000 {
564 compatible = "atmel,at91sam9x5-i2c";
565 reg = <0xf8010000 0x100>;
5e8b3bc3 566 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
d4ae89c8
LD		 567 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
568 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
d9a63a45 569 dma-names = "tx", "rx";
05dcd361
LD		 570 #address-cells = <1>;
571 #size-cells = <0>;
e9a72ee8
RG		 572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_i2c0>;
05dcd361
LD		 574 status = "disabled";
575 };
576
577 i2c1: i2c@f8014000 {
578 compatible = "atmel,at91sam9x5-i2c";
579 reg = <0xf8014000 0x100>;
5e8b3bc3 580 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
d4ae89c8
LD		 581 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
582 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
d9a63a45 583 dma-names = "tx", "rx";
05dcd361
LD		 584 #address-cells = <1>;
585 #size-cells = <0>;
e9a72ee8
RG		 586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_i2c1>;
05dcd361
LD		 588 status = "disabled";
589 };
590
591 i2c2: i2c@f8018000 {
592 compatible = "atmel,at91sam9x5-i2c";
593 reg = <0xf8018000 0x100>;
5e8b3bc3 594 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
d4ae89c8
LD		 595 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
596 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
d9a63a45 597 dma-names = "tx", "rx";
05dcd361
LD		 598 #address-cells = <1>;
599 #size-cells = <0>;
e9a72ee8
RG		 600 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_i2c2>;
05dcd361
LD		 602 status = "disabled";
603 };
604
06723db5
NF		 605 uart0: serial@f8040000 {
606 compatible = "atmel,at91sam9260-usart";
607 reg = <0xf8040000 0x200>;
608 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_uart0>;
611 status = "disabled";
612 };
613
614 uart1: serial@f8044000 {
615 compatible = "atmel,at91sam9260-usart";
616 reg = <0xf8044000 0x200>;
617 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
618 pinctrl-names = "default";
619 pinctrl-0 = <&pinctrl_uart1>;
620 status = "disabled";
621 };
622
d029f371
MR		 623 adc0: adc@f804c000 {
624 compatible = "atmel,at91sam9260-adc";
625 reg = <0xf804c000 0x100>;
5e8b3bc3 626 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
d029f371
MR		 627 atmel,adc-use-external;
628 atmel,adc-channels-used = <0xffff>;
629 atmel,adc-vref = <3300>;
630 atmel,adc-num-channels = <12>;
631 atmel,adc-startup-time = <40>;
632 atmel,adc-channel-base = <0x50>;
633 atmel,adc-drdy-mask = <0x1000000>;
634 atmel,adc-status-register = <0x30>;
635 atmel,adc-trigger-register = <0xc0>;
4b50da65
LD		 636 atmel,adc-res = <8 10>;
637 atmel,adc-res-names = "lowres", "highres";
638 atmel,adc-use-res = "highres";
d029f371
MR		 639
640 trigger@0 {
641 trigger-name = "external-rising";
642 trigger-value = <0x1>;
643 trigger-external;
644 };
645
646 trigger@1 {
647 trigger-name = "external-falling";
648 trigger-value = <0x2>;
649 trigger-external;
650 };
651
652 trigger@2 {
653 trigger-name = "external-any";
654 trigger-value = <0x3>;
655 trigger-external;
656 };
657
658 trigger@3 {
659 trigger-name = "continuous";
660 trigger-value = <0x6>;
661 };
662 };
d50f88a0
RG		 663
664 spi0: spi@f0000000 {
665 #address-cells = <1>;
666 #size-cells = <0>;
667 compatible = "atmel,at91rm9200-spi";
668 reg = <0xf0000000 0x100>;
5e8b3bc3 669 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
6b2a9999
RG		 670 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
671 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
672 dma-names = "tx", "rx";
a68b728f
WY		 673 pinctrl-names = "default";
674 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 675 status = "disabled";
676 };
677
678 spi1: spi@f0004000 {
679 #address-cells = <1>;
680 #size-cells = <0>;
681 compatible = "atmel,at91rm9200-spi";
682 reg = <0xf0004000 0x100>;
5e8b3bc3 683 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
6b2a9999
RG		 684 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
685 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
686 dma-names = "tx", "rx";
a68b728f
WY		 687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0
RG		 689 status = "disabled";
690 };
dfab34aa 691
aecca65c
JCPV		 692 usb2: gadget@f803c000 {
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "atmel,at91sam9rl-udc";
696 reg = <0x00500000 0x80000
697 0xf803c000 0x400>;
698 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
699 status = "disabled";
700
701 ep0 {
702 reg = <0>;
703 atmel,fifo-size = <64>;
704 atmel,nb-banks = <1>;
705 };
706
707 ep1 {
708 reg = <1>;
709 atmel,fifo-size = <1024>;
710 atmel,nb-banks = <2>;
711 atmel,can-dma;
712 atmel,can-isoc;
713 };
714
715 ep2 {
716 reg = <2>;
717 atmel,fifo-size = <1024>;
718 atmel,nb-banks = <2>;
719 atmel,can-dma;
720 atmel,can-isoc;
721 };
722
723 ep3 {
724 reg = <3>;
725 atmel,fifo-size = <1024>;
726 atmel,nb-banks = <3>;
727 atmel,can-dma;
728 };
729
730 ep4 {
731 reg = <4>;
732 atmel,fifo-size = <1024>;
733 atmel,nb-banks = <3>;
734 atmel,can-dma;
735 };
736
737 ep5 {
738 reg = <5>;
739 atmel,fifo-size = <1024>;
740 atmel,nb-banks = <3>;
741 atmel,can-dma;
742 atmel,can-isoc;
743 };
744
745 ep6 {
746 reg = <6>;
747 atmel,fifo-size = <1024>;
748 atmel,nb-banks = <3>;
749 atmel,can-dma;
750 atmel,can-isoc;
751 };
752 };
753
136d3556
WY		 754 watchdog@fffffe40 {
755 compatible = "atmel,at91sam9260-wdt";
756 reg = <0xfffffe40 0x10>;
fe46aa67
BB		 757 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
758 atmel,watchdog-type = "hardware";
759 atmel,reset-type = "all";
760 atmel,dbg-halt;
761 atmel,idle-halt;
136d3556
WY		 762 status = "disabled";
763 };
764
b909c6c9 765 rtc@fffffeb0 {
23fb05c6 766 compatible = "atmel,at91sam9x5-rtc";
b909c6c9 767 reg = <0xfffffeb0 0x40>;
5e8b3bc3 768 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
b909c6c9
NF		 769 status = "disabled";
770 };
f3ab0527
BS		 771
772 pwm0: pwm@f8034000 {
773 compatible = "atmel,at91sam9rl-pwm";
774 reg = <0xf8034000 0x300>;
775 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
776 #pwm-cells = <3>;
777 status = "disabled";
778 };
467f1cf5 779 };
86a89f4f
JCPV		 780
781 nand0: nand@40000000 {
782 compatible = "atmel,at91rm9200-nand";
783 #address-cells = <1>;
784 #size-cells = <1>;
785 reg = <0x40000000 0x10000000
5314bc2d
JW		 786 0xffffe000 0x600 /* PMECC Registers */
787 0xffffe600 0x200 /* PMECC Error Location Registers */
788 0x00108000 0x18000 /* PMECC looup table in ROM code */
86a89f4f 789 >;
5314bc2d 790 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
86a89f4f
JCPV		 791 atmel,nand-addr-offset = <21>;
792 atmel,nand-cmd-offset = <22>;
e8b2da6e 793 atmel,nand-has-dma;
7a38d450
JCPV		 794 pinctrl-names = "default";
795 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 796 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
797 &pioD 4 GPIO_ACTIVE_HIGH
86a89f4f
JCPV		 798 0
799 >;
800 status = "disabled";
801 };
6a062459
JCPV		 802
803 usb0: ohci@00600000 {
804 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
805 reg = <0x00600000 0x100000>;
5e8b3bc3 806 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
6a062459
JCPV		 807 status = "disabled";
808 };
62c5553a
JCPV		 809
810 usb1: ehci@00700000 {
811 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
812 reg = <0x00700000 0x100000>;
5e8b3bc3 813 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
62c5553a
JCPV		 814 status = "disabled";
815 };
467f1cf5 816 };
10f71c28
JCPV		 817
818 i2c@0 {
819 compatible = "i2c-gpio";
92f8629b
JCPV		 820 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
821 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 822 >;
823 i2c-gpio,sda-open-drain;
824 i2c-gpio,scl-open-drain;
825 i2c-gpio,delay-us = <2>; /* ~100 kHz */
826 #address-cells = <1>;
827 #size-cells = <0>;
463c9c7b
RG		 828 pinctrl-names = "default";
829 pinctrl-0 = <&pinctrl_i2c_gpio0>;
10f71c28
JCPV		 830 status = "disabled";
831 };
832
833 i2c@1 {
834 compatible = "i2c-gpio";
92f8629b
JCPV		 835 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
836 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 837 >;
838 i2c-gpio,sda-open-drain;
839 i2c-gpio,scl-open-drain;
840 i2c-gpio,delay-us = <2>; /* ~100 kHz */
841 #address-cells = <1>;
842 #size-cells = <0>;
463c9c7b
RG		 843 pinctrl-names = "default";
844 pinctrl-0 = <&pinctrl_i2c_gpio1>;
10f71c28
JCPV		 845 status = "disabled";
846 };
847
848 i2c@2 {
849 compatible = "i2c-gpio";
92f8629b
JCPV		 850 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
851 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 852 >;
853 i2c-gpio,sda-open-drain;
854 i2c-gpio,scl-open-drain;
855 i2c-gpio,delay-us = <2>; /* ~100 kHz */
856 #address-cells = <1>;
857 #size-cells = <0>;
463c9c7b
RG		 858 pinctrl-names = "default";
859 pinctrl-0 = <&pinctrl_i2c_gpio2>;
10f71c28
JCPV		 860 status = "disabled";
861 };
467f1cf5 862};
Linux 6.x block layer and io_uring tree(s)