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7aff448f AB |
1 | /* |
2 | * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC | |
3 | * | |
4 | * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com> | |
5 | * | |
6 | * Licensed under GPLv2 or later. | |
7 | */ | |
8 | ||
9 | #include "skeleton.dtsi" | |
10 | #include <dt-bindings/pinctrl/at91.h> | |
35d35aae | 11 | #include <dt-bindings/clock/at91.h> |
7aff448f AB |
12 | #include <dt-bindings/interrupt-controller/irq.h> |
13 | #include <dt-bindings/gpio/gpio.h> | |
a4c1d6c7 | 14 | #include <dt-bindings/pwm/pwm.h> |
7aff448f AB |
15 | |
16 | / { | |
17 | model = "Atmel AT91SAM9RL family SoC"; | |
18 | compatible = "atmel,at91sam9rl", "atmel,at91sam9"; | |
19 | interrupt-parent = <&aic>; | |
20 | ||
21 | aliases { | |
22 | serial0 = &dbgu; | |
23 | serial1 = &usart0; | |
24 | serial2 = &usart1; | |
25 | serial3 = &usart2; | |
26 | serial4 = &usart3; | |
27 | gpio0 = &pioA; | |
28 | gpio1 = &pioB; | |
29 | gpio2 = &pioC; | |
30 | gpio3 = &pioD; | |
31 | tcb0 = &tcb0; | |
32 | i2c0 = &i2c0; | |
33 | i2c1 = &i2c1; | |
34 | ssc0 = &ssc0; | |
35 | ssc1 = &ssc1; | |
a4c1d6c7 | 36 | pwm0 = &pwm0; |
7aff448f AB |
37 | }; |
38 | ||
39 | cpus { | |
40 | #address-cells = <0>; | |
41 | #size-cells = <0>; | |
42 | ||
43 | cpu { | |
44 | compatible = "arm,arm926ej-s"; | |
45 | device_type = "cpu"; | |
46 | }; | |
47 | }; | |
48 | ||
49 | memory { | |
50 | reg = <0x20000000 0x04000000>; | |
51 | }; | |
52 | ||
c2c9e78e AB |
53 | clocks { |
54 | slow_xtal: slow_xtal { | |
55 | compatible = "fixed-clock"; | |
56 | #clock-cells = <0>; | |
57 | clock-frequency = <0>; | |
58 | }; | |
2078da96 | 59 | |
c2c9e78e AB |
60 | main_xtal: main_xtal { |
61 | compatible = "fixed-clock"; | |
62 | #clock-cells = <0>; | |
63 | clock-frequency = <0>; | |
64 | }; | |
2078da96 | 65 | |
a4c1d6c7 AB |
66 | adc_op_clk: adc_op_clk{ |
67 | compatible = "fixed-clock"; | |
68 | #clock-cells = <0>; | |
69 | clock-frequency = <1000000>; | |
70 | }; | |
71 | }; | |
72 | ||
f04660e4 AB |
73 | sram: sram@00300000 { |
74 | compatible = "mmio-sram"; | |
75 | reg = <0x00300000 0x10000>; | |
76 | }; | |
77 | ||
7aff448f AB |
78 | ahb { |
79 | compatible = "simple-bus"; | |
80 | #address-cells = <1>; | |
81 | #size-cells = <1>; | |
82 | ranges; | |
83 | ||
a4c1d6c7 AB |
84 | fb0: fb@00500000 { |
85 | compatible = "atmel,at91sam9rl-lcdc"; | |
86 | reg = <0x00500000 0x1000>; | |
87 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; | |
88 | pinctrl-names = "default"; | |
89 | pinctrl-0 = <&pinctrl_fb>; | |
90 | clocks = <&lcd_clk>, <&lcd_clk>; | |
91 | clock-names = "hclk", "lcdc_clk"; | |
92 | status = "disabled"; | |
93 | }; | |
94 | ||
7aff448f AB |
95 | nand0: nand@40000000 { |
96 | compatible = "atmel,at91rm9200-nand"; | |
97 | #address-cells = <1>; | |
98 | #size-cells = <1>; | |
99 | reg = <0x40000000 0x10000000>, | |
100 | <0xffffe800 0x200>; | |
101 | atmel,nand-addr-offset = <21>; | |
102 | atmel,nand-cmd-offset = <22>; | |
ad7c56aa | 103 | atmel,nand-has-dma; |
7aff448f AB |
104 | pinctrl-names = "default"; |
105 | pinctrl-0 = <&pinctrl_nand>; | |
106 | gpios = <&pioD 17 GPIO_ACTIVE_HIGH>, | |
107 | <&pioB 6 GPIO_ACTIVE_HIGH>, | |
108 | <0>; | |
109 | status = "disabled"; | |
110 | }; | |
111 | ||
112 | apb { | |
113 | compatible = "simple-bus"; | |
114 | #address-cells = <1>; | |
115 | #size-cells = <1>; | |
116 | ranges; | |
117 | ||
118 | tcb0: timer@fffa0000 { | |
119 | compatible = "atmel,at91rm9200-tcb"; | |
120 | reg = <0xfffa0000 0x100>; | |
121 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, | |
122 | <17 IRQ_TYPE_LEVEL_HIGH 0>, | |
123 | <18 IRQ_TYPE_LEVEL_HIGH 0>; | |
8dc5d8e8 AB |
124 | clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; |
125 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
7aff448f AB |
126 | }; |
127 | ||
128 | mmc0: mmc@fffa4000 { | |
129 | compatible = "atmel,hsmci"; | |
130 | reg = <0xfffa4000 0x600>; | |
131 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; | |
132 | #address-cells = <1>; | |
133 | #size-cells = <0>; | |
134 | pinctrl-names = "default"; | |
8dc5d8e8 AB |
135 | clocks = <&mci0_clk>; |
136 | clock-names = "mci_clk"; | |
7aff448f AB |
137 | status = "disabled"; |
138 | }; | |
139 | ||
140 | i2c0: i2c@fffa8000 { | |
141 | compatible = "atmel,at91sam9260-i2c"; | |
142 | reg = <0xfffa8000 0x100>; | |
143 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; | |
144 | #address-cells = <1>; | |
145 | #size-cells = <0>; | |
8dc5d8e8 | 146 | clocks = <&twi0_clk>; |
7aff448f AB |
147 | status = "disabled"; |
148 | }; | |
149 | ||
150 | i2c1: i2c@fffac000 { | |
151 | compatible = "atmel,at91sam9260-i2c"; | |
152 | reg = <0xfffac000 0x100>; | |
153 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; | |
154 | #address-cells = <1>; | |
155 | #size-cells = <0>; | |
156 | status = "disabled"; | |
157 | }; | |
158 | ||
159 | usart0: serial@fffb0000 { | |
160 | compatible = "atmel,at91sam9260-usart"; | |
161 | reg = <0xfffb0000 0x200>; | |
162 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; | |
163 | atmel,use-dma-rx; | |
164 | atmel,use-dma-tx; | |
165 | pinctrl-names = "default"; | |
166 | pinctrl-0 = <&pinctrl_usart0>; | |
8dc5d8e8 AB |
167 | clocks = <&usart0_clk>; |
168 | clock-names = "usart"; | |
7aff448f AB |
169 | status = "disabled"; |
170 | }; | |
171 | ||
172 | usart1: serial@fffb4000 { | |
173 | compatible = "atmel,at91sam9260-usart"; | |
174 | reg = <0xfffb4000 0x200>; | |
175 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; | |
176 | atmel,use-dma-rx; | |
177 | atmel,use-dma-tx; | |
178 | pinctrl-names = "default"; | |
179 | pinctrl-0 = <&pinctrl_usart1>; | |
8dc5d8e8 AB |
180 | clocks = <&usart1_clk>; |
181 | clock-names = "usart"; | |
7aff448f AB |
182 | status = "disabled"; |
183 | }; | |
184 | ||
185 | usart2: serial@fffb8000 { | |
186 | compatible = "atmel,at91sam9260-usart"; | |
187 | reg = <0xfffb8000 0x200>; | |
188 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; | |
189 | atmel,use-dma-rx; | |
190 | atmel,use-dma-tx; | |
191 | pinctrl-names = "default"; | |
192 | pinctrl-0 = <&pinctrl_usart2>; | |
8dc5d8e8 AB |
193 | clocks = <&usart2_clk>; |
194 | clock-names = "usart"; | |
7aff448f AB |
195 | status = "disabled"; |
196 | }; | |
197 | ||
198 | usart3: serial@fffbc000 { | |
199 | compatible = "atmel,at91sam9260-usart"; | |
200 | reg = <0xfffbc000 0x200>; | |
201 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; | |
202 | atmel,use-dma-rx; | |
203 | atmel,use-dma-tx; | |
204 | pinctrl-names = "default"; | |
205 | pinctrl-0 = <&pinctrl_usart3>; | |
8dc5d8e8 AB |
206 | clocks = <&usart3_clk>; |
207 | clock-names = "usart"; | |
7aff448f AB |
208 | status = "disabled"; |
209 | }; | |
210 | ||
211 | ssc0: ssc@fffc0000 { | |
496d3c28 | 212 | compatible = "atmel,at91sam9rl-ssc"; |
7aff448f AB |
213 | reg = <0xfffc0000 0x4000>; |
214 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | |
215 | pinctrl-names = "default"; | |
216 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
217 | status = "disabled"; | |
218 | }; | |
219 | ||
220 | ssc1: ssc@fffc4000 { | |
496d3c28 | 221 | compatible = "atmel,at91sam9rl-ssc"; |
7aff448f AB |
222 | reg = <0xfffc4000 0x4000>; |
223 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | |
224 | pinctrl-names = "default"; | |
225 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
226 | status = "disabled"; | |
227 | }; | |
228 | ||
a4c1d6c7 AB |
229 | pwm0: pwm@fffc8000 { |
230 | compatible = "atmel,at91sam9rl-pwm"; | |
231 | reg = <0xfffc8000 0x300>; | |
232 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; | |
233 | #pwm-cells = <3>; | |
234 | clocks = <&pwm_clk>; | |
235 | clock-names = "pwm_clk"; | |
236 | status = "disabled"; | |
237 | }; | |
238 | ||
7aff448f AB |
239 | spi0: spi@fffcc000 { |
240 | #address-cells = <1>; | |
241 | #size-cells = <0>; | |
242 | compatible = "atmel,at91rm9200-spi"; | |
243 | reg = <0xfffcc000 0x200>; | |
244 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; | |
245 | pinctrl-names = "default"; | |
246 | pinctrl-0 = <&pinctrl_spi0>; | |
8dc5d8e8 AB |
247 | clocks = <&spi0_clk>; |
248 | clock-names = "spi_clk"; | |
7aff448f AB |
249 | status = "disabled"; |
250 | }; | |
251 | ||
a4c1d6c7 AB |
252 | adc0: adc@fffd0000 { |
253 | #address-cells = <1>; | |
254 | #size-cells = <0>; | |
255 | compatible = "atmel,at91sam9rl-adc"; | |
256 | reg = <0xfffd0000 0x100>; | |
257 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; | |
258 | clocks = <&adc_clk>, <&adc_op_clk>; | |
259 | clock-names = "adc_clk", "adc_op_clk"; | |
260 | atmel,adc-use-external-triggers; | |
261 | atmel,adc-channels-used = <0x3f>; | |
262 | atmel,adc-vref = <3300>; | |
263 | atmel,adc-startup-time = <40>; | |
264 | atmel,adc-res = <8 10>; | |
265 | atmel,adc-res-names = "lowres", "highres"; | |
266 | atmel,adc-use-res = "highres"; | |
267 | ||
268 | trigger@0 { | |
269 | reg = <0>; | |
270 | trigger-name = "timer-counter-0"; | |
271 | trigger-value = <0x1>; | |
272 | }; | |
273 | trigger@1 { | |
274 | reg = <1>; | |
275 | trigger-name = "timer-counter-1"; | |
276 | trigger-value = <0x3>; | |
277 | }; | |
278 | ||
279 | trigger@2 { | |
280 | reg = <2>; | |
281 | trigger-name = "timer-counter-2"; | |
282 | trigger-value = <0x5>; | |
283 | }; | |
284 | ||
285 | trigger@3 { | |
286 | reg = <3>; | |
287 | trigger-name = "external"; | |
288 | trigger-value = <0x13>; | |
289 | trigger-external; | |
290 | }; | |
291 | }; | |
292 | ||
293 | usb0: gadget@fffd4000 { | |
294 | #address-cells = <1>; | |
295 | #size-cells = <0>; | |
296 | compatible = "atmel,at91sam9rl-udc"; | |
297 | reg = <0x00600000 0x100000>, | |
298 | <0xfffd4000 0x4000>; | |
299 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; | |
300 | clocks = <&udphs_clk>, <&utmi>; | |
301 | clock-names = "pclk", "hclk"; | |
302 | status = "disabled"; | |
303 | ||
304 | ep0 { | |
305 | reg = <0>; | |
306 | atmel,fifo-size = <64>; | |
307 | atmel,nb-banks = <1>; | |
308 | }; | |
309 | ||
310 | ep1 { | |
311 | reg = <1>; | |
312 | atmel,fifo-size = <1024>; | |
313 | atmel,nb-banks = <2>; | |
314 | atmel,can-dma; | |
315 | atmel,can-isoc; | |
316 | }; | |
317 | ||
318 | ep2 { | |
319 | reg = <2>; | |
320 | atmel,fifo-size = <1024>; | |
321 | atmel,nb-banks = <2>; | |
322 | atmel,can-dma; | |
323 | atmel,can-isoc; | |
324 | }; | |
325 | ||
326 | ep3 { | |
327 | reg = <3>; | |
328 | atmel,fifo-size = <1024>; | |
329 | atmel,nb-banks = <3>; | |
330 | atmel,can-dma; | |
331 | }; | |
332 | ||
333 | ep4 { | |
334 | reg = <4>; | |
335 | atmel,fifo-size = <1024>; | |
336 | atmel,nb-banks = <3>; | |
337 | atmel,can-dma; | |
338 | }; | |
339 | ||
340 | ep5 { | |
341 | reg = <5>; | |
342 | atmel,fifo-size = <1024>; | |
343 | atmel,nb-banks = <3>; | |
344 | atmel,can-dma; | |
345 | atmel,can-isoc; | |
346 | }; | |
347 | ||
348 | ep6 { | |
349 | reg = <6>; | |
350 | atmel,fifo-size = <1024>; | |
351 | atmel,nb-banks = <3>; | |
352 | atmel,can-dma; | |
353 | atmel,can-isoc; | |
354 | }; | |
355 | }; | |
356 | ||
4cd92929 NF |
357 | dma0: dma-controller@ffffe600 { |
358 | compatible = "atmel,at91sam9rl-dma"; | |
359 | reg = <0xffffe600 0x200>; | |
360 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; | |
361 | #dma-cells = <2>; | |
362 | clocks = <&dma0_clk>; | |
363 | clock-names = "dma_clk"; | |
364 | }; | |
365 | ||
7aff448f AB |
366 | ramc0: ramc@ffffea00 { |
367 | compatible = "atmel,at91sam9260-sdramc"; | |
368 | reg = <0xffffea00 0x200>; | |
369 | }; | |
370 | ||
371 | aic: interrupt-controller@fffff000 { | |
372 | #interrupt-cells = <3>; | |
373 | compatible = "atmel,at91rm9200-aic"; | |
374 | interrupt-controller; | |
375 | reg = <0xfffff000 0x200>; | |
376 | atmel,external-irqs = <31>; | |
377 | }; | |
378 | ||
379 | dbgu: serial@fffff200 { | |
8c07f664 | 380 | compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; |
7aff448f AB |
381 | reg = <0xfffff200 0x200>; |
382 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
383 | pinctrl-names = "default"; | |
384 | pinctrl-0 = <&pinctrl_dbgu>; | |
8dc5d8e8 AB |
385 | clocks = <&mck>; |
386 | clock-names = "usart"; | |
7aff448f AB |
387 | status = "disabled"; |
388 | }; | |
389 | ||
390 | pinctrl@fffff400 { | |
391 | #address-cells = <1>; | |
392 | #size-cells = <1>; | |
393 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
394 | ranges = <0xfffff400 0xfffff400 0x800>; | |
395 | ||
396 | atmel,mux-mask = | |
397 | /* A B */ | |
398 | <0xffffffff 0xe05c6738>, /* pioA */ | |
399 | <0xffffffff 0x0000c780>, /* pioB */ | |
400 | <0xffffffff 0xe3ffff0e>, /* pioC */ | |
401 | <0x003fffff 0x0001ff3c>; /* pioD */ | |
402 | ||
403 | /* shared pinctrl settings */ | |
a4c1d6c7 AB |
404 | adc0 { |
405 | pinctrl_adc0_ts: adc0_ts-0 { | |
406 | atmel,pins = | |
407 | <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
408 | <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
409 | <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
410 | <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
411 | }; | |
412 | ||
413 | pinctrl_adc0_ad0: adc0_ad0-0 { | |
414 | atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
415 | }; | |
416 | ||
417 | pinctrl_adc0_ad1: adc0_ad1-0 { | |
418 | atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
419 | }; | |
420 | ||
421 | pinctrl_adc0_ad2: adc0_ad2-0 { | |
422 | atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
423 | }; | |
424 | ||
425 | pinctrl_adc0_ad3: adc0_ad3-0 { | |
426 | atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
427 | }; | |
428 | ||
429 | pinctrl_adc0_ad4: adc0_ad4-0 { | |
430 | atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
431 | }; | |
432 | ||
433 | pinctrl_adc0_ad5: adc0_ad5-0 { | |
434 | atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
435 | }; | |
436 | ||
437 | pinctrl_adc0_adtrg: adc0_adtrg-0 { | |
438 | atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
439 | }; | |
440 | }; | |
441 | ||
7aff448f AB |
442 | dbgu { |
443 | pinctrl_dbgu: dbgu-0 { | |
444 | atmel,pins = | |
445 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
446 | <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
447 | }; | |
448 | }; | |
449 | ||
a4c1d6c7 AB |
450 | fb { |
451 | pinctrl_fb: fb-0 { | |
452 | atmel,pins = | |
453 | <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
454 | <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
455 | <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
456 | <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
457 | <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
458 | <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
459 | <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
460 | <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
461 | <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
462 | <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
463 | <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
464 | <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
465 | <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
466 | <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
467 | <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
468 | <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
469 | <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
470 | <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
471 | <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
472 | <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
473 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
474 | }; | |
475 | }; | |
476 | ||
7aff448f AB |
477 | i2c_gpio0 { |
478 | pinctrl_i2c_gpio0: i2c_gpio0-0 { | |
479 | atmel,pins = | |
480 | <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, | |
481 | <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | |
482 | }; | |
483 | }; | |
484 | ||
485 | i2c_gpio1 { | |
486 | pinctrl_i2c_gpio1: i2c_gpio1-0 { | |
487 | atmel,pins = | |
488 | <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, | |
489 | <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | |
490 | }; | |
491 | }; | |
492 | ||
493 | mmc0 { | |
494 | pinctrl_mmc0_clk: mmc0_clk-0 { | |
495 | atmel,pins = | |
496 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
497 | }; | |
498 | ||
499 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | |
500 | atmel,pins = | |
501 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
502 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
503 | }; | |
504 | ||
505 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
506 | atmel,pins = | |
507 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
508 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
509 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
510 | }; | |
511 | }; | |
512 | ||
513 | nand { | |
514 | pinctrl_nand: nand-0 { | |
515 | atmel,pins = | |
516 | <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, | |
517 | <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; | |
518 | }; | |
519 | ||
520 | pinctrl_nand0_ale_cle: nand_ale_cle-0 { | |
521 | atmel,pins = | |
522 | <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
523 | <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
524 | }; | |
525 | ||
526 | pinctrl_nand0_oe_we: nand_oe_we-0 { | |
527 | atmel,pins = | |
528 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
529 | <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
530 | }; | |
531 | ||
532 | pinctrl_nand0_cs: nand_cs-0 { | |
533 | atmel,pins = | |
534 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
535 | }; | |
536 | }; | |
537 | ||
a4c1d6c7 AB |
538 | pwm0 { |
539 | pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { | |
540 | atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
541 | }; | |
542 | ||
543 | pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { | |
544 | atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
545 | }; | |
546 | ||
547 | pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { | |
548 | atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
549 | }; | |
550 | ||
551 | pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { | |
552 | atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
553 | }; | |
554 | ||
555 | pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { | |
556 | atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
557 | }; | |
558 | ||
559 | pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { | |
560 | atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
561 | }; | |
562 | ||
563 | pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { | |
564 | atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
565 | }; | |
566 | ||
567 | pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { | |
568 | atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
569 | }; | |
570 | ||
571 | pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { | |
572 | atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
573 | }; | |
574 | ||
575 | pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { | |
576 | atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
577 | }; | |
578 | ||
579 | pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { | |
580 | atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
581 | }; | |
582 | }; | |
583 | ||
584 | spi0 { | |
585 | pinctrl_spi0: spi0-0 { | |
586 | atmel,pins = | |
587 | <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
588 | <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
589 | <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
590 | }; | |
591 | }; | |
592 | ||
7aff448f AB |
593 | ssc0 { |
594 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
595 | atmel,pins = | |
596 | <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
597 | <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
598 | <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
599 | }; | |
600 | ||
601 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
602 | atmel,pins = | |
603 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
604 | <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
605 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
606 | }; | |
607 | }; | |
608 | ||
609 | ssc1 { | |
610 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
611 | atmel,pins = | |
612 | <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
613 | <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
614 | <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
615 | }; | |
616 | ||
617 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
618 | atmel,pins = | |
619 | <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
620 | <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
621 | <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
622 | }; | |
623 | }; | |
624 | ||
7aff448f AB |
625 | tcb0 { |
626 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
627 | atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
628 | }; | |
629 | ||
630 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
631 | atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
632 | }; | |
633 | ||
634 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
635 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
636 | }; | |
637 | ||
638 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
639 | atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
640 | }; | |
641 | ||
642 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
643 | atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
644 | }; | |
645 | ||
646 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
647 | atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
648 | }; | |
649 | ||
650 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
651 | atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
652 | }; | |
653 | ||
654 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
655 | atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
656 | }; | |
657 | ||
658 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
659 | atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
660 | }; | |
661 | }; | |
662 | ||
663 | usart0 { | |
664 | pinctrl_usart0: usart0-0 { | |
665 | atmel,pins = | |
666 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
667 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
668 | }; | |
669 | ||
670 | pinctrl_usart0_rts: usart0_rts-0 { | |
671 | atmel,pins = | |
672 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
673 | }; | |
674 | ||
675 | pinctrl_usart0_cts: usart0_cts-0 { | |
676 | atmel,pins = | |
677 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
678 | }; | |
679 | ||
680 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { | |
681 | atmel,pins = | |
682 | <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
683 | <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
684 | }; | |
685 | ||
686 | pinctrl_usart0_dcd: usart0_dcd-0 { | |
687 | atmel,pins = | |
688 | <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
689 | }; | |
690 | ||
691 | pinctrl_usart0_ri: usart0_ri-0 { | |
692 | atmel,pins = | |
693 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
694 | }; | |
695 | ||
696 | pinctrl_usart0_sck: usart0_sck-0 { | |
697 | atmel,pins = | |
698 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
699 | }; | |
700 | }; | |
701 | ||
702 | usart1 { | |
703 | pinctrl_usart1: usart1-0 { | |
704 | atmel,pins = | |
705 | <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
706 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
707 | }; | |
708 | ||
709 | pinctrl_usart1_rts: usart1_rts-0 { | |
710 | atmel,pins = | |
711 | <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
712 | }; | |
713 | ||
714 | pinctrl_usart1_cts: usart1_cts-0 { | |
715 | atmel,pins = | |
716 | <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
717 | }; | |
718 | ||
719 | pinctrl_usart1_sck: usart1_sck-0 { | |
720 | atmel,pins = | |
721 | <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
722 | }; | |
723 | }; | |
724 | ||
725 | usart2 { | |
726 | pinctrl_usart2: usart2-0 { | |
727 | atmel,pins = | |
728 | <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
729 | <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
730 | }; | |
731 | ||
732 | pinctrl_usart2_rts: usart2_rts-0 { | |
733 | atmel,pins = | |
734 | <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
735 | }; | |
736 | ||
737 | pinctrl_usart2_cts: usart2_cts-0 { | |
738 | atmel,pins = | |
739 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
740 | }; | |
741 | ||
742 | pinctrl_usart2_sck: usart2_sck-0 { | |
743 | atmel,pins = | |
744 | <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
745 | }; | |
746 | }; | |
747 | ||
748 | usart3 { | |
749 | pinctrl_usart3: usart3-0 { | |
750 | atmel,pins = | |
751 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
752 | <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
753 | }; | |
754 | ||
755 | pinctrl_usart3_rts: usart3_rts-0 { | |
756 | atmel,pins = | |
757 | <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
758 | }; | |
759 | ||
760 | pinctrl_usart3_cts: usart3_cts-0 { | |
761 | atmel,pins = | |
762 | <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
763 | }; | |
764 | ||
765 | pinctrl_usart3_sck: usart3_sck-0 { | |
766 | atmel,pins = | |
767 | <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
768 | }; | |
769 | }; | |
770 | ||
771 | pioA: gpio@fffff400 { | |
772 | compatible = "atmel,at91rm9200-gpio"; | |
773 | reg = <0xfffff400 0x200>; | |
774 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; | |
775 | #gpio-cells = <2>; | |
776 | gpio-controller; | |
777 | interrupt-controller; | |
778 | #interrupt-cells = <2>; | |
8dc5d8e8 | 779 | clocks = <&pioA_clk>; |
7aff448f AB |
780 | }; |
781 | ||
782 | pioB: gpio@fffff600 { | |
783 | compatible = "atmel,at91rm9200-gpio"; | |
784 | reg = <0xfffff600 0x200>; | |
785 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; | |
786 | #gpio-cells = <2>; | |
787 | gpio-controller; | |
788 | interrupt-controller; | |
789 | #interrupt-cells = <2>; | |
8dc5d8e8 | 790 | clocks = <&pioB_clk>; |
7aff448f AB |
791 | }; |
792 | ||
793 | pioC: gpio@fffff800 { | |
794 | compatible = "atmel,at91rm9200-gpio"; | |
795 | reg = <0xfffff800 0x200>; | |
796 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; | |
797 | #gpio-cells = <2>; | |
798 | gpio-controller; | |
799 | interrupt-controller; | |
800 | #interrupt-cells = <2>; | |
8dc5d8e8 | 801 | clocks = <&pioC_clk>; |
7aff448f AB |
802 | }; |
803 | ||
804 | pioD: gpio@fffffa00 { | |
805 | compatible = "atmel,at91rm9200-gpio"; | |
806 | reg = <0xfffffa00 0x200>; | |
807 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; | |
808 | #gpio-cells = <2>; | |
809 | gpio-controller; | |
810 | interrupt-controller; | |
811 | #interrupt-cells = <2>; | |
8dc5d8e8 | 812 | clocks = <&pioD_clk>; |
7aff448f AB |
813 | }; |
814 | }; | |
815 | ||
816 | pmc: pmc@fffffc00 { | |
8dc5d8e8 | 817 | compatible = "atmel,at91sam9g45-pmc"; |
7aff448f | 818 | reg = <0xfffffc00 0x100>; |
8dc5d8e8 AB |
819 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
820 | interrupt-controller; | |
821 | #address-cells = <1>; | |
822 | #size-cells = <0>; | |
823 | #interrupt-cells = <1>; | |
824 | ||
8dc5d8e8 AB |
825 | main: mainck { |
826 | compatible = "atmel,at91rm9200-clk-main"; | |
827 | #clock-cells = <0>; | |
828 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
2078da96 | 829 | clocks = <&main_xtal>; |
8dc5d8e8 AB |
830 | }; |
831 | ||
832 | plla: pllack { | |
833 | compatible = "atmel,at91rm9200-clk-pll"; | |
834 | #clock-cells = <0>; | |
835 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
836 | clocks = <&main>; | |
837 | reg = <0>; | |
838 | atmel,clk-input-range = <1000000 32000000>; | |
201d7dd0 AB |
839 | #atmel,pll-clk-output-range-cells = <3>; |
840 | atmel,pll-clk-output-ranges = <80000000 200000000 0>, | |
841 | <190000000 240000000 2>; | |
8dc5d8e8 AB |
842 | }; |
843 | ||
844 | utmi: utmick { | |
845 | compatible = "atmel,at91sam9x5-clk-utmi"; | |
846 | #clock-cells = <0>; | |
847 | interrupt-parent = <&pmc>; | |
848 | interrupts = <AT91_PMC_LOCKU>; | |
849 | clocks = <&main>; | |
850 | }; | |
851 | ||
852 | mck: masterck { | |
853 | compatible = "atmel,at91rm9200-clk-master"; | |
854 | #clock-cells = <0>; | |
855 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
856 | clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; | |
857 | atmel,clk-output-range = <0 94000000>; | |
201d7dd0 | 858 | atmel,clk-divisors = <1 2 4 0>; |
8dc5d8e8 AB |
859 | }; |
860 | ||
861 | prog: progck { | |
862 | compatible = "atmel,at91rm9200-clk-programmable"; | |
863 | #address-cells = <1>; | |
864 | #size-cells = <0>; | |
865 | interrupt-parent = <&pmc>; | |
866 | clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>; | |
867 | ||
868 | prog0: prog0 { | |
869 | #clock-cells = <0>; | |
870 | reg = <0>; | |
871 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
872 | }; | |
873 | ||
874 | prog1: prog1 { | |
875 | #clock-cells = <0>; | |
876 | reg = <1>; | |
877 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
878 | }; | |
879 | }; | |
880 | ||
881 | systemck { | |
882 | compatible = "atmel,at91rm9200-clk-system"; | |
883 | #address-cells = <1>; | |
884 | #size-cells = <0>; | |
885 | ||
886 | pck0: pck0 { | |
887 | #clock-cells = <0>; | |
888 | reg = <8>; | |
889 | clocks = <&prog0>; | |
890 | }; | |
891 | ||
892 | pck1: pck1 { | |
893 | #clock-cells = <0>; | |
894 | reg = <9>; | |
895 | clocks = <&prog1>; | |
896 | }; | |
897 | ||
898 | }; | |
899 | ||
900 | periphck { | |
901 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
902 | #address-cells = <1>; | |
903 | #size-cells = <0>; | |
904 | clocks = <&mck>; | |
905 | ||
906 | pioA_clk: pioA_clk { | |
907 | #clock-cells = <0>; | |
908 | reg = <2>; | |
909 | }; | |
910 | ||
911 | pioB_clk: pioB_clk { | |
912 | #clock-cells = <0>; | |
913 | reg = <3>; | |
914 | }; | |
915 | ||
916 | pioC_clk: pioC_clk { | |
917 | #clock-cells = <0>; | |
918 | reg = <4>; | |
919 | }; | |
920 | ||
921 | pioD_clk: pioD_clk { | |
922 | #clock-cells = <0>; | |
923 | reg = <5>; | |
924 | }; | |
925 | ||
926 | usart0_clk: usart0_clk { | |
927 | #clock-cells = <0>; | |
928 | reg = <6>; | |
929 | }; | |
930 | ||
931 | usart1_clk: usart1_clk { | |
932 | #clock-cells = <0>; | |
933 | reg = <7>; | |
934 | }; | |
935 | ||
936 | usart2_clk: usart2_clk { | |
937 | #clock-cells = <0>; | |
938 | reg = <8>; | |
939 | }; | |
940 | ||
941 | usart3_clk: usart3_clk { | |
942 | #clock-cells = <0>; | |
943 | reg = <9>; | |
944 | }; | |
945 | ||
946 | mci0_clk: mci0_clk { | |
947 | #clock-cells = <0>; | |
948 | reg = <10>; | |
949 | }; | |
950 | ||
951 | twi0_clk: twi0_clk { | |
952 | #clock-cells = <0>; | |
953 | reg = <11>; | |
954 | }; | |
955 | ||
956 | twi1_clk: twi1_clk { | |
957 | #clock-cells = <0>; | |
958 | reg = <12>; | |
959 | }; | |
960 | ||
961 | spi0_clk: spi0_clk { | |
962 | #clock-cells = <0>; | |
963 | reg = <13>; | |
964 | }; | |
965 | ||
966 | ssc0_clk: ssc0_clk { | |
967 | #clock-cells = <0>; | |
968 | reg = <14>; | |
969 | }; | |
970 | ||
971 | ssc1_clk: ssc1_clk { | |
972 | #clock-cells = <0>; | |
973 | reg = <15>; | |
974 | }; | |
975 | ||
976 | tc0_clk: tc0_clk { | |
977 | #clock-cells = <0>; | |
978 | reg = <16>; | |
979 | }; | |
980 | ||
981 | tc1_clk: tc1_clk { | |
982 | #clock-cells = <0>; | |
983 | reg = <17>; | |
984 | }; | |
985 | ||
986 | tc2_clk: tc2_clk { | |
987 | #clock-cells = <0>; | |
988 | reg = <18>; | |
989 | }; | |
990 | ||
991 | pwm_clk: pwm_clk { | |
992 | #clock-cells = <0>; | |
993 | reg = <19>; | |
994 | }; | |
995 | ||
996 | adc_clk: adc_clk { | |
997 | #clock-cells = <0>; | |
998 | reg = <20>; | |
999 | }; | |
1000 | ||
1001 | dma0_clk: dma0_clk { | |
1002 | #clock-cells = <0>; | |
1003 | reg = <21>; | |
1004 | }; | |
1005 | ||
1006 | udphs_clk: udphs_clk { | |
1007 | #clock-cells = <0>; | |
1008 | reg = <22>; | |
1009 | }; | |
1010 | ||
1011 | lcd_clk: lcd_clk { | |
1012 | #clock-cells = <0>; | |
1013 | reg = <23>; | |
1014 | }; | |
1015 | }; | |
7aff448f AB |
1016 | }; |
1017 | ||
1018 | rstc@fffffd00 { | |
1019 | compatible = "atmel,at91sam9260-rstc"; | |
1020 | reg = <0xfffffd00 0x10>; | |
1021 | }; | |
1022 | ||
1023 | shdwc@fffffd10 { | |
1024 | compatible = "atmel,at91sam9260-shdwc"; | |
1025 | reg = <0xfffffd10 0x10>; | |
1026 | }; | |
1027 | ||
1028 | pit: timer@fffffd30 { | |
1029 | compatible = "atmel,at91sam9260-pit"; | |
1030 | reg = <0xfffffd30 0xf>; | |
1031 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
8dc5d8e8 | 1032 | clocks = <&mck>; |
7aff448f AB |
1033 | }; |
1034 | ||
1035 | watchdog@fffffd40 { | |
1036 | compatible = "atmel,at91sam9260-wdt"; | |
1037 | reg = <0xfffffd40 0x10>; | |
1038 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
1039 | status = "disabled"; | |
1040 | }; | |
2078da96 BB |
1041 | |
1042 | sckc@fffffd50 { | |
1043 | compatible = "atmel,at91sam9x5-sckc"; | |
1044 | reg = <0xfffffd50 0x4>; | |
1045 | ||
1046 | slow_osc: slow_osc { | |
1047 | compatible = "atmel,at91sam9x5-clk-slow-osc"; | |
1048 | #clock-cells = <0>; | |
1049 | atmel,startup-time-usec = <1200000>; | |
1050 | clocks = <&slow_xtal>; | |
1051 | }; | |
1052 | ||
1053 | slow_rc_osc: slow_rc_osc { | |
1054 | compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; | |
1055 | #clock-cells = <0>; | |
1056 | atmel,startup-time-usec = <75>; | |
1057 | clock-frequency = <32768>; | |
1058 | clock-accuracy = <50000000>; | |
1059 | }; | |
1060 | ||
1061 | clk32k: slck { | |
1062 | compatible = "atmel,at91sam9x5-clk-slow"; | |
1063 | #clock-cells = <0>; | |
1064 | clocks = <&slow_rc_osc &slow_osc>; | |
1065 | }; | |
1066 | }; | |
30043f4e | 1067 | |
9b5a0675 BB |
1068 | rtc@fffffd20 { |
1069 | compatible = "atmel,at91sam9260-rtt"; | |
1070 | reg = <0xfffffd20 0x10>; | |
1071 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
1072 | clocks = <&clk32k>; | |
1073 | status = "disabled"; | |
1074 | }; | |
1ff3beca BB |
1075 | |
1076 | gpbr: syscon@fffffd60 { | |
1077 | compatible = "atmel,at91sam9260-gpbr", "syscon"; | |
1078 | reg = <0xfffffd60 0x10>; | |
1079 | status = "disabled"; | |
1080 | }; | |
e24bf9c6 AB |
1081 | |
1082 | rtc@fffffe00 { | |
1083 | compatible = "atmel,at91rm9200-rtc"; | |
1084 | reg = <0xfffffe00 0x40>; | |
1085 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
1086 | status = "disabled"; | |
1087 | }; | |
1088 | ||
7aff448f AB |
1089 | }; |
1090 | }; | |
1091 | ||
1092 | i2c@0 { | |
1093 | compatible = "i2c-gpio"; | |
1094 | gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ | |
1095 | <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ | |
1096 | i2c-gpio,sda-open-drain; | |
1097 | i2c-gpio,scl-open-drain; | |
1098 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1099 | #address-cells = <1>; | |
1100 | #size-cells = <0>; | |
1101 | pinctrl-names = "default"; | |
1102 | pinctrl-0 = <&pinctrl_i2c_gpio0>; | |
1103 | status = "disabled"; | |
1104 | }; | |
1105 | ||
1106 | i2c@1 { | |
1107 | compatible = "i2c-gpio"; | |
1108 | gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ | |
1109 | <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ | |
1110 | i2c-gpio,sda-open-drain; | |
1111 | i2c-gpio,scl-open-drain; | |
1112 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1113 | #address-cells = <1>; | |
1114 | #size-cells = <0>; | |
1115 | pinctrl-names = "default"; | |
1116 | pinctrl-0 = <&pinctrl_i2c_gpio1>; | |
1117 | status = "disabled"; | |
1118 | }; | |
1119 | }; |