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7aff448f AB |
1 | /* |
2 | * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC | |
3 | * | |
4 | * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com> | |
5 | * | |
6 | * Licensed under GPLv2 or later. | |
7 | */ | |
8 | ||
9 | #include "skeleton.dtsi" | |
10 | #include <dt-bindings/pinctrl/at91.h> | |
35d35aae | 11 | #include <dt-bindings/clock/at91.h> |
7aff448f AB |
12 | #include <dt-bindings/interrupt-controller/irq.h> |
13 | #include <dt-bindings/gpio/gpio.h> | |
a4c1d6c7 | 14 | #include <dt-bindings/pwm/pwm.h> |
7aff448f AB |
15 | |
16 | / { | |
17 | model = "Atmel AT91SAM9RL family SoC"; | |
18 | compatible = "atmel,at91sam9rl", "atmel,at91sam9"; | |
19 | interrupt-parent = <&aic>; | |
20 | ||
21 | aliases { | |
22 | serial0 = &dbgu; | |
23 | serial1 = &usart0; | |
24 | serial2 = &usart1; | |
25 | serial3 = &usart2; | |
26 | serial4 = &usart3; | |
27 | gpio0 = &pioA; | |
28 | gpio1 = &pioB; | |
29 | gpio2 = &pioC; | |
30 | gpio3 = &pioD; | |
31 | tcb0 = &tcb0; | |
32 | i2c0 = &i2c0; | |
33 | i2c1 = &i2c1; | |
34 | ssc0 = &ssc0; | |
35 | ssc1 = &ssc1; | |
a4c1d6c7 | 36 | pwm0 = &pwm0; |
7aff448f AB |
37 | }; |
38 | ||
39 | cpus { | |
40 | #address-cells = <0>; | |
41 | #size-cells = <0>; | |
42 | ||
43 | cpu { | |
44 | compatible = "arm,arm926ej-s"; | |
45 | device_type = "cpu"; | |
46 | }; | |
47 | }; | |
48 | ||
49 | memory { | |
50 | reg = <0x20000000 0x04000000>; | |
51 | }; | |
52 | ||
c2c9e78e AB |
53 | clocks { |
54 | slow_xtal: slow_xtal { | |
55 | compatible = "fixed-clock"; | |
56 | #clock-cells = <0>; | |
57 | clock-frequency = <0>; | |
58 | }; | |
2078da96 | 59 | |
c2c9e78e AB |
60 | main_xtal: main_xtal { |
61 | compatible = "fixed-clock"; | |
62 | #clock-cells = <0>; | |
63 | clock-frequency = <0>; | |
64 | }; | |
2078da96 | 65 | |
a4c1d6c7 AB |
66 | adc_op_clk: adc_op_clk{ |
67 | compatible = "fixed-clock"; | |
68 | #clock-cells = <0>; | |
69 | clock-frequency = <1000000>; | |
70 | }; | |
71 | }; | |
72 | ||
f04660e4 AB |
73 | sram: sram@00300000 { |
74 | compatible = "mmio-sram"; | |
75 | reg = <0x00300000 0x10000>; | |
76 | }; | |
77 | ||
7aff448f AB |
78 | ahb { |
79 | compatible = "simple-bus"; | |
80 | #address-cells = <1>; | |
81 | #size-cells = <1>; | |
82 | ranges; | |
83 | ||
a4c1d6c7 AB |
84 | fb0: fb@00500000 { |
85 | compatible = "atmel,at91sam9rl-lcdc"; | |
86 | reg = <0x00500000 0x1000>; | |
87 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; | |
88 | pinctrl-names = "default"; | |
89 | pinctrl-0 = <&pinctrl_fb>; | |
90 | clocks = <&lcd_clk>, <&lcd_clk>; | |
91 | clock-names = "hclk", "lcdc_clk"; | |
92 | status = "disabled"; | |
93 | }; | |
94 | ||
d9c41bf3 BB |
95 | ebi: ebi@10000000 { |
96 | compatible = "atmel,at91sam9rl-ebi"; | |
97 | #address-cells = <2>; | |
98 | #size-cells = <1>; | |
99 | atmel,smc = <&smc>; | |
100 | atmel,matrix = <&matrix>; | |
101 | reg = <0x10000000 0x80000000>; | |
102 | ranges = <0x0 0x0 0x10000000 0x10000000 | |
103 | 0x1 0x0 0x20000000 0x10000000 | |
104 | 0x2 0x0 0x30000000 0x10000000 | |
105 | 0x3 0x0 0x40000000 0x10000000 | |
106 | 0x4 0x0 0x50000000 0x10000000 | |
107 | 0x5 0x0 0x60000000 0x10000000>; | |
108 | clocks = <&mck>; | |
109 | status = "disabled"; | |
110 | ||
111 | nand_controller: nand-controller { | |
112 | compatible = "atmel,at91sam9g45-nand-controller"; | |
113 | #address-cells = <2>; | |
114 | #size-cells = <1>; | |
115 | ranges; | |
116 | status = "disabled"; | |
117 | }; | |
118 | }; | |
119 | ||
7aff448f AB |
120 | apb { |
121 | compatible = "simple-bus"; | |
122 | #address-cells = <1>; | |
123 | #size-cells = <1>; | |
124 | ranges; | |
125 | ||
126 | tcb0: timer@fffa0000 { | |
127 | compatible = "atmel,at91rm9200-tcb"; | |
128 | reg = <0xfffa0000 0x100>; | |
129 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, | |
130 | <17 IRQ_TYPE_LEVEL_HIGH 0>, | |
131 | <18 IRQ_TYPE_LEVEL_HIGH 0>; | |
8c945b7e AB |
132 | clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>; |
133 | clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; | |
7aff448f AB |
134 | }; |
135 | ||
136 | mmc0: mmc@fffa4000 { | |
137 | compatible = "atmel,hsmci"; | |
138 | reg = <0xfffa4000 0x600>; | |
139 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; | |
140 | #address-cells = <1>; | |
141 | #size-cells = <0>; | |
142 | pinctrl-names = "default"; | |
8dc5d8e8 AB |
143 | clocks = <&mci0_clk>; |
144 | clock-names = "mci_clk"; | |
7aff448f AB |
145 | status = "disabled"; |
146 | }; | |
147 | ||
148 | i2c0: i2c@fffa8000 { | |
149 | compatible = "atmel,at91sam9260-i2c"; | |
150 | reg = <0xfffa8000 0x100>; | |
151 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; | |
152 | #address-cells = <1>; | |
153 | #size-cells = <0>; | |
8dc5d8e8 | 154 | clocks = <&twi0_clk>; |
7aff448f AB |
155 | status = "disabled"; |
156 | }; | |
157 | ||
158 | i2c1: i2c@fffac000 { | |
159 | compatible = "atmel,at91sam9260-i2c"; | |
160 | reg = <0xfffac000 0x100>; | |
161 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; | |
162 | #address-cells = <1>; | |
163 | #size-cells = <0>; | |
164 | status = "disabled"; | |
165 | }; | |
166 | ||
167 | usart0: serial@fffb0000 { | |
168 | compatible = "atmel,at91sam9260-usart"; | |
169 | reg = <0xfffb0000 0x200>; | |
170 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; | |
171 | atmel,use-dma-rx; | |
172 | atmel,use-dma-tx; | |
173 | pinctrl-names = "default"; | |
174 | pinctrl-0 = <&pinctrl_usart0>; | |
8dc5d8e8 AB |
175 | clocks = <&usart0_clk>; |
176 | clock-names = "usart"; | |
7aff448f AB |
177 | status = "disabled"; |
178 | }; | |
179 | ||
180 | usart1: serial@fffb4000 { | |
181 | compatible = "atmel,at91sam9260-usart"; | |
182 | reg = <0xfffb4000 0x200>; | |
183 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; | |
184 | atmel,use-dma-rx; | |
185 | atmel,use-dma-tx; | |
186 | pinctrl-names = "default"; | |
187 | pinctrl-0 = <&pinctrl_usart1>; | |
8dc5d8e8 AB |
188 | clocks = <&usart1_clk>; |
189 | clock-names = "usart"; | |
7aff448f AB |
190 | status = "disabled"; |
191 | }; | |
192 | ||
193 | usart2: serial@fffb8000 { | |
194 | compatible = "atmel,at91sam9260-usart"; | |
195 | reg = <0xfffb8000 0x200>; | |
196 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; | |
197 | atmel,use-dma-rx; | |
198 | atmel,use-dma-tx; | |
199 | pinctrl-names = "default"; | |
200 | pinctrl-0 = <&pinctrl_usart2>; | |
8dc5d8e8 AB |
201 | clocks = <&usart2_clk>; |
202 | clock-names = "usart"; | |
7aff448f AB |
203 | status = "disabled"; |
204 | }; | |
205 | ||
206 | usart3: serial@fffbc000 { | |
207 | compatible = "atmel,at91sam9260-usart"; | |
208 | reg = <0xfffbc000 0x200>; | |
209 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; | |
210 | atmel,use-dma-rx; | |
211 | atmel,use-dma-tx; | |
212 | pinctrl-names = "default"; | |
213 | pinctrl-0 = <&pinctrl_usart3>; | |
8dc5d8e8 AB |
214 | clocks = <&usart3_clk>; |
215 | clock-names = "usart"; | |
7aff448f AB |
216 | status = "disabled"; |
217 | }; | |
218 | ||
219 | ssc0: ssc@fffc0000 { | |
496d3c28 | 220 | compatible = "atmel,at91sam9rl-ssc"; |
7aff448f AB |
221 | reg = <0xfffc0000 0x4000>; |
222 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | |
223 | pinctrl-names = "default"; | |
224 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
225 | status = "disabled"; | |
226 | }; | |
227 | ||
228 | ssc1: ssc@fffc4000 { | |
496d3c28 | 229 | compatible = "atmel,at91sam9rl-ssc"; |
7aff448f AB |
230 | reg = <0xfffc4000 0x4000>; |
231 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | |
232 | pinctrl-names = "default"; | |
233 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
234 | status = "disabled"; | |
235 | }; | |
236 | ||
a4c1d6c7 AB |
237 | pwm0: pwm@fffc8000 { |
238 | compatible = "atmel,at91sam9rl-pwm"; | |
239 | reg = <0xfffc8000 0x300>; | |
240 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; | |
241 | #pwm-cells = <3>; | |
242 | clocks = <&pwm_clk>; | |
243 | clock-names = "pwm_clk"; | |
244 | status = "disabled"; | |
245 | }; | |
246 | ||
7aff448f AB |
247 | spi0: spi@fffcc000 { |
248 | #address-cells = <1>; | |
249 | #size-cells = <0>; | |
250 | compatible = "atmel,at91rm9200-spi"; | |
251 | reg = <0xfffcc000 0x200>; | |
252 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; | |
253 | pinctrl-names = "default"; | |
254 | pinctrl-0 = <&pinctrl_spi0>; | |
8dc5d8e8 AB |
255 | clocks = <&spi0_clk>; |
256 | clock-names = "spi_clk"; | |
7aff448f AB |
257 | status = "disabled"; |
258 | }; | |
259 | ||
a4c1d6c7 AB |
260 | adc0: adc@fffd0000 { |
261 | #address-cells = <1>; | |
262 | #size-cells = <0>; | |
263 | compatible = "atmel,at91sam9rl-adc"; | |
264 | reg = <0xfffd0000 0x100>; | |
265 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; | |
266 | clocks = <&adc_clk>, <&adc_op_clk>; | |
267 | clock-names = "adc_clk", "adc_op_clk"; | |
268 | atmel,adc-use-external-triggers; | |
269 | atmel,adc-channels-used = <0x3f>; | |
270 | atmel,adc-vref = <3300>; | |
271 | atmel,adc-startup-time = <40>; | |
272 | atmel,adc-res = <8 10>; | |
273 | atmel,adc-res-names = "lowres", "highres"; | |
274 | atmel,adc-use-res = "highres"; | |
275 | ||
c94afa13 | 276 | trigger0 { |
a4c1d6c7 AB |
277 | trigger-name = "timer-counter-0"; |
278 | trigger-value = <0x1>; | |
279 | }; | |
c94afa13 | 280 | trigger1 { |
a4c1d6c7 AB |
281 | trigger-name = "timer-counter-1"; |
282 | trigger-value = <0x3>; | |
283 | }; | |
284 | ||
c94afa13 | 285 | trigger2 { |
a4c1d6c7 AB |
286 | trigger-name = "timer-counter-2"; |
287 | trigger-value = <0x5>; | |
288 | }; | |
289 | ||
c94afa13 | 290 | trigger3 { |
a4c1d6c7 AB |
291 | trigger-name = "external"; |
292 | trigger-value = <0x13>; | |
293 | trigger-external; | |
294 | }; | |
295 | }; | |
296 | ||
297 | usb0: gadget@fffd4000 { | |
298 | #address-cells = <1>; | |
299 | #size-cells = <0>; | |
300 | compatible = "atmel,at91sam9rl-udc"; | |
301 | reg = <0x00600000 0x100000>, | |
302 | <0xfffd4000 0x4000>; | |
303 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; | |
304 | clocks = <&udphs_clk>, <&utmi>; | |
305 | clock-names = "pclk", "hclk"; | |
306 | status = "disabled"; | |
307 | ||
c32b5bcf | 308 | ep@0 { |
a4c1d6c7 AB |
309 | reg = <0>; |
310 | atmel,fifo-size = <64>; | |
311 | atmel,nb-banks = <1>; | |
312 | }; | |
313 | ||
c32b5bcf | 314 | ep@1 { |
a4c1d6c7 AB |
315 | reg = <1>; |
316 | atmel,fifo-size = <1024>; | |
317 | atmel,nb-banks = <2>; | |
318 | atmel,can-dma; | |
319 | atmel,can-isoc; | |
320 | }; | |
321 | ||
c32b5bcf | 322 | ep@2 { |
a4c1d6c7 AB |
323 | reg = <2>; |
324 | atmel,fifo-size = <1024>; | |
325 | atmel,nb-banks = <2>; | |
326 | atmel,can-dma; | |
327 | atmel,can-isoc; | |
328 | }; | |
329 | ||
c32b5bcf | 330 | ep@3 { |
a4c1d6c7 AB |
331 | reg = <3>; |
332 | atmel,fifo-size = <1024>; | |
333 | atmel,nb-banks = <3>; | |
334 | atmel,can-dma; | |
335 | }; | |
336 | ||
c32b5bcf | 337 | ep@4 { |
a4c1d6c7 AB |
338 | reg = <4>; |
339 | atmel,fifo-size = <1024>; | |
340 | atmel,nb-banks = <3>; | |
341 | atmel,can-dma; | |
342 | }; | |
343 | ||
c32b5bcf | 344 | ep@5 { |
a4c1d6c7 AB |
345 | reg = <5>; |
346 | atmel,fifo-size = <1024>; | |
347 | atmel,nb-banks = <3>; | |
348 | atmel,can-dma; | |
349 | atmel,can-isoc; | |
350 | }; | |
351 | ||
c32b5bcf | 352 | ep@6 { |
a4c1d6c7 AB |
353 | reg = <6>; |
354 | atmel,fifo-size = <1024>; | |
355 | atmel,nb-banks = <3>; | |
356 | atmel,can-dma; | |
357 | atmel,can-isoc; | |
358 | }; | |
359 | }; | |
360 | ||
4cd92929 NF |
361 | dma0: dma-controller@ffffe600 { |
362 | compatible = "atmel,at91sam9rl-dma"; | |
363 | reg = <0xffffe600 0x200>; | |
364 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; | |
365 | #dma-cells = <2>; | |
366 | clocks = <&dma0_clk>; | |
367 | clock-names = "dma_clk"; | |
368 | }; | |
369 | ||
7aff448f AB |
370 | ramc0: ramc@ffffea00 { |
371 | compatible = "atmel,at91sam9260-sdramc"; | |
372 | reg = <0xffffea00 0x200>; | |
373 | }; | |
374 | ||
d9c41bf3 BB |
375 | smc: smc@ffffec00 { |
376 | compatible = "atmel,at91sam9260-smc", "syscon"; | |
377 | reg = <0xffffec00 0x200>; | |
378 | }; | |
379 | ||
380 | matrix: matrix@ffffee00 { | |
381 | compatible = "atmel,at91sam9rl-matrix", "syscon"; | |
382 | reg = <0xffffee00 0x200>; | |
383 | }; | |
384 | ||
7aff448f AB |
385 | aic: interrupt-controller@fffff000 { |
386 | #interrupt-cells = <3>; | |
387 | compatible = "atmel,at91rm9200-aic"; | |
388 | interrupt-controller; | |
389 | reg = <0xfffff000 0x200>; | |
390 | atmel,external-irqs = <31>; | |
391 | }; | |
392 | ||
393 | dbgu: serial@fffff200 { | |
8c07f664 | 394 | compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; |
7aff448f AB |
395 | reg = <0xfffff200 0x200>; |
396 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
397 | pinctrl-names = "default"; | |
398 | pinctrl-0 = <&pinctrl_dbgu>; | |
8dc5d8e8 AB |
399 | clocks = <&mck>; |
400 | clock-names = "usart"; | |
7aff448f AB |
401 | status = "disabled"; |
402 | }; | |
403 | ||
404 | pinctrl@fffff400 { | |
405 | #address-cells = <1>; | |
406 | #size-cells = <1>; | |
407 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
408 | ranges = <0xfffff400 0xfffff400 0x800>; | |
409 | ||
410 | atmel,mux-mask = | |
411 | /* A B */ | |
412 | <0xffffffff 0xe05c6738>, /* pioA */ | |
413 | <0xffffffff 0x0000c780>, /* pioB */ | |
414 | <0xffffffff 0xe3ffff0e>, /* pioC */ | |
415 | <0x003fffff 0x0001ff3c>; /* pioD */ | |
416 | ||
417 | /* shared pinctrl settings */ | |
a4c1d6c7 AB |
418 | adc0 { |
419 | pinctrl_adc0_ts: adc0_ts-0 { | |
420 | atmel,pins = | |
421 | <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
422 | <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
423 | <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
424 | <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
425 | }; | |
426 | ||
427 | pinctrl_adc0_ad0: adc0_ad0-0 { | |
428 | atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
429 | }; | |
430 | ||
431 | pinctrl_adc0_ad1: adc0_ad1-0 { | |
432 | atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
433 | }; | |
434 | ||
435 | pinctrl_adc0_ad2: adc0_ad2-0 { | |
436 | atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
437 | }; | |
438 | ||
439 | pinctrl_adc0_ad3: adc0_ad3-0 { | |
440 | atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
441 | }; | |
442 | ||
443 | pinctrl_adc0_ad4: adc0_ad4-0 { | |
444 | atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
445 | }; | |
446 | ||
447 | pinctrl_adc0_ad5: adc0_ad5-0 { | |
448 | atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
449 | }; | |
450 | ||
451 | pinctrl_adc0_adtrg: adc0_adtrg-0 { | |
452 | atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
453 | }; | |
454 | }; | |
455 | ||
7aff448f AB |
456 | dbgu { |
457 | pinctrl_dbgu: dbgu-0 { | |
458 | atmel,pins = | |
138c2b2f SR |
459 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, |
460 | <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
7aff448f AB |
461 | }; |
462 | }; | |
463 | ||
1004a297 BB |
464 | ebi { |
465 | pinctrl_ebi_addr_nand: ebi-addr-0 { | |
466 | atmel,pins = | |
467 | <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
468 | <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
469 | }; | |
470 | }; | |
471 | ||
a4c1d6c7 AB |
472 | fb { |
473 | pinctrl_fb: fb-0 { | |
474 | atmel,pins = | |
475 | <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
476 | <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
477 | <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
478 | <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
479 | <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
480 | <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
481 | <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
482 | <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
483 | <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
484 | <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
485 | <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
486 | <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
487 | <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
488 | <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
489 | <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
490 | <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
491 | <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
492 | <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
493 | <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
494 | <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
495 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
496 | }; | |
497 | }; | |
498 | ||
7aff448f AB |
499 | i2c_gpio0 { |
500 | pinctrl_i2c_gpio0: i2c_gpio0-0 { | |
501 | atmel,pins = | |
502 | <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, | |
503 | <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | |
504 | }; | |
505 | }; | |
506 | ||
507 | i2c_gpio1 { | |
508 | pinctrl_i2c_gpio1: i2c_gpio1-0 { | |
509 | atmel,pins = | |
510 | <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, | |
511 | <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; | |
512 | }; | |
513 | }; | |
514 | ||
515 | mmc0 { | |
516 | pinctrl_mmc0_clk: mmc0_clk-0 { | |
517 | atmel,pins = | |
518 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
519 | }; | |
520 | ||
521 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | |
522 | atmel,pins = | |
523 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
524 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
525 | }; | |
526 | ||
527 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
528 | atmel,pins = | |
529 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
530 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
531 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
532 | }; | |
533 | }; | |
534 | ||
535 | nand { | |
1004a297 | 536 | pinctrl_nand_rb: nand-rb-0 { |
7aff448f | 537 | atmel,pins = |
1004a297 | 538 | <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; |
7aff448f AB |
539 | }; |
540 | ||
1004a297 | 541 | pinctrl_nand_cs: nand-cs-0 { |
7aff448f | 542 | atmel,pins = |
1004a297 | 543 | <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; |
7aff448f AB |
544 | }; |
545 | ||
1004a297 | 546 | pinctrl_nand_oe_we: nand-oe-we-0 { |
7aff448f AB |
547 | atmel,pins = |
548 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
549 | <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
550 | }; | |
7aff448f AB |
551 | }; |
552 | ||
a4c1d6c7 AB |
553 | pwm0 { |
554 | pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { | |
555 | atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
556 | }; | |
557 | ||
558 | pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { | |
559 | atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
560 | }; | |
561 | ||
562 | pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { | |
563 | atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
564 | }; | |
565 | ||
566 | pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { | |
567 | atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
568 | }; | |
569 | ||
570 | pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { | |
571 | atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
572 | }; | |
573 | ||
574 | pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { | |
575 | atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
576 | }; | |
577 | ||
578 | pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { | |
579 | atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
580 | }; | |
581 | ||
582 | pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { | |
583 | atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
584 | }; | |
585 | ||
586 | pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { | |
587 | atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
588 | }; | |
589 | ||
590 | pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { | |
591 | atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
592 | }; | |
593 | ||
594 | pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { | |
595 | atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
596 | }; | |
597 | }; | |
598 | ||
599 | spi0 { | |
600 | pinctrl_spi0: spi0-0 { | |
601 | atmel,pins = | |
602 | <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
603 | <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
604 | <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
605 | }; | |
606 | }; | |
607 | ||
7aff448f AB |
608 | ssc0 { |
609 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
610 | atmel,pins = | |
611 | <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
612 | <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
613 | <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
614 | }; | |
615 | ||
616 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
617 | atmel,pins = | |
618 | <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
619 | <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
620 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
621 | }; | |
622 | }; | |
623 | ||
624 | ssc1 { | |
625 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
626 | atmel,pins = | |
627 | <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
628 | <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
629 | <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
630 | }; | |
631 | ||
632 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
633 | atmel,pins = | |
634 | <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
635 | <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
636 | <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
637 | }; | |
638 | }; | |
639 | ||
7aff448f AB |
640 | tcb0 { |
641 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
642 | atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
643 | }; | |
644 | ||
645 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
646 | atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
647 | }; | |
648 | ||
649 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
650 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
651 | }; | |
652 | ||
653 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
654 | atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
655 | }; | |
656 | ||
657 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
658 | atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
659 | }; | |
660 | ||
661 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
662 | atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
663 | }; | |
664 | ||
665 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
666 | atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
667 | }; | |
668 | ||
669 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
670 | atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
671 | }; | |
672 | ||
673 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
674 | atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
675 | }; | |
676 | }; | |
677 | ||
678 | usart0 { | |
679 | pinctrl_usart0: usart0-0 { | |
680 | atmel,pins = | |
681 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
682 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
683 | }; | |
684 | ||
685 | pinctrl_usart0_rts: usart0_rts-0 { | |
686 | atmel,pins = | |
687 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
688 | }; | |
689 | ||
690 | pinctrl_usart0_cts: usart0_cts-0 { | |
691 | atmel,pins = | |
692 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
693 | }; | |
694 | ||
695 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { | |
696 | atmel,pins = | |
697 | <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
698 | <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
699 | }; | |
700 | ||
701 | pinctrl_usart0_dcd: usart0_dcd-0 { | |
702 | atmel,pins = | |
703 | <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
704 | }; | |
705 | ||
706 | pinctrl_usart0_ri: usart0_ri-0 { | |
707 | atmel,pins = | |
708 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
709 | }; | |
710 | ||
711 | pinctrl_usart0_sck: usart0_sck-0 { | |
712 | atmel,pins = | |
713 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
714 | }; | |
715 | }; | |
716 | ||
717 | usart1 { | |
718 | pinctrl_usart1: usart1-0 { | |
719 | atmel,pins = | |
720 | <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
721 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
722 | }; | |
723 | ||
724 | pinctrl_usart1_rts: usart1_rts-0 { | |
725 | atmel,pins = | |
726 | <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
727 | }; | |
728 | ||
729 | pinctrl_usart1_cts: usart1_cts-0 { | |
730 | atmel,pins = | |
731 | <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
732 | }; | |
733 | ||
734 | pinctrl_usart1_sck: usart1_sck-0 { | |
735 | atmel,pins = | |
736 | <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
737 | }; | |
738 | }; | |
739 | ||
740 | usart2 { | |
741 | pinctrl_usart2: usart2-0 { | |
742 | atmel,pins = | |
743 | <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
744 | <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
745 | }; | |
746 | ||
747 | pinctrl_usart2_rts: usart2_rts-0 { | |
748 | atmel,pins = | |
749 | <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
750 | }; | |
751 | ||
752 | pinctrl_usart2_cts: usart2_cts-0 { | |
753 | atmel,pins = | |
754 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
755 | }; | |
756 | ||
757 | pinctrl_usart2_sck: usart2_sck-0 { | |
758 | atmel,pins = | |
759 | <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
760 | }; | |
761 | }; | |
762 | ||
763 | usart3 { | |
764 | pinctrl_usart3: usart3-0 { | |
765 | atmel,pins = | |
766 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
767 | <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
768 | }; | |
769 | ||
770 | pinctrl_usart3_rts: usart3_rts-0 { | |
771 | atmel,pins = | |
772 | <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
773 | }; | |
774 | ||
775 | pinctrl_usart3_cts: usart3_cts-0 { | |
776 | atmel,pins = | |
777 | <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
778 | }; | |
779 | ||
780 | pinctrl_usart3_sck: usart3_sck-0 { | |
781 | atmel,pins = | |
782 | <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
783 | }; | |
784 | }; | |
785 | ||
786 | pioA: gpio@fffff400 { | |
787 | compatible = "atmel,at91rm9200-gpio"; | |
788 | reg = <0xfffff400 0x200>; | |
789 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; | |
790 | #gpio-cells = <2>; | |
791 | gpio-controller; | |
792 | interrupt-controller; | |
793 | #interrupt-cells = <2>; | |
8dc5d8e8 | 794 | clocks = <&pioA_clk>; |
7aff448f AB |
795 | }; |
796 | ||
797 | pioB: gpio@fffff600 { | |
798 | compatible = "atmel,at91rm9200-gpio"; | |
799 | reg = <0xfffff600 0x200>; | |
800 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; | |
801 | #gpio-cells = <2>; | |
802 | gpio-controller; | |
803 | interrupt-controller; | |
804 | #interrupt-cells = <2>; | |
8dc5d8e8 | 805 | clocks = <&pioB_clk>; |
7aff448f AB |
806 | }; |
807 | ||
808 | pioC: gpio@fffff800 { | |
809 | compatible = "atmel,at91rm9200-gpio"; | |
810 | reg = <0xfffff800 0x200>; | |
811 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; | |
812 | #gpio-cells = <2>; | |
813 | gpio-controller; | |
814 | interrupt-controller; | |
815 | #interrupt-cells = <2>; | |
8dc5d8e8 | 816 | clocks = <&pioC_clk>; |
7aff448f AB |
817 | }; |
818 | ||
819 | pioD: gpio@fffffa00 { | |
820 | compatible = "atmel,at91rm9200-gpio"; | |
821 | reg = <0xfffffa00 0x200>; | |
822 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; | |
823 | #gpio-cells = <2>; | |
824 | gpio-controller; | |
825 | interrupt-controller; | |
826 | #interrupt-cells = <2>; | |
8dc5d8e8 | 827 | clocks = <&pioD_clk>; |
7aff448f AB |
828 | }; |
829 | }; | |
830 | ||
831 | pmc: pmc@fffffc00 { | |
620f5033 | 832 | compatible = "atmel,at91sam9g45-pmc", "syscon"; |
7aff448f | 833 | reg = <0xfffffc00 0x100>; |
8dc5d8e8 AB |
834 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
835 | interrupt-controller; | |
836 | #address-cells = <1>; | |
837 | #size-cells = <0>; | |
838 | #interrupt-cells = <1>; | |
839 | ||
8dc5d8e8 AB |
840 | main: mainck { |
841 | compatible = "atmel,at91rm9200-clk-main"; | |
842 | #clock-cells = <0>; | |
843 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
2078da96 | 844 | clocks = <&main_xtal>; |
8dc5d8e8 AB |
845 | }; |
846 | ||
847 | plla: pllack { | |
848 | compatible = "atmel,at91rm9200-clk-pll"; | |
849 | #clock-cells = <0>; | |
850 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
851 | clocks = <&main>; | |
852 | reg = <0>; | |
853 | atmel,clk-input-range = <1000000 32000000>; | |
201d7dd0 AB |
854 | #atmel,pll-clk-output-range-cells = <3>; |
855 | atmel,pll-clk-output-ranges = <80000000 200000000 0>, | |
856 | <190000000 240000000 2>; | |
8dc5d8e8 AB |
857 | }; |
858 | ||
859 | utmi: utmick { | |
860 | compatible = "atmel,at91sam9x5-clk-utmi"; | |
861 | #clock-cells = <0>; | |
862 | interrupt-parent = <&pmc>; | |
863 | interrupts = <AT91_PMC_LOCKU>; | |
864 | clocks = <&main>; | |
865 | }; | |
866 | ||
867 | mck: masterck { | |
868 | compatible = "atmel,at91rm9200-clk-master"; | |
869 | #clock-cells = <0>; | |
870 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
871 | clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; | |
872 | atmel,clk-output-range = <0 94000000>; | |
201d7dd0 | 873 | atmel,clk-divisors = <1 2 4 0>; |
8dc5d8e8 AB |
874 | }; |
875 | ||
876 | prog: progck { | |
877 | compatible = "atmel,at91rm9200-clk-programmable"; | |
878 | #address-cells = <1>; | |
879 | #size-cells = <0>; | |
880 | interrupt-parent = <&pmc>; | |
881 | clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>; | |
882 | ||
883 | prog0: prog0 { | |
884 | #clock-cells = <0>; | |
885 | reg = <0>; | |
886 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
887 | }; | |
888 | ||
889 | prog1: prog1 { | |
890 | #clock-cells = <0>; | |
891 | reg = <1>; | |
892 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
893 | }; | |
894 | }; | |
895 | ||
896 | systemck { | |
897 | compatible = "atmel,at91rm9200-clk-system"; | |
898 | #address-cells = <1>; | |
899 | #size-cells = <0>; | |
900 | ||
901 | pck0: pck0 { | |
902 | #clock-cells = <0>; | |
903 | reg = <8>; | |
904 | clocks = <&prog0>; | |
905 | }; | |
906 | ||
907 | pck1: pck1 { | |
908 | #clock-cells = <0>; | |
909 | reg = <9>; | |
910 | clocks = <&prog1>; | |
911 | }; | |
912 | ||
913 | }; | |
914 | ||
915 | periphck { | |
916 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
917 | #address-cells = <1>; | |
918 | #size-cells = <0>; | |
919 | clocks = <&mck>; | |
920 | ||
921 | pioA_clk: pioA_clk { | |
922 | #clock-cells = <0>; | |
923 | reg = <2>; | |
924 | }; | |
925 | ||
926 | pioB_clk: pioB_clk { | |
927 | #clock-cells = <0>; | |
928 | reg = <3>; | |
929 | }; | |
930 | ||
931 | pioC_clk: pioC_clk { | |
932 | #clock-cells = <0>; | |
933 | reg = <4>; | |
934 | }; | |
935 | ||
936 | pioD_clk: pioD_clk { | |
937 | #clock-cells = <0>; | |
938 | reg = <5>; | |
939 | }; | |
940 | ||
941 | usart0_clk: usart0_clk { | |
942 | #clock-cells = <0>; | |
943 | reg = <6>; | |
944 | }; | |
945 | ||
946 | usart1_clk: usart1_clk { | |
947 | #clock-cells = <0>; | |
948 | reg = <7>; | |
949 | }; | |
950 | ||
951 | usart2_clk: usart2_clk { | |
952 | #clock-cells = <0>; | |
953 | reg = <8>; | |
954 | }; | |
955 | ||
956 | usart3_clk: usart3_clk { | |
957 | #clock-cells = <0>; | |
958 | reg = <9>; | |
959 | }; | |
960 | ||
961 | mci0_clk: mci0_clk { | |
962 | #clock-cells = <0>; | |
963 | reg = <10>; | |
964 | }; | |
965 | ||
966 | twi0_clk: twi0_clk { | |
967 | #clock-cells = <0>; | |
968 | reg = <11>; | |
969 | }; | |
970 | ||
971 | twi1_clk: twi1_clk { | |
972 | #clock-cells = <0>; | |
973 | reg = <12>; | |
974 | }; | |
975 | ||
976 | spi0_clk: spi0_clk { | |
977 | #clock-cells = <0>; | |
978 | reg = <13>; | |
979 | }; | |
980 | ||
981 | ssc0_clk: ssc0_clk { | |
982 | #clock-cells = <0>; | |
983 | reg = <14>; | |
984 | }; | |
985 | ||
986 | ssc1_clk: ssc1_clk { | |
987 | #clock-cells = <0>; | |
988 | reg = <15>; | |
989 | }; | |
990 | ||
991 | tc0_clk: tc0_clk { | |
992 | #clock-cells = <0>; | |
993 | reg = <16>; | |
994 | }; | |
995 | ||
996 | tc1_clk: tc1_clk { | |
997 | #clock-cells = <0>; | |
998 | reg = <17>; | |
999 | }; | |
1000 | ||
1001 | tc2_clk: tc2_clk { | |
1002 | #clock-cells = <0>; | |
1003 | reg = <18>; | |
1004 | }; | |
1005 | ||
1006 | pwm_clk: pwm_clk { | |
1007 | #clock-cells = <0>; | |
1008 | reg = <19>; | |
1009 | }; | |
1010 | ||
1011 | adc_clk: adc_clk { | |
1012 | #clock-cells = <0>; | |
1013 | reg = <20>; | |
1014 | }; | |
1015 | ||
1016 | dma0_clk: dma0_clk { | |
1017 | #clock-cells = <0>; | |
1018 | reg = <21>; | |
1019 | }; | |
1020 | ||
1021 | udphs_clk: udphs_clk { | |
1022 | #clock-cells = <0>; | |
1023 | reg = <22>; | |
1024 | }; | |
1025 | ||
1026 | lcd_clk: lcd_clk { | |
1027 | #clock-cells = <0>; | |
1028 | reg = <23>; | |
1029 | }; | |
1030 | }; | |
7aff448f AB |
1031 | }; |
1032 | ||
1033 | rstc@fffffd00 { | |
1034 | compatible = "atmel,at91sam9260-rstc"; | |
1035 | reg = <0xfffffd00 0x10>; | |
8c945b7e | 1036 | clocks = <&clk32k>; |
7aff448f AB |
1037 | }; |
1038 | ||
1039 | shdwc@fffffd10 { | |
1040 | compatible = "atmel,at91sam9260-shdwc"; | |
1041 | reg = <0xfffffd10 0x10>; | |
8c945b7e | 1042 | clocks = <&clk32k>; |
7aff448f AB |
1043 | }; |
1044 | ||
1045 | pit: timer@fffffd30 { | |
1046 | compatible = "atmel,at91sam9260-pit"; | |
1047 | reg = <0xfffffd30 0xf>; | |
1048 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
8dc5d8e8 | 1049 | clocks = <&mck>; |
7aff448f AB |
1050 | }; |
1051 | ||
1052 | watchdog@fffffd40 { | |
1053 | compatible = "atmel,at91sam9260-wdt"; | |
1054 | reg = <0xfffffd40 0x10>; | |
1055 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
8c945b7e | 1056 | clocks = <&clk32k>; |
7aff448f AB |
1057 | status = "disabled"; |
1058 | }; | |
2078da96 BB |
1059 | |
1060 | sckc@fffffd50 { | |
1061 | compatible = "atmel,at91sam9x5-sckc"; | |
1062 | reg = <0xfffffd50 0x4>; | |
1063 | ||
1064 | slow_osc: slow_osc { | |
1065 | compatible = "atmel,at91sam9x5-clk-slow-osc"; | |
1066 | #clock-cells = <0>; | |
1067 | atmel,startup-time-usec = <1200000>; | |
1068 | clocks = <&slow_xtal>; | |
1069 | }; | |
1070 | ||
1071 | slow_rc_osc: slow_rc_osc { | |
1072 | compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; | |
1073 | #clock-cells = <0>; | |
1074 | atmel,startup-time-usec = <75>; | |
1075 | clock-frequency = <32768>; | |
1076 | clock-accuracy = <50000000>; | |
1077 | }; | |
1078 | ||
1079 | clk32k: slck { | |
1080 | compatible = "atmel,at91sam9x5-clk-slow"; | |
1081 | #clock-cells = <0>; | |
1082 | clocks = <&slow_rc_osc &slow_osc>; | |
1083 | }; | |
1084 | }; | |
30043f4e | 1085 | |
9b5a0675 BB |
1086 | rtc@fffffd20 { |
1087 | compatible = "atmel,at91sam9260-rtt"; | |
1088 | reg = <0xfffffd20 0x10>; | |
1089 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
1090 | clocks = <&clk32k>; | |
1091 | status = "disabled"; | |
1092 | }; | |
1ff3beca BB |
1093 | |
1094 | gpbr: syscon@fffffd60 { | |
1095 | compatible = "atmel,at91sam9260-gpbr", "syscon"; | |
1096 | reg = <0xfffffd60 0x10>; | |
1097 | status = "disabled"; | |
1098 | }; | |
e24bf9c6 AB |
1099 | |
1100 | rtc@fffffe00 { | |
1101 | compatible = "atmel,at91rm9200-rtc"; | |
1102 | reg = <0xfffffe00 0x40>; | |
1103 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
8c945b7e | 1104 | clocks = <&clk32k>; |
e24bf9c6 AB |
1105 | status = "disabled"; |
1106 | }; | |
1107 | ||
7aff448f AB |
1108 | }; |
1109 | }; | |
1110 | ||
e152e3f7 | 1111 | i2c-gpio-0 { |
7aff448f AB |
1112 | compatible = "i2c-gpio"; |
1113 | gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ | |
1114 | <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ | |
1115 | i2c-gpio,sda-open-drain; | |
1116 | i2c-gpio,scl-open-drain; | |
1117 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1118 | #address-cells = <1>; | |
1119 | #size-cells = <0>; | |
1120 | pinctrl-names = "default"; | |
1121 | pinctrl-0 = <&pinctrl_i2c_gpio0>; | |
1122 | status = "disabled"; | |
1123 | }; | |
1124 | ||
e152e3f7 | 1125 | i2c-gpio-1 { |
7aff448f AB |
1126 | compatible = "i2c-gpio"; |
1127 | gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ | |
1128 | <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ | |
1129 | i2c-gpio,sda-open-drain; | |
1130 | i2c-gpio,scl-open-drain; | |
1131 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1132 | #address-cells = <1>; | |
1133 | #size-cells = <0>; | |
1134 | pinctrl-names = "default"; | |
1135 | pinctrl-0 = <&pinctrl_i2c_gpio1>; | |
1136 | status = "disabled"; | |
1137 | }; | |
1138 | }; |