projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 4abb3677 JCPV |
1 | /* |
| 2 | * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | |
| 5 | * | |
| 6 | * Licensed under GPLv2 only. | |
| 7 | */ | |
| 8 | ||
| 6db64d29 | 9 | #include "skeleton.dtsi" |
| c9d0f317 | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 5e8b3bc3 | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 92f8629b | 12 | #include <dt-bindings/gpio/gpio.h> |
| c2375821 | 13 | #include <dt-bindings/clock/at91.h> |
| 4abb3677 JCPV |
14 | |
| 15 | / { | |
| 16 | model = "Atmel AT91SAM9263 family SoC"; | |
| 17 | compatible = "atmel,at91sam9263"; | |
| 18 | interrupt-parent = <&aic>; | |
| 19 | ||
| 20 | aliases { | |
| 21 | serial0 = &dbgu; | |
| 22 | serial1 = &usart0; | |
| 23 | serial2 = &usart1; | |
| 24 | serial3 = &usart2; | |
| 25 | gpio0 = &pioA; | |
| 26 | gpio1 = &pioB; | |
| 27 | gpio2 = &pioC; | |
| 28 | gpio3 = &pioD; | |
| 29 | gpio4 = &pioE; | |
| 30 | tcb0 = &tcb0; | |
| 05dcd361 | 31 | i2c0 = &i2c0; |
| 099343c6 BS |
32 | ssc0 = &ssc0; |
| 33 | ssc1 = &ssc1; | |
| f3ab0527 | 34 | pwm0 = &pwm0; |
| 4abb3677 | 35 | }; |
| c2375821 | 36 | |
| 4abb3677 | 37 | cpus { |
| e757a6ee LP |
38 | #address-cells = <0>; |
| 39 | #size-cells = <0>; | |
| 40 | ||
| 41 | cpu { | |
| 42 | compatible = "arm,arm926ej-s"; | |
| 43 | device_type = "cpu"; | |
| 4abb3677 JCPV |
44 | }; |
| 45 | }; | |
| 46 | ||
| 47 | memory { | |
| 48 | reg = <0x20000000 0x08000000>; | |
| 49 | }; | |
| 50 | ||
| c2375821 AB |
51 | clocks { |
| 52 | main_xtal: main_xtal { | |
| 53 | compatible = "fixed-clock"; | |
| 54 | #clock-cells = <0>; | |
| 55 | clock-frequency = <0>; | |
| 56 | }; | |
| 57 | ||
| 58 | slow_xtal: slow_xtal { | |
| 59 | compatible = "fixed-clock"; | |
| 60 | #clock-cells = <0>; | |
| 61 | clock-frequency = <0>; | |
| 62 | }; | |
| 63 | }; | |
| 64 | ||
| f04660e4 AB |
65 | sram0: sram@00300000 { |
| 66 | compatible = "mmio-sram"; | |
| 67 | reg = <0x00300000 0x14000>; | |
| 68 | }; | |
| 69 | ||
| 70 | sram1: sram@00500000 { | |
| 71 | compatible = "mmio-sram"; | |
| 940e766a | 72 | reg = <0x00500000 0x4000>; |
| f04660e4 AB |
73 | }; |
| 74 | ||
| 4abb3677 JCPV |
75 | ahb { |
| 76 | compatible = "simple-bus"; | |
| 77 | #address-cells = <1>; | |
| 78 | #size-cells = <1>; | |
| 79 | ranges; | |
| 80 | ||
| 81 | apb { | |
| 82 | compatible = "simple-bus"; | |
| 83 | #address-cells = <1>; | |
| 84 | #size-cells = <1>; | |
| 85 | ranges; | |
| 86 | ||
| 87 | aic: interrupt-controller@fffff000 { | |
| f8a073ee | 88 | #interrupt-cells = <3>; |
| 4abb3677 JCPV |
89 | compatible = "atmel,at91rm9200-aic"; |
| 90 | interrupt-controller; | |
| 91 | reg = <0xfffff000 0x200>; | |
| c6573943 | 92 | atmel,external-irqs = <30 31>; |
| 4abb3677 JCPV |
93 | }; |
| 94 | ||
| 95 | pmc: pmc@fffffc00 { | |
| 620f5033 | 96 | compatible = "atmel,at91rm9200-pmc", "syscon"; |
| 4abb3677 | 97 | reg = <0xfffffc00 0x100>; |
| c2375821 AB |
98 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 99 | interrupt-controller; | |
| 100 | #address-cells = <1>; | |
| 101 | #size-cells = <0>; | |
| 102 | #interrupt-cells = <1>; | |
| 103 | ||
| 104 | main_osc: main_osc { | |
| 105 | compatible = "atmel,at91rm9200-clk-main-osc"; | |
| 106 | #clock-cells = <0>; | |
| 107 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
| 108 | clocks = <&main_xtal>; | |
| 109 | }; | |
| 110 | ||
| 111 | main: mainck { | |
| 112 | compatible = "atmel,at91rm9200-clk-main"; | |
| 113 | #clock-cells = <0>; | |
| 114 | clocks = <&main_osc>; | |
| 115 | }; | |
| 116 | ||
| 117 | plla: pllack { | |
| 118 | compatible = "atmel,at91rm9200-clk-pll"; | |
| 119 | #clock-cells = <0>; | |
| 120 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
| 121 | clocks = <&main>; | |
| 122 | reg = <0>; | |
| 123 | atmel,clk-input-range = <1000000 32000000>; | |
| 124 | #atmel,pll-clk-output-range-cells = <4>; | |
| 125 | atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, | |
| 126 | <190000000 240000000 2 1>; | |
| 127 | }; | |
| 128 | ||
| 129 | pllb: pllbck { | |
| 130 | compatible = "atmel,at91rm9200-clk-pll"; | |
| 131 | #clock-cells = <0>; | |
| 132 | interrupts-extended = <&pmc AT91_PMC_LOCKB>; | |
| 133 | clocks = <&main>; | |
| 134 | reg = <1>; | |
| 106c67af | 135 | atmel,clk-input-range = <1000000 32000000>; |
| c2375821 | 136 | #atmel,pll-clk-output-range-cells = <4>; |
| 106c67af BB |
137 | atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, |
| 138 | <190000000 240000000 2 1>; | |
| c2375821 AB |
139 | }; |
| 140 | ||
| 141 | mck: masterck { | |
| 142 | compatible = "atmel,at91rm9200-clk-master"; | |
| 143 | #clock-cells = <0>; | |
| 144 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
| 145 | clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; | |
| 146 | atmel,clk-output-range = <0 120000000>; | |
| 147 | atmel,clk-divisors = <1 2 4 0>; | |
| 148 | }; | |
| 149 | ||
| 150 | usb: usbck { | |
| 151 | compatible = "atmel,at91rm9200-clk-usb"; | |
| 152 | #clock-cells = <0>; | |
| 153 | atmel,clk-divisors = <1 2 4 0>; | |
| 154 | clocks = <&pllb>; | |
| 155 | }; | |
| 156 | ||
| 157 | prog: progck { | |
| 158 | compatible = "atmel,at91rm9200-clk-programmable"; | |
| 159 | #address-cells = <1>; | |
| 160 | #size-cells = <0>; | |
| 161 | interrupt-parent = <&pmc>; | |
| 162 | clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; | |
| 163 | ||
| 164 | prog0: prog0 { | |
| 165 | #clock-cells = <0>; | |
| 166 | reg = <0>; | |
| 167 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
| 168 | }; | |
| 169 | ||
| 170 | prog1: prog1 { | |
| 171 | #clock-cells = <0>; | |
| 172 | reg = <1>; | |
| 173 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
| 174 | }; | |
| 175 | ||
| 176 | prog2: prog2 { | |
| 177 | #clock-cells = <0>; | |
| 178 | reg = <2>; | |
| 179 | interrupts = <AT91_PMC_PCKRDY(2)>; | |
| 180 | }; | |
| 181 | ||
| 182 | prog3: prog3 { | |
| 183 | #clock-cells = <0>; | |
| 184 | reg = <3>; | |
| 185 | interrupts = <AT91_PMC_PCKRDY(3)>; | |
| 186 | }; | |
| 187 | }; | |
| 188 | ||
| 189 | systemck { | |
| 190 | compatible = "atmel,at91rm9200-clk-system"; | |
| 191 | #address-cells = <1>; | |
| 192 | #size-cells = <0>; | |
| 193 | ||
| 194 | uhpck: uhpck { | |
| 195 | #clock-cells = <0>; | |
| 196 | reg = <6>; | |
| 197 | clocks = <&usb>; | |
| 198 | }; | |
| 199 | ||
| 200 | udpck: udpck { | |
| 201 | #clock-cells = <0>; | |
| 202 | reg = <7>; | |
| 203 | clocks = <&usb>; | |
| 204 | }; | |
| 205 | ||
| 206 | pck0: pck0 { | |
| 207 | #clock-cells = <0>; | |
| 208 | reg = <8>; | |
| 209 | clocks = <&prog0>; | |
| 210 | }; | |
| 211 | ||
| 212 | pck1: pck1 { | |
| 213 | #clock-cells = <0>; | |
| 214 | reg = <9>; | |
| 215 | clocks = <&prog1>; | |
| 216 | }; | |
| 217 | ||
| 218 | pck2: pck2 { | |
| 219 | #clock-cells = <0>; | |
| 220 | reg = <10>; | |
| 221 | clocks = <&prog2>; | |
| 222 | }; | |
| 223 | ||
| 224 | pck3: pck3 { | |
| 225 | #clock-cells = <0>; | |
| 226 | reg = <11>; | |
| 227 | clocks = <&prog3>; | |
| 228 | }; | |
| 229 | }; | |
| 230 | ||
| 231 | periphck { | |
| 232 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
| 233 | #address-cells = <1>; | |
| 234 | #size-cells = <0>; | |
| 235 | clocks = <&mck>; | |
| 236 | ||
| 237 | pioA_clk: pioA_clk { | |
| 238 | #clock-cells = <0>; | |
| 239 | reg = <2>; | |
| 240 | }; | |
| 241 | ||
| 242 | pioB_clk: pioB_clk { | |
| 243 | #clock-cells = <0>; | |
| 244 | reg = <3>; | |
| 245 | }; | |
| 246 | ||
| 247 | pioCDE_clk: pioCDE_clk { | |
| 248 | #clock-cells = <0>; | |
| 249 | reg = <4>; | |
| 250 | }; | |
| 251 | ||
| 252 | usart0_clk: usart0_clk { | |
| 253 | #clock-cells = <0>; | |
| 254 | reg = <7>; | |
| 255 | }; | |
| 256 | ||
| 257 | usart1_clk: usart1_clk { | |
| 258 | #clock-cells = <0>; | |
| 259 | reg = <8>; | |
| 260 | }; | |
| 261 | ||
| 262 | usart2_clk: usart2_clk { | |
| 263 | #clock-cells = <0>; | |
| 264 | reg = <9>; | |
| 265 | }; | |
| 266 | ||
| 267 | mci0_clk: mci0_clk { | |
| 268 | #clock-cells = <0>; | |
| 269 | reg = <10>; | |
| 270 | }; | |
| 271 | ||
| 272 | mci1_clk: mci1_clk { | |
| 273 | #clock-cells = <0>; | |
| 274 | reg = <11>; | |
| 275 | }; | |
| 276 | ||
| 277 | can_clk: can_clk { | |
| 278 | #clock-cells = <0>; | |
| 279 | reg = <12>; | |
| 280 | }; | |
| 281 | ||
| 282 | twi0_clk: twi0_clk { | |
| 283 | #clock-cells = <0>; | |
| 284 | reg = <13>; | |
| 285 | }; | |
| 286 | ||
| 287 | spi0_clk: spi0_clk { | |
| 288 | #clock-cells = <0>; | |
| 289 | reg = <14>; | |
| 290 | }; | |
| 291 | ||
| 292 | spi1_clk: spi1_clk { | |
| 293 | #clock-cells = <0>; | |
| 294 | reg = <15>; | |
| 295 | }; | |
| 296 | ||
| 297 | ssc0_clk: ssc0_clk { | |
| 298 | #clock-cells = <0>; | |
| 299 | reg = <16>; | |
| 300 | }; | |
| 301 | ||
| 302 | ssc1_clk: ssc1_clk { | |
| 303 | #clock-cells = <0>; | |
| 304 | reg = <17>; | |
| 305 | }; | |
| 306 | ||
| 226b7b61 | 307 | ac97_clk: ac97_clk { |
| c2375821 AB |
308 | #clock-cells = <0>; |
| 309 | reg = <18>; | |
| 310 | }; | |
| 311 | ||
| 312 | tcb_clk: tcb_clk { | |
| 313 | #clock-cells = <0>; | |
| 314 | reg = <19>; | |
| 315 | }; | |
| 316 | ||
| 317 | pwm_clk: pwm_clk { | |
| 318 | #clock-cells = <0>; | |
| 319 | reg = <20>; | |
| 320 | }; | |
| 321 | ||
| 322 | macb0_clk: macb0_clk { | |
| 323 | #clock-cells = <0>; | |
| 324 | reg = <21>; | |
| 325 | }; | |
| 326 | ||
| 327 | g2de_clk: g2de_clk { | |
| 328 | #clock-cells = <0>; | |
| 329 | reg = <23>; | |
| 330 | }; | |
| 331 | ||
| 332 | udc_clk: udc_clk { | |
| 333 | #clock-cells = <0>; | |
| 334 | reg = <24>; | |
| 335 | }; | |
| 336 | ||
| 337 | isi_clk: isi_clk { | |
| 338 | #clock-cells = <0>; | |
| 339 | reg = <25>; | |
| 340 | }; | |
| 341 | ||
| 342 | lcd_clk: lcd_clk { | |
| 343 | #clock-cells = <0>; | |
| 344 | reg = <26>; | |
| 345 | }; | |
| 346 | ||
| 347 | dma_clk: dma_clk { | |
| 348 | #clock-cells = <0>; | |
| 349 | reg = <27>; | |
| 350 | }; | |
| 351 | ||
| 352 | ohci_clk: ohci_clk { | |
| 353 | #clock-cells = <0>; | |
| 354 | reg = <29>; | |
| 355 | }; | |
| 356 | }; | |
| 4abb3677 JCPV |
357 | }; |
| 358 | ||
| 1e165a7d | 359 | ramc0: ramc@ffffe200 { |
| 4abb3677 | 360 | compatible = "atmel,at91sam9260-sdramc"; |
| 1e165a7d MR |
361 | reg = <0xffffe200 0x200>; |
| 362 | }; | |
| 363 | ||
| d9c41bf3 BB |
364 | smc0: smc@ffffe400 { |
| 365 | compatible = "atmel,at91sam9260-smc", "syscon"; | |
| 366 | reg = <0xffffe400 0x200>; | |
| 367 | }; | |
| 368 | ||
| 1e165a7d MR |
369 | ramc1: ramc@ffffe800 { |
| 370 | compatible = "atmel,at91sam9260-sdramc"; | |
| 371 | reg = <0xffffe800 0x200>; | |
| 4abb3677 JCPV |
372 | }; |
| 373 | ||
| d9c41bf3 BB |
374 | smc1: smc@ffffea00 { |
| 375 | compatible = "atmel,at91sam9260-smc", "syscon"; | |
| 376 | reg = <0xffffea00 0x200>; | |
| 377 | }; | |
| 378 | ||
| 379 | matrix: matrix@ffffec00 { | |
| 380 | compatible = "atmel,at91sam9263-matrix", "syscon"; | |
| 381 | reg = <0xffffec00 0x200>; | |
| 382 | }; | |
| 383 | ||
| 4abb3677 JCPV |
384 | pit: timer@fffffd30 { |
| 385 | compatible = "atmel,at91sam9260-pit"; | |
| 386 | reg = <0xfffffd30 0xf>; | |
| 5e8b3bc3 | 387 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| c2375821 | 388 | clocks = <&mck>; |
| 4abb3677 JCPV |
389 | }; |
| 390 | ||
| 391 | tcb0: timer@fff7c000 { | |
| 392 | compatible = "atmel,at91rm9200-tcb"; | |
| 393 | reg = <0xfff7c000 0x100>; | |
| 5e8b3bc3 | 394 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; |
| 53b0b378 AB |
395 | clocks = <&tcb_clk>, <&slow_xtal>; |
| 396 | clock-names = "t0_clk", "slow_clk"; | |
| 4abb3677 JCPV |
397 | }; |
| 398 | ||
| 399 | rstc@fffffd00 { | |
| 400 | compatible = "atmel,at91sam9260-rstc"; | |
| 401 | reg = <0xfffffd00 0x10>; | |
| 53b0b378 | 402 | clocks = <&slow_xtal>; |
| 4abb3677 JCPV |
403 | }; |
| 404 | ||
| 405 | shdwc@fffffd10 { | |
| 406 | compatible = "atmel,at91sam9260-shdwc"; | |
| 407 | reg = <0xfffffd10 0x10>; | |
| 53b0b378 | 408 | clocks = <&slow_xtal>; |
| 4abb3677 JCPV |
409 | }; |
| 410 | ||
| e4541ff2 JCPV |
411 | pinctrl@fffff200 { |
| 412 | #address-cells = <1>; | |
| 413 | #size-cells = <1>; | |
| 414 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
| 415 | ranges = <0xfffff200 0xfffff200 0xa00>; | |
| 416 | ||
| 5314ec8e JCPV |
417 | atmel,mux-mask = < |
| 418 | /* A B */ | |
| 419 | 0xfffffffb 0xffffe07f /* pioA */ | |
| 420 | 0x0007ffff 0x39072fff /* pioB */ | |
| 421 | 0xffffffff 0x3ffffff8 /* pioC */ | |
| 422 | 0xfffffbff 0xffffffff /* pioD */ | |
| 423 | 0xffe00fff 0xfbfcff00 /* pioE */ | |
| 424 | >; | |
| 425 | ||
| 426 | /* shared pinctrl settings */ | |
| ec6754a7 JCPV |
427 | dbgu { |
| 428 | pinctrl_dbgu: dbgu-0 { | |
| 429 | atmel,pins = | |
| 138c2b2f SR |
430 | <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP |
| 431 | AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| ec6754a7 JCPV |
432 | }; |
| 433 | }; | |
| 434 | ||
| 9e3129e9 JCPV |
435 | usart0 { |
| 436 | pinctrl_usart0: usart0-0 { | |
| ec6754a7 | 437 | atmel,pins = |
| c9d0f317 JCPV |
438 | <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ |
| 439 | AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ | |
| ec6754a7 JCPV |
440 | }; |
| 441 | ||
| c58c0c5a | 442 | pinctrl_usart0_rts: usart0_rts-0 { |
| ec6754a7 | 443 | atmel,pins = |
| c9d0f317 | 444 | <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ |
| c58c0c5a JCPV |
445 | }; |
| 446 | ||
| 447 | pinctrl_usart0_cts: usart0_cts-0 { | |
| 448 | atmel,pins = | |
| c9d0f317 | 449 | <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ |
| ec6754a7 JCPV |
450 | }; |
| 451 | }; | |
| 452 | ||
| 9e3129e9 JCPV |
453 | usart1 { |
| 454 | pinctrl_usart1: usart1-0 { | |
| ec6754a7 | 455 | atmel,pins = |
| c9d0f317 JCPV |
456 | <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ |
| 457 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ | |
| ec6754a7 JCPV |
458 | }; |
| 459 | ||
| c58c0c5a | 460 | pinctrl_usart1_rts: usart1_rts-0 { |
| ec6754a7 | 461 | atmel,pins = |
| c9d0f317 | 462 | <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ |
| c58c0c5a JCPV |
463 | }; |
| 464 | ||
| 465 | pinctrl_usart1_cts: usart1_cts-0 { | |
| 466 | atmel,pins = | |
| c9d0f317 | 467 | <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ |
| ec6754a7 JCPV |
468 | }; |
| 469 | }; | |
| 470 | ||
| 9e3129e9 JCPV |
471 | usart2 { |
| 472 | pinctrl_usart2: usart2-0 { | |
| ec6754a7 | 473 | atmel,pins = |
| c9d0f317 JCPV |
474 | <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ |
| 475 | AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ | |
| ec6754a7 JCPV |
476 | }; |
| 477 | ||
| c58c0c5a JCPV |
478 | pinctrl_usart2_rts: usart2_rts-0 { |
| 479 | atmel,pins = | |
| c9d0f317 | 480 | <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ |
| c58c0c5a JCPV |
481 | }; |
| 482 | ||
| 483 | pinctrl_usart2_cts: usart2_cts-0 { | |
| ec6754a7 | 484 | atmel,pins = |
| c9d0f317 | 485 | <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ |
| ec6754a7 JCPV |
486 | }; |
| 487 | }; | |
| 5314ec8e | 488 | |
| 7a38d450 | 489 | nand { |
| 1004a297 | 490 | pinctrl_nand_rb: nand-rb-0 { |
| 7a38d450 | 491 | atmel,pins = |
| 1004a297 BB |
492 | <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; |
| 493 | }; | |
| 494 | ||
| 495 | pinctrl_nand_cs: nand-cs-0 { | |
| 496 | atmel,pins = | |
| 497 | <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; | |
| 7a38d450 JCPV |
498 | }; |
| 499 | }; | |
| 500 | ||
| d9b4fe83 JCPV |
501 | macb { |
| 502 | pinctrl_macb_rmii: macb_rmii-0 { | |
| 503 | atmel,pins = | |
| c9d0f317 JCPV |
504 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ |
| 505 | AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ | |
| 506 | AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ | |
| 507 | AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ | |
| 508 | AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ | |
| 509 | AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ | |
| 510 | AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ | |
| 511 | AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ | |
| 512 | AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ | |
| 513 | AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ | |
| d9b4fe83 JCPV |
514 | }; |
| 515 | ||
| 516 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | |
| 517 | atmel,pins = | |
| c9d0f317 JCPV |
518 | <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ |
| 519 | AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ | |
| 520 | AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ | |
| 521 | AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ | |
| 522 | AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ | |
| 523 | AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ | |
| 524 | AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ | |
| 525 | AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ | |
| d9b4fe83 JCPV |
526 | }; |
| 527 | }; | |
| 528 | ||
| d4fe9ac7 JCPV |
529 | mmc0 { |
| 530 | pinctrl_mmc0_clk: mmc0_clk-0 { | |
| 531 | atmel,pins = | |
| c9d0f317 | 532 | <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ |
| d4fe9ac7 JCPV |
533 | }; |
| 534 | ||
| 535 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | |
| 536 | atmel,pins = | |
| c9d0f317 JCPV |
537 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ |
| 538 | AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ | |
| d4fe9ac7 JCPV |
539 | }; |
| 540 | ||
| 541 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
| 542 | atmel,pins = | |
| c9d0f317 JCPV |
543 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ |
| 544 | AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ | |
| 545 | AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ | |
| d4fe9ac7 JCPV |
546 | }; |
| 547 | ||
| 548 | pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { | |
| 549 | atmel,pins = | |
| c9d0f317 JCPV |
550 | <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ |
| 551 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ | |
| d4fe9ac7 JCPV |
552 | }; |
| 553 | ||
| 554 | pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { | |
| 555 | atmel,pins = | |
| c9d0f317 JCPV |
556 | <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ |
| 557 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ | |
| 558 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ | |
| d4fe9ac7 JCPV |
559 | }; |
| 560 | }; | |
| 561 | ||
| 562 | mmc1 { | |
| 563 | pinctrl_mmc1_clk: mmc1_clk-0 { | |
| 564 | atmel,pins = | |
| c9d0f317 | 565 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ |
| d4fe9ac7 JCPV |
566 | }; |
| 567 | ||
| 568 | pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { | |
| 569 | atmel,pins = | |
| c9d0f317 JCPV |
570 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ |
| 571 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ | |
| d4fe9ac7 JCPV |
572 | }; |
| 573 | ||
| 574 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { | |
| 575 | atmel,pins = | |
| c9d0f317 JCPV |
576 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ |
| 577 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ | |
| 578 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ | |
| d4fe9ac7 JCPV |
579 | }; |
| 580 | ||
| 581 | pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { | |
| 582 | atmel,pins = | |
| c9d0f317 JCPV |
583 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ |
| 584 | AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ | |
| d4fe9ac7 JCPV |
585 | }; |
| 586 | ||
| 587 | pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { | |
| 588 | atmel,pins = | |
| c9d0f317 JCPV |
589 | <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ |
| 590 | AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ | |
| 591 | AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ | |
| d4fe9ac7 JCPV |
592 | }; |
| 593 | }; | |
| 594 | ||
| 544ae6b2 BS |
595 | ssc0 { |
| 596 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
| 597 | atmel,pins = | |
| c9d0f317 JCPV |
598 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ |
| 599 | AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ | |
| 600 | AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ | |
| 544ae6b2 BS |
601 | }; |
| 602 | ||
| 603 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
| 604 | atmel,pins = | |
| c9d0f317 JCPV |
605 | <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ |
| 606 | AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ | |
| 607 | AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ | |
| 544ae6b2 BS |
608 | }; |
| 609 | }; | |
| 610 | ||
| 611 | ssc1 { | |
| 612 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
| 613 | atmel,pins = | |
| c9d0f317 JCPV |
614 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ |
| 615 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ | |
| 616 | AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ | |
| 544ae6b2 BS |
617 | }; |
| 618 | ||
| 619 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
| 620 | atmel,pins = | |
| c9d0f317 JCPV |
621 | <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ |
| 622 | AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ | |
| 623 | AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ | |
| 544ae6b2 BS |
624 | }; |
| 625 | }; | |
| 626 | ||
| a68b728f WY |
627 | spi0 { |
| 628 | pinctrl_spi0: spi0-0 { | |
| 629 | atmel,pins = | |
| c9d0f317 JCPV |
630 | <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ |
| 631 | AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ | |
| 632 | AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ | |
| a68b728f WY |
633 | }; |
| 634 | }; | |
| 635 | ||
| 636 | spi1 { | |
| 637 | pinctrl_spi1: spi1-0 { | |
| 638 | atmel,pins = | |
| c9d0f317 JCPV |
639 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ |
| 640 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ | |
| 641 | AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ | |
| a68b728f WY |
642 | }; |
| 643 | }; | |
| 644 | ||
| 028633c2 BB |
645 | tcb0 { |
| 646 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
| 647 | atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 648 | }; | |
| 649 | ||
| 650 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
| 651 | atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 652 | }; | |
| 653 | ||
| 654 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
| 655 | atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 656 | }; | |
| 657 | ||
| 658 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
| 659 | atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 660 | }; | |
| 661 | ||
| 662 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
| 663 | atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 664 | }; | |
| 665 | ||
| 666 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
| 667 | atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 668 | }; | |
| 669 | ||
| 670 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
| 671 | atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 672 | }; | |
| 673 | ||
| 674 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
| 675 | atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 676 | }; | |
| 677 | ||
| 678 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
| 679 | atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 680 | }; | |
| 681 | }; | |
| 682 | ||
| f8a0d793 JCPV |
683 | fb { |
| 684 | pinctrl_fb: fb-0 { | |
| 685 | atmel,pins = | |
| 686 | <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ | |
| 687 | AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ | |
| 688 | AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ | |
| 689 | AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ | |
| 690 | AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ | |
| 691 | AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ | |
| 692 | AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ | |
| 693 | AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ | |
| 694 | AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ | |
| 695 | AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ | |
| 696 | AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ | |
| 697 | AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ | |
| 698 | AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ | |
| 699 | AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ | |
| 700 | AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ | |
| 701 | AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ | |
| 702 | AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ | |
| 703 | AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ | |
| 704 | AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ | |
| 705 | AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ | |
| 706 | AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ | |
| 707 | AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ | |
| 708 | }; | |
| 709 | }; | |
| 710 | ||
| 2667c6ad AS |
711 | can { |
| 712 | pinctrl_can_rx_tx: can_rx_tx { | |
| 713 | atmel,pins = | |
| 714 | <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ | |
| 715 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ | |
| 716 | }; | |
| 717 | }; | |
| 718 | ||
| c7f85be1 AS |
719 | ac97 { |
| 720 | pinctrl_ac97: ac97-0 { | |
| 721 | atmel,pins = | |
| 722 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */ | |
| 723 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */ | |
| 724 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */ | |
| 725 | AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */ | |
| 726 | }; | |
| 727 | }; | |
| 728 | ||
| e4541ff2 JCPV |
729 | pioA: gpio@fffff200 { |
| 730 | compatible = "atmel,at91rm9200-gpio"; | |
| 731 | reg = <0xfffff200 0x200>; | |
| 5e8b3bc3 | 732 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
733 | #gpio-cells = <2>; |
| 734 | gpio-controller; | |
| 735 | interrupt-controller; | |
| 736 | #interrupt-cells = <2>; | |
| c2375821 | 737 | clocks = <&pioA_clk>; |
| e4541ff2 JCPV |
738 | }; |
| 739 | ||
| 740 | pioB: gpio@fffff400 { | |
| 741 | compatible = "atmel,at91rm9200-gpio"; | |
| 742 | reg = <0xfffff400 0x200>; | |
| 5e8b3bc3 | 743 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
744 | #gpio-cells = <2>; |
| 745 | gpio-controller; | |
| 746 | interrupt-controller; | |
| 747 | #interrupt-cells = <2>; | |
| c2375821 | 748 | clocks = <&pioB_clk>; |
| e4541ff2 JCPV |
749 | }; |
| 750 | ||
| 751 | pioC: gpio@fffff600 { | |
| 752 | compatible = "atmel,at91rm9200-gpio"; | |
| 753 | reg = <0xfffff600 0x200>; | |
| 5e8b3bc3 | 754 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
755 | #gpio-cells = <2>; |
| 756 | gpio-controller; | |
| 757 | interrupt-controller; | |
| 758 | #interrupt-cells = <2>; | |
| c2375821 | 759 | clocks = <&pioCDE_clk>; |
| e4541ff2 JCPV |
760 | }; |
| 761 | ||
| 762 | pioD: gpio@fffff800 { | |
| 763 | compatible = "atmel,at91rm9200-gpio"; | |
| 764 | reg = <0xfffff800 0x200>; | |
| 5e8b3bc3 | 765 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
766 | #gpio-cells = <2>; |
| 767 | gpio-controller; | |
| 768 | interrupt-controller; | |
| 769 | #interrupt-cells = <2>; | |
| c2375821 | 770 | clocks = <&pioCDE_clk>; |
| e4541ff2 JCPV |
771 | }; |
| 772 | ||
| 773 | pioE: gpio@fffffa00 { | |
| 774 | compatible = "atmel,at91rm9200-gpio"; | |
| 775 | reg = <0xfffffa00 0x200>; | |
| 5e8b3bc3 | 776 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
777 | #gpio-cells = <2>; |
| 778 | gpio-controller; | |
| 779 | interrupt-controller; | |
| 780 | #interrupt-cells = <2>; | |
| c2375821 | 781 | clocks = <&pioCDE_clk>; |
| 5314ec8e | 782 | }; |
| 4abb3677 JCPV |
783 | }; |
| 784 | ||
| 785 | dbgu: serial@ffffee00 { | |
| 8c07f664 | 786 | compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; |
| 4abb3677 | 787 | reg = <0xffffee00 0x200>; |
| 5e8b3bc3 | 788 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| ec6754a7 JCPV |
789 | pinctrl-names = "default"; |
| 790 | pinctrl-0 = <&pinctrl_dbgu>; | |
| c2375821 AB |
791 | clocks = <&mck>; |
| 792 | clock-names = "usart"; | |
| 4abb3677 JCPV |
793 | status = "disabled"; |
| 794 | }; | |
| 795 | ||
| 796 | usart0: serial@fff8c000 { | |
| 797 | compatible = "atmel,at91sam9260-usart"; | |
| 798 | reg = <0xfff8c000 0x200>; | |
| 5e8b3bc3 | 799 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
| 4abb3677 JCPV |
800 | atmel,use-dma-rx; |
| 801 | atmel,use-dma-tx; | |
| ec6754a7 | 802 | pinctrl-names = "default"; |
| 9e3129e9 | 803 | pinctrl-0 = <&pinctrl_usart0>; |
| c2375821 AB |
804 | clocks = <&usart0_clk>; |
| 805 | clock-names = "usart"; | |
| 4abb3677 JCPV |
806 | status = "disabled"; |
| 807 | }; | |
| 808 | ||
| 809 | usart1: serial@fff90000 { | |
| 810 | compatible = "atmel,at91sam9260-usart"; | |
| 811 | reg = <0xfff90000 0x200>; | |
| 5e8b3bc3 | 812 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
| 4abb3677 JCPV |
813 | atmel,use-dma-rx; |
| 814 | atmel,use-dma-tx; | |
| ec6754a7 | 815 | pinctrl-names = "default"; |
| 9e3129e9 | 816 | pinctrl-0 = <&pinctrl_usart1>; |
| c2375821 AB |
817 | clocks = <&usart1_clk>; |
| 818 | clock-names = "usart"; | |
| 4abb3677 JCPV |
819 | status = "disabled"; |
| 820 | }; | |
| 821 | ||
| 822 | usart2: serial@fff94000 { | |
| 823 | compatible = "atmel,at91sam9260-usart"; | |
| 824 | reg = <0xfff94000 0x200>; | |
| 5e8b3bc3 | 825 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; |
| 4abb3677 JCPV |
826 | atmel,use-dma-rx; |
| 827 | atmel,use-dma-tx; | |
| ec6754a7 | 828 | pinctrl-names = "default"; |
| 9e3129e9 | 829 | pinctrl-0 = <&pinctrl_usart2>; |
| c2375821 AB |
830 | clocks = <&usart2_clk>; |
| 831 | clock-names = "usart"; | |
| 4abb3677 JCPV |
832 | status = "disabled"; |
| 833 | }; | |
| 834 | ||
| 099343c6 BS |
835 | ssc0: ssc@fff98000 { |
| 836 | compatible = "atmel,at91rm9200-ssc"; | |
| 837 | reg = <0xfff98000 0x4000>; | |
| 5e8b3bc3 | 838 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; |
| 544ae6b2 BS |
839 | pinctrl-names = "default"; |
| 840 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
| c2375821 AB |
841 | clocks = <&ssc0_clk>; |
| 842 | clock-names = "pclk"; | |
| 315656bc | 843 | status = "disabled"; |
| 099343c6 BS |
844 | }; |
| 845 | ||
| 846 | ssc1: ssc@fff9c000 { | |
| 847 | compatible = "atmel,at91rm9200-ssc"; | |
| 848 | reg = <0xfff9c000 0x4000>; | |
| 5e8b3bc3 | 849 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; |
| 544ae6b2 BS |
850 | pinctrl-names = "default"; |
| 851 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
| c2375821 AB |
852 | clocks = <&ssc1_clk>; |
| 853 | clock-names = "pclk"; | |
| 315656bc | 854 | status = "disabled"; |
| 099343c6 BS |
855 | }; |
| 856 | ||
| c7f85be1 AS |
857 | ac97: sound@fffa0000 { |
| 858 | compatible = "atmel,at91sam9263-ac97c"; | |
| 859 | reg = <0xfffa0000 0x4000>; | |
| 860 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; | |
| 861 | pinctrl-names = "default"; | |
| 862 | pinctrl-0 = <&pinctrl_ac97>; | |
| 863 | clocks = <&ac97_clk>; | |
| 864 | clock-names = "ac97_clk"; | |
| 865 | status = "disabled"; | |
| 866 | }; | |
| 867 | ||
| 4abb3677 | 868 | macb0: ethernet@fffbc000 { |
| 9c348d45 | 869 | compatible = "cdns,at91sam9260-macb", "cdns,macb"; |
| 4abb3677 | 870 | reg = <0xfffbc000 0x100>; |
| 5e8b3bc3 | 871 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; |
| d9b4fe83 JCPV |
872 | pinctrl-names = "default"; |
| 873 | pinctrl-0 = <&pinctrl_macb_rmii>; | |
| c2375821 AB |
874 | clocks = <&macb0_clk>, <&macb0_clk>; |
| 875 | clock-names = "hclk", "pclk"; | |
| 4abb3677 JCPV |
876 | status = "disabled"; |
| 877 | }; | |
| 878 | ||
| 879 | usb1: gadget@fff78000 { | |
| 70a9beaa | 880 | compatible = "atmel,at91sam9263-udc"; |
| 4abb3677 | 881 | reg = <0xfff78000 0x4000>; |
| 5e8b3bc3 | 882 | interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; |
| c2375821 AB |
883 | clocks = <&udc_clk>, <&udpck>; |
| 884 | clock-names = "pclk", "hclk"; | |
| 4abb3677 JCPV |
885 | status = "disabled"; |
| 886 | }; | |
| 05dcd361 LD |
887 | |
| 888 | i2c0: i2c@fff88000 { | |
| 821003ba | 889 | compatible = "atmel,at91sam9260-i2c"; |
| 05dcd361 | 890 | reg = <0xfff88000 0x100>; |
| 5e8b3bc3 | 891 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; |
| 05dcd361 LD |
892 | #address-cells = <1>; |
| 893 | #size-cells = <0>; | |
| c2375821 | 894 | clocks = <&twi0_clk>; |
| 05dcd361 LD |
895 | status = "disabled"; |
| 896 | }; | |
| 9873137a LD |
897 | |
| 898 | mmc0: mmc@fff80000 { | |
| 899 | compatible = "atmel,hsmci"; | |
| 900 | reg = <0xfff80000 0x600>; | |
| 5e8b3bc3 | 901 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; |
| b65e0fb3 | 902 | pinctrl-names = "default"; |
| 9873137a LD |
903 | #address-cells = <1>; |
| 904 | #size-cells = <0>; | |
| c2375821 AB |
905 | clocks = <&mci0_clk>; |
| 906 | clock-names = "mci_clk"; | |
| 9873137a LD |
907 | status = "disabled"; |
| 908 | }; | |
| 909 | ||
| 910 | mmc1: mmc@fff84000 { | |
| 911 | compatible = "atmel,hsmci"; | |
| 912 | reg = <0xfff84000 0x600>; | |
| 5e8b3bc3 | 913 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; |
| b65e0fb3 | 914 | pinctrl-names = "default"; |
| 9873137a LD |
915 | #address-cells = <1>; |
| 916 | #size-cells = <0>; | |
| c2375821 AB |
917 | clocks = <&mci1_clk>; |
| 918 | clock-names = "mci_clk"; | |
| 9873137a LD |
919 | status = "disabled"; |
| 920 | }; | |
| db5b0ae0 | 921 | |
| 7492e7ca FP |
922 | watchdog@fffffd40 { |
| 923 | compatible = "atmel,at91sam9260-wdt"; | |
| 924 | reg = <0xfffffd40 0x10>; | |
| fe46aa67 | 925 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 53b0b378 | 926 | clocks = <&slow_xtal>; |
| fe46aa67 BB |
927 | atmel,watchdog-type = "hardware"; |
| 928 | atmel,reset-type = "all"; | |
| 929 | atmel,dbg-halt; | |
| 7492e7ca FP |
930 | status = "disabled"; |
| 931 | }; | |
| d50f88a0 RG |
932 | |
| 933 | spi0: spi@fffa4000 { | |
| 934 | #address-cells = <1>; | |
| 935 | #size-cells = <0>; | |
| 936 | compatible = "atmel,at91rm9200-spi"; | |
| 937 | reg = <0xfffa4000 0x200>; | |
| 5e8b3bc3 | 938 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; |
| a68b728f WY |
939 | pinctrl-names = "default"; |
| 940 | pinctrl-0 = <&pinctrl_spi0>; | |
| c2375821 AB |
941 | clocks = <&spi0_clk>; |
| 942 | clock-names = "spi_clk"; | |
| d50f88a0 RG |
943 | status = "disabled"; |
| 944 | }; | |
| 945 | ||
| 946 | spi1: spi@fffa8000 { | |
| 947 | #address-cells = <1>; | |
| 948 | #size-cells = <0>; | |
| 949 | compatible = "atmel,at91rm9200-spi"; | |
| 950 | reg = <0xfffa8000 0x200>; | |
| 5e8b3bc3 | 951 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; |
| a68b728f WY |
952 | pinctrl-names = "default"; |
| 953 | pinctrl-0 = <&pinctrl_spi1>; | |
| c2375821 AB |
954 | clocks = <&spi1_clk>; |
| 955 | clock-names = "spi_clk"; | |
| d50f88a0 RG |
956 | status = "disabled"; |
| 957 | }; | |
| f3ab0527 BS |
958 | |
| 959 | pwm0: pwm@fffb8000 { | |
| 960 | compatible = "atmel,at91sam9rl-pwm"; | |
| 961 | reg = <0xfffb8000 0x300>; | |
| 962 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; | |
| 963 | #pwm-cells = <3>; | |
| c2375821 AB |
964 | clocks = <&pwm_clk>; |
| 965 | clock-names = "pwm_clk"; | |
| f3ab0527 BS |
966 | status = "disabled"; |
| 967 | }; | |
| 2667c6ad AS |
968 | |
| 969 | can: can@fffac000 { | |
| 970 | compatible = "atmel,at91sam9263-can"; | |
| 971 | reg = <0xfffac000 0x300>; | |
| 972 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; | |
| 973 | pinctrl-names = "default"; | |
| 974 | pinctrl-0 = <&pinctrl_can_rx_tx>; | |
| 975 | clocks = <&can_clk>; | |
| 976 | clock-names = "can_clk"; | |
| 9b5a0675 BB |
977 | }; |
| 978 | ||
| 979 | rtc@fffffd20 { | |
| 980 | compatible = "atmel,at91sam9260-rtt"; | |
| 981 | reg = <0xfffffd20 0x10>; | |
| 982 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
| 983 | clocks = <&slow_xtal>; | |
| 984 | status = "disabled"; | |
| 985 | }; | |
| 986 | ||
| 987 | rtc@fffffd50 { | |
| 988 | compatible = "atmel,at91sam9260-rtt"; | |
| 989 | reg = <0xfffffd50 0x10>; | |
| 990 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
| 991 | clocks = <&slow_xtal>; | |
| 2667c6ad AS |
992 | status = "disabled"; |
| 993 | }; | |
| 1ff3beca BB |
994 | |
| 995 | gpbr: syscon@fffffd60 { | |
| 996 | compatible = "atmel,at91sam9260-gpbr", "syscon"; | |
| 997 | reg = <0xfffffd60 0x50>; | |
| 998 | status = "disabled"; | |
| 999 | }; | |
| 4abb3677 JCPV |
1000 | }; |
| 1001 | ||
| f8a0d793 JCPV |
1002 | fb0: fb@0x00700000 { |
| 1003 | compatible = "atmel,at91sam9263-lcdc"; | |
| 1004 | reg = <0x00700000 0x1000>; | |
| 1005 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; | |
| 1006 | pinctrl-names = "default"; | |
| 1007 | pinctrl-0 = <&pinctrl_fb>; | |
| 55eb9c34 AS |
1008 | clocks = <&lcd_clk>, <&lcd_clk>; |
| 1009 | clock-names = "lcdc_clk", "hclk"; | |
| f8a0d793 JCPV |
1010 | status = "disabled"; |
| 1011 | }; | |
| 1012 | ||
| 4abb3677 JCPV |
1013 | usb0: ohci@00a00000 { |
| 1014 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
| 1015 | reg = <0x00a00000 0x100000>; | |
| 5e8b3bc3 | 1016 | interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; |
| f8073708 BB |
1017 | clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; |
| 1018 | clock-names = "ohci_clk", "hclk", "uhpck"; | |
| 4abb3677 JCPV |
1019 | status = "disabled"; |
| 1020 | }; | |
| d9c41bf3 BB |
1021 | |
| 1022 | ebi0: ebi@10000000 { | |
| 1023 | compatible = "atmel,at91sam9263-ebi0"; | |
| 1024 | #address-cells = <2>; | |
| 1025 | #size-cells = <1>; | |
| 1026 | atmel,smc = <&smc0>; | |
| 1027 | atmel,matrix = <&matrix>; | |
| 1028 | reg = <0x10000000 0x80000000>; | |
| 1029 | ranges = <0x0 0x0 0x10000000 0x10000000 | |
| 1030 | 0x1 0x0 0x20000000 0x10000000 | |
| 1031 | 0x2 0x0 0x30000000 0x10000000 | |
| 1032 | 0x3 0x0 0x40000000 0x10000000 | |
| 1033 | 0x4 0x0 0x50000000 0x10000000 | |
| 1034 | 0x5 0x0 0x60000000 0x10000000>; | |
| 1035 | clocks = <&mck>; | |
| 1036 | status = "disabled"; | |
| 1037 | ||
| 1038 | nand_controller0: nand-controller { | |
| 1039 | compatible = "atmel,at91sam9260-nand-controller"; | |
| 1040 | #address-cells = <2>; | |
| 1041 | #size-cells = <1>; | |
| 1042 | ranges; | |
| 1043 | status = "disabled"; | |
| 1044 | }; | |
| 1045 | }; | |
| 1046 | ||
| 1047 | ebi1: ebi@70000000 { | |
| 1048 | compatible = "atmel,at91sam9263-ebi1"; | |
| 1049 | #address-cells = <2>; | |
| 1050 | #size-cells = <1>; | |
| 1051 | atmel,smc = <&smc1>; | |
| 1052 | atmel,matrix = <&matrix>; | |
| 1053 | reg = <0x80000000 0x20000000>; | |
| 1054 | ranges = <0x0 0x0 0x80000000 0x10000000 | |
| 1055 | 0x1 0x0 0x90000000 0x10000000>; | |
| 1056 | clocks = <&mck>; | |
| 1057 | status = "disabled"; | |
| 1058 | ||
| 1059 | nand_controller1: nand-controller { | |
| 1060 | compatible = "atmel,at91sam9260-nand-controller"; | |
| 1061 | #address-cells = <2>; | |
| 1062 | #size-cells = <1>; | |
| 1063 | ranges; | |
| 1064 | status = "disabled"; | |
| 1065 | }; | |
| 1066 | }; | |
| 4abb3677 JCPV |
1067 | }; |
| 1068 | ||
| e152e3f7 | 1069 | i2c-gpio-0 { |
| 4abb3677 | 1070 | compatible = "i2c-gpio"; |
| 92f8629b JCPV |
1071 | gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ |
| 1072 | &pioB 5 GPIO_ACTIVE_HIGH /* scl */ | |
| 4abb3677 JCPV |
1073 | >; |
| 1074 | i2c-gpio,sda-open-drain; | |
| 1075 | i2c-gpio,scl-open-drain; | |
| 1076 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
| 1077 | #address-cells = <1>; | |
| 1078 | #size-cells = <0>; | |
| 1079 | status = "disabled"; | |
| 1080 | }; | |
| 1081 | }; |