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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4
[linux-2.6-block.git] / arch / arm / boot / dts / at91sam9260.dtsi
CommitLineData
a636cd6c 1// SPDX-License-Identifier: GPL-2.0-or-later
5b6089cb
JCPV		 2/*
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 *
5 * Copyright (C) 2011 Atmel,
6 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5b6089cb
JCPV		 8 */
9
c9d0f317 10#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 11#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 12#include <dt-bindings/gpio/gpio.h>
684b8fb5 13#include <dt-bindings/clock/at91.h>
5b6089cb
JCPV		 14
15/ {
abe60a3a
RH		 16 #address-cells = <1>;
17 #size-cells = <1>;
5b6089cb
JCPV		 18 model = "Atmel AT91SAM9260 family SoC";
19 compatible = "atmel,at91sam9260";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
9e3129e9
JCPV		 28 serial5 = &uart0;
29 serial6 = &uart1;
5b6089cb
JCPV		 30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
05dcd361 35 i2c0 = &i2c0;
099343c6 36 ssc0 = &ssc0;
5b6089cb
JCPV		 37 };
38 cpus {
e757a6ee
LP		 39 #address-cells = <0>;
40 #size-cells = <0>;
41
42 cpu {
43 compatible = "arm,arm926ej-s";
44 device_type = "cpu";
5b6089cb
JCPV		 45 };
46 };
47
48 memory {
abe60a3a 49 device_type = "memory";
5b6089cb
JCPV		 50 reg = <0x20000000 0x04000000>;
51 };
52
684b8fb5
AB		 53 clocks {
54 slow_xtal: slow_xtal {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
59
60 main_xtal: main_xtal {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <0>;
64 };
65
66 adc_op_clk: adc_op_clk{
67 compatible = "fixed-clock";
68 #clock-cells = <0>;
69 clock-frequency = <5000000>;
70 };
71 };
72
8dccafaa 73 sram0: sram@2ff000 {
f04660e4
AB		 74 compatible = "mmio-sram";
75 reg = <0x002ff000 0x2000>;
76 };
77
5b6089cb
JCPV		 78 ahb {
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 ranges;
83
84 apb {
85 compatible = "simple-bus";
86 #address-cells = <1>;
87 #size-cells = <1>;
88 ranges;
89
90 aic: interrupt-controller@fffff000 {
f8a073ee 91 #interrupt-cells = <3>;
5b6089cb
JCPV		 92 compatible = "atmel,at91rm9200-aic";
93 interrupt-controller;
94 reg = <0xfffff000 0x200>;
c6573943 95 atmel,external-irqs = <29 30 31>;
5b6089cb
JCPV		 96 };
97
98 ramc0: ramc@ffffea00 {
99 compatible = "atmel,at91sam9260-sdramc";
100 reg = <0xffffea00 0x200>;
101 };
102
d9c41bf3
BB		 103 smc: smc@ffffec00 {
104 compatible = "atmel,at91sam9260-smc", "syscon";
105 reg = <0xffffec00 0x200>;
106 };
107
108 matrix: matrix@ffffee00 {
109 compatible = "atmel,at91sam9260-matrix", "syscon";
110 reg = <0xffffee00 0x200>;
111 };
112
5b6089cb 113 pmc: pmc@fffffc00 {
620f5033 114 compatible = "atmel,at91sam9260-pmc", "syscon";
5b6089cb 115 reg = <0xfffffc00 0x100>;
684b8fb5 116 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
e239e060
AB		 117 #clock-cells = <2>;
118 clocks = <&slow_xtal>, <&main_xtal>;
119 clock-names = "slow_xtal", "main_xtal";
5b6089cb
JCPV		 120 };
121
122 rstc@fffffd00 {
123 compatible = "atmel,at91sam9260-rstc";
124 reg = <0xfffffd00 0x10>;
e239e060 125 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
5b6089cb
JCPV		 126 };
127
128 shdwc@fffffd10 {
129 compatible = "atmel,at91sam9260-shdwc";
130 reg = <0xfffffd10 0x10>;
e239e060 131 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
5b6089cb
JCPV		 132 };
133
134 pit: timer@fffffd30 {
135 compatible = "atmel,at91sam9260-pit";
136 reg = <0xfffffd30 0xf>;
5e8b3bc3 137 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
e239e060 138 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
5b6089cb
JCPV		 139 };
140
141 tcb0: timer@fffa0000 {
0178890e
AB		 142 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
143 #address-cells = <1>;
144 #size-cells = <0>;
5b6089cb 145 reg = <0xfffa0000 0x100>;
5e8b3bc3
JCPV		 146 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
147 18 IRQ_TYPE_LEVEL_HIGH 0
148 19 IRQ_TYPE_LEVEL_HIGH 0>;
e239e060 149 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
d0c7faba 150 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
5b6089cb
JCPV		 151 };
152
153 tcb1: timer@fffdc000 {
0178890e
AB		 154 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
155 #address-cells = <1>;
156 #size-cells = <0>;
5b6089cb 157 reg = <0xfffdc000 0x100>;
5e8b3bc3
JCPV		 158 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
159 27 IRQ_TYPE_LEVEL_HIGH 0
160 28 IRQ_TYPE_LEVEL_HIGH 0>;
e239e060 161 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
d0c7faba 162 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
5b6089cb
JCPV		 163 };
164
e4541ff2
JCPV		 165 pinctrl@fffff400 {
166 #address-cells = <1>;
167 #size-cells = <1>;
168 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
169 ranges = <0xfffff400 0xfffff400 0x600>;
170
5314ec8e
JCPV		 171 atmel,mux-mask = <
172 /* A B */
173 0xffffffff 0xffc00c3b /* pioA */
174 0xffffffff 0x7fff3ccf /* pioB */
175 0xffffffff 0x007fffff /* pioC */
176 >;
177
178 /* shared pinctrl settings */
ec6754a7
JCPV		 179 dbgu {
180 pinctrl_dbgu: dbgu-0 {
181 atmel,pins =
138c2b2f
SR		 182 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
183 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
ec6754a7
JCPV		 184 };
185 };
186
9e3129e9
JCPV		 187 usart0 {
188 pinctrl_usart0: usart0-0 {
ec6754a7 189 atmel,pins =
26f2cacd
PR		 190 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
191 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 192 };
193
c58c0c5a 194 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 195 atmel,pins =
c9d0f317 196 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
c58c0c5a
JCPV		 197 };
198
199 pinctrl_usart0_cts: usart0_cts-0 {
200 atmel,pins =
c9d0f317 201 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
ec6754a7
JCPV		 202 };
203
9e3129e9 204 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
ec6754a7 205 atmel,pins =
c9d0f317
JCPV		 206 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
207 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
ec6754a7
JCPV		 208 };
209
9e3129e9 210 pinctrl_usart0_dcd: usart0_dcd-0 {
ec6754a7 211 atmel,pins =
c9d0f317 212 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
ec6754a7
JCPV		 213 };
214
9e3129e9 215 pinctrl_usart0_ri: usart0_ri-0 {
ec6754a7 216 atmel,pins =
c9d0f317 217 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
ec6754a7
JCPV		 218 };
219 };
220
9e3129e9
JCPV		 221 usart1 {
222 pinctrl_usart1: usart1-0 {
ec6754a7 223 atmel,pins =
5e04822f
PR		 224 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
225 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 226 };
227
c58c0c5a
JCPV		 228 pinctrl_usart1_rts: usart1_rts-0 {
229 atmel,pins =
c9d0f317 230 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
c58c0c5a
JCPV		 231 };
232
233 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 234 atmel,pins =
c9d0f317 235 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
ec6754a7
JCPV		 236 };
237 };
238
9e3129e9
JCPV		 239 usart2 {
240 pinctrl_usart2: usart2-0 {
ec6754a7 241 atmel,pins =
5e04822f
PR		 242 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
243 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 244 };
245
c58c0c5a 246 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 247 atmel,pins =
c9d0f317 248 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
c58c0c5a
JCPV		 249 };
250
251 pinctrl_usart2_cts: usart2_cts-0 {
252 atmel,pins =
c9d0f317 253 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
ec6754a7
JCPV		 254 };
255 };
256
9e3129e9
JCPV		 257 usart3 {
258 pinctrl_usart3: usart3-0 {
ec6754a7 259 atmel,pins =
5e04822f
PR		 260 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
261 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 262 };
263
c58c0c5a
JCPV		 264 pinctrl_usart3_rts: usart3_rts-0 {
265 atmel,pins =
a009d692 266 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
c58c0c5a
JCPV		 267 };
268
269 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 270 atmel,pins =
a009d692 271 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
ec6754a7
JCPV		 272 };
273 };
274
9e3129e9
JCPV		 275 uart0 {
276 pinctrl_uart0: uart0-0 {
ec6754a7 277 atmel,pins =
5e04822f
PR		 278 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE
279 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 280 };
281 };
282
9e3129e9
JCPV		 283 uart1 {
284 pinctrl_uart1: uart1-0 {
ec6754a7 285 atmel,pins =
5e04822f
PR		 286 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
287 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
ec6754a7
JCPV		 288 };
289 };
5314ec8e 290
7a38d450 291 nand {
1004a297 292 pinctrl_nand_rb: nand-rb-0 {
7a38d450 293 atmel,pins =
1004a297
BB		 294 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
295 };
296
297 pinctrl_nand_cs: nand-cs-0 {
298 atmel,pins =
299 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
7a38d450
JCPV		 300 };
301 };
302
d9b4fe83
JCPV		 303 macb {
304 pinctrl_macb_rmii: macb_rmii-0 {
305 atmel,pins =
c9d0f317
JCPV		 306 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
307 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
308 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
309 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
310 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
311 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
312 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
313 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
314 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
315 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
d9b4fe83
JCPV		 316 };
317
318 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
319 atmel,pins =
c9d0f317
JCPV		 320 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
321 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
322 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
323 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
324 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
325 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
326 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
327 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
d9b4fe83
JCPV		 328 };
329
330 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
331 atmel,pins =
c9d0f317
JCPV		 332 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
333 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
fc20c6ff 334 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
c9d0f317
JCPV		 335 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
336 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
337 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
338 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
339 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
d9b4fe83
JCPV		 340 };
341 };
342
d4fe9ac7
JCPV		 343 mmc0 {
344 pinctrl_mmc0_clk: mmc0_clk-0 {
345 atmel,pins =
c9d0f317 346 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
d4fe9ac7
JCPV		 347 };
348
349 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
350 atmel,pins =
c9d0f317
JCPV		 351 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
352 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
d4fe9ac7
JCPV		 353 };
354
355 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
356 atmel,pins =
c9d0f317
JCPV		 357 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
358 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
359 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
d4fe9ac7
JCPV		 360 };
361
362 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
363 atmel,pins =
c9d0f317
JCPV		 364 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
365 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
d4fe9ac7
JCPV		 366 };
367
368 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
369 atmel,pins =
c9d0f317
JCPV		 370 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
371 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
372 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
d4fe9ac7
JCPV		 373 };
374 };
375
544ae6b2
BS		 376 ssc0 {
377 pinctrl_ssc0_tx: ssc0_tx-0 {
378 atmel,pins =
c9d0f317
JCPV		 379 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
380 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
381 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
544ae6b2
BS		 382 };
383
384 pinctrl_ssc0_rx: ssc0_rx-0 {
385 atmel,pins =
c9d0f317
JCPV		 386 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
387 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
388 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
544ae6b2
BS		 389 };
390 };
391
a68b728f
WY		 392 spi0 {
393 pinctrl_spi0: spi0-0 {
394 atmel,pins =
c9d0f317
JCPV		 395 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
396 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
397 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
a68b728f
WY		 398 };
399 };
400
401 spi1 {
402 pinctrl_spi1: spi1-0 {
403 atmel,pins =
c9d0f317
JCPV		 404 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
405 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
406 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
a68b728f
WY		 407 };
408 };
409
f89ae61b
JCPV		 410 i2c_gpio0 {
411 pinctrl_i2c_gpio0: i2c_gpio0-0 {
412 atmel,pins =
413 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
414 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
415 };
416 };
417
028633c2
BB		 418 tcb0 {
419 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
420 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
421 };
422
423 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
424 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
428 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
429 };
430
431 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
432 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
436 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
437 };
438
439 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
440 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
441 };
442
443 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
444 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
445 };
446
447 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
448 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
449 };
450
451 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
452 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
453 };
454 };
455
456 tcb1 {
457 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
458 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
459 };
460
461 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
462 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
463 };
464
465 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
466 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
467 };
468
469 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
470 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
471 };
472
473 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
474 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
475 };
476
477 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
478 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
479 };
480
481 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
482 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
483 };
484
485 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
486 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
487 };
488
489 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
490 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
a68b728f
WY		 491 };
492 };
493
e4541ff2
JCPV		 494 pioA: gpio@fffff400 {
495 compatible = "atmel,at91rm9200-gpio";
496 reg = <0xfffff400 0x200>;
5e8b3bc3 497 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 498 #gpio-cells = <2>;
499 gpio-controller;
500 interrupt-controller;
501 #interrupt-cells = <2>;
e239e060 502 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
e4541ff2
JCPV		 503 };
504
505 pioB: gpio@fffff600 {
506 compatible = "atmel,at91rm9200-gpio";
507 reg = <0xfffff600 0x200>;
5e8b3bc3 508 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 509 #gpio-cells = <2>;
510 gpio-controller;
511 interrupt-controller;
512 #interrupt-cells = <2>;
e239e060 513 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
e4541ff2
JCPV		 514 };
515
516 pioC: gpio@fffff800 {
517 compatible = "atmel,at91rm9200-gpio";
518 reg = <0xfffff800 0x200>;
5e8b3bc3 519 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 520 #gpio-cells = <2>;
521 gpio-controller;
522 interrupt-controller;
523 #interrupt-cells = <2>;
e239e060 524 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
e4541ff2 525 };
5b6089cb
JCPV		 526 };
527
528 dbgu: serial@fffff200 {
8c07f664 529 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
5b6089cb 530 reg = <0xfffff200 0x200>;
5e8b3bc3 531 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 532 pinctrl-names = "default";
533 pinctrl-0 = <&pinctrl_dbgu>;
e239e060 534 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
684b8fb5 535 clock-names = "usart";
5b6089cb
JCPV		 536 status = "disabled";
537 };
538
539 usart0: serial@fffb0000 {
540 compatible = "atmel,at91sam9260-usart";
541 reg = <0xfffb0000 0x200>;
5e8b3bc3 542 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 543 atmel,use-dma-rx;
544 atmel,use-dma-tx;
ec6754a7 545 pinctrl-names = "default";
9e3129e9 546 pinctrl-0 = <&pinctrl_usart0>;
e239e060 547 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
684b8fb5 548 clock-names = "usart";
5b6089cb
JCPV		 549 status = "disabled";
550 };
551
552 usart1: serial@fffb4000 {
553 compatible = "atmel,at91sam9260-usart";
554 reg = <0xfffb4000 0x200>;
5e8b3bc3 555 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 556 atmel,use-dma-rx;
557 atmel,use-dma-tx;
ec6754a7 558 pinctrl-names = "default";
9e3129e9 559 pinctrl-0 = <&pinctrl_usart1>;
e239e060 560 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
684b8fb5 561 clock-names = "usart";
5b6089cb
JCPV		 562 status = "disabled";
563 };
564
565 usart2: serial@fffb8000 {
566 compatible = "atmel,at91sam9260-usart";
567 reg = <0xfffb8000 0x200>;
5e8b3bc3 568 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 569 atmel,use-dma-rx;
570 atmel,use-dma-tx;
ec6754a7 571 pinctrl-names = "default";
9e3129e9 572 pinctrl-0 = <&pinctrl_usart2>;
e239e060 573 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
684b8fb5 574 clock-names = "usart";
5b6089cb
JCPV		 575 status = "disabled";
576 };
577
578 usart3: serial@fffd0000 {
579 compatible = "atmel,at91sam9260-usart";
580 reg = <0xfffd0000 0x200>;
5e8b3bc3 581 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 582 atmel,use-dma-rx;
583 atmel,use-dma-tx;
ec6754a7 584 pinctrl-names = "default";
9e3129e9 585 pinctrl-0 = <&pinctrl_usart3>;
e239e060 586 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
684b8fb5 587 clock-names = "usart";
5b6089cb
JCPV		 588 status = "disabled";
589 };
590
9e3129e9 591 uart0: serial@fffd4000 {
5b6089cb
JCPV		 592 compatible = "atmel,at91sam9260-usart";
593 reg = <0xfffd4000 0x200>;
5e8b3bc3 594 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 595 atmel,use-dma-rx;
596 atmel,use-dma-tx;
ec6754a7 597 pinctrl-names = "default";
9e3129e9 598 pinctrl-0 = <&pinctrl_uart0>;
e239e060 599 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
684b8fb5 600 clock-names = "usart";
5b6089cb
JCPV		 601 status = "disabled";
602 };
603
9e3129e9 604 uart1: serial@fffd8000 {
5b6089cb
JCPV		 605 compatible = "atmel,at91sam9260-usart";
606 reg = <0xfffd8000 0x200>;
5e8b3bc3 607 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 608 atmel,use-dma-rx;
609 atmel,use-dma-tx;
ec6754a7 610 pinctrl-names = "default";
9e3129e9 611 pinctrl-0 = <&pinctrl_uart1>;
e239e060 612 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
684b8fb5 613 clock-names = "usart";
5b6089cb
JCPV		 614 status = "disabled";
615 };
616
617 macb0: ethernet@fffc4000 {
9c348d45 618 compatible = "cdns,at91sam9260-macb", "cdns,macb";
5b6089cb 619 reg = <0xfffc4000 0x100>;
5e8b3bc3 620 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 621 pinctrl-names = "default";
622 pinctrl-0 = <&pinctrl_macb_rmii>;
e239e060 623 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
684b8fb5 624 clock-names = "hclk", "pclk";
5b6089cb
JCPV		 625 status = "disabled";
626 };
627
628 usb1: gadget@fffa4000 {
70a9beaa 629 compatible = "atmel,at91sam9260-udc";
5b6089cb 630 reg = <0xfffa4000 0x4000>;
5e8b3bc3 631 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
e239e060 632 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
684b8fb5 633 clock-names = "pclk", "hclk";
5b6089cb
JCPV		 634 status = "disabled";
635 };
73d68d91 636
05dcd361
LD		 637 i2c0: i2c@fffac000 {
638 compatible = "atmel,at91sam9260-i2c";
639 reg = <0xfffac000 0x100>;
5e8b3bc3 640 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
05dcd361
LD		 641 #address-cells = <1>;
642 #size-cells = <0>;
e239e060 643 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
05dcd361
LD		 644 status = "disabled";
645 };
646
9873137a
LD		 647 mmc0: mmc@fffa8000 {
648 compatible = "atmel,hsmci";
649 reg = <0xfffa8000 0x600>;
5e8b3bc3 650 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
9873137a
LD		 651 #address-cells = <1>;
652 #size-cells = <0>;
6e19c94d 653 pinctrl-names = "default";
e239e060 654 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
684b8fb5 655 clock-names = "mci_clk";
9873137a
LD		 656 status = "disabled";
657 };
658
099343c6
BS		 659 ssc0: ssc@fffbc000 {
660 compatible = "atmel,at91rm9200-ssc";
661 reg = <0xfffbc000 0x4000>;
5e8b3bc3 662 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 663 pinctrl-names = "default";
664 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
e239e060 665 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
684b8fb5 666 clock-names = "pclk";
046e7d68 667 status = "disabled";
099343c6
BS		 668 };
669
d50f88a0
RG		 670 spi0: spi@fffc8000 {
671 #address-cells = <1>;
672 #size-cells = <0>;
673 compatible = "atmel,at91rm9200-spi";
674 reg = <0xfffc8000 0x200>;
5e8b3bc3 675 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY		 676 pinctrl-names = "default";
677 pinctrl-0 = <&pinctrl_spi0>;
e239e060 678 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
684b8fb5 679 clock-names = "spi_clk";
d50f88a0
RG		 680 status = "disabled";
681 };
682
683 spi1: spi@fffcc000 {
684 #address-cells = <1>;
685 #size-cells = <0>;
686 compatible = "atmel,at91rm9200-spi";
687 reg = <0xfffcc000 0x200>;
5e8b3bc3 688 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY		 689 pinctrl-names = "default";
690 pinctrl-0 = <&pinctrl_spi1>;
e239e060 691 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
684b8fb5 692 clock-names = "spi_clk";
d50f88a0
RG		 693 status = "disabled";
694 };
695
73d68d91 696 adc0: adc@fffe0000 {
e568d698
AB		 697 #address-cells = <1>;
698 #size-cells = <0>;
73d68d91
NF		 699 compatible = "atmel,at91sam9260-adc";
700 reg = <0xfffe0000 0x100>;
5e8b3bc3 701 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
e239e060 702 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
684b8fb5 703 clock-names = "adc_clk", "adc_op_clk";
73d68d91
NF		 704 atmel,adc-use-external-triggers;
705 atmel,adc-channels-used = <0xf>;
706 atmel,adc-vref = <3300>;
73d68d91 707 atmel,adc-startup-time = <15>;
4b50da65
LD		 708 atmel,adc-res = <8 10>;
709 atmel,adc-res-names = "lowres", "highres";
710 atmel,adc-use-res = "highres";
73d68d91 711
c94afa13 712 trigger0 {
73d68d91
NF		 713 trigger-name = "timer-counter-0";
714 trigger-value = <0x1>;
715 };
c94afa13 716 trigger1 {
73d68d91
NF		 717 trigger-name = "timer-counter-1";
718 trigger-value = <0x3>;
719 };
720
c94afa13 721 trigger2 {
73d68d91
NF		 722 trigger-name = "timer-counter-2";
723 trigger-value = <0x5>;
724 };
725
c94afa13 726 trigger3 {
73d68d91 727 trigger-name = "external";
c1ff0b47 728 trigger-value = <0xd>;
73d68d91
NF		 729 trigger-external;
730 };
731 };
7492e7ca 732
9b5a0675
BB		 733 rtc@fffffd20 {
734 compatible = "atmel,at91sam9260-rtt";
735 reg = <0xfffffd20 0x10>;
736 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
e239e060 737 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
9b5a0675
BB		 738 status = "disabled";
739 };
740
7492e7ca
FP		 741 watchdog@fffffd40 {
742 compatible = "atmel,at91sam9260-wdt";
743 reg = <0xfffffd40 0x10>;
fe46aa67 744 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
e239e060 745 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
fe46aa67
BB		 746 atmel,watchdog-type = "hardware";
747 atmel,reset-type = "all";
748 atmel,dbg-halt;
7492e7ca
FP		 749 status = "disabled";
750 };
1ff3beca
BB		 751
752 gpbr: syscon@fffffd50 {
753 compatible = "atmel,at91sam9260-gpbr", "syscon";
754 reg = <0xfffffd50 0x10>;
755 status = "disabled";
756 };
5b6089cb
JCPV		 757 };
758
cfdc7fa5 759 usb0: ohci@500000 {
5b6089cb
JCPV		 760 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
761 reg = <0x00500000 0x100000>;
5e8b3bc3 762 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
e239e060 763 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
f8073708 764 clock-names = "ohci_clk", "hclk", "uhpck";
5b6089cb
JCPV		 765 status = "disabled";
766 };
d9c41bf3
BB		 767
768 ebi: ebi@10000000 {
769 compatible = "atmel,at91sam9260-ebi";
770 #address-cells = <2>;
771 #size-cells = <1>;
772 atmel,smc = <&smc>;
773 atmel,matrix = <&matrix>;
774 reg = <0x10000000 0x80000000>;
775 ranges = <0x0 0x0 0x10000000 0x10000000
776 0x1 0x0 0x20000000 0x10000000
777 0x2 0x0 0x30000000 0x10000000
778 0x3 0x0 0x40000000 0x10000000
779 0x4 0x0 0x50000000 0x10000000
780 0x5 0x0 0x60000000 0x10000000
781 0x6 0x0 0x70000000 0x10000000
782 0x7 0x0 0x80000000 0x10000000>;
e239e060 783 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
d9c41bf3
BB		 784 status = "disabled";
785
786 nand_controller: nand-controller {
787 compatible = "atmel,at91sam9260-nand-controller";
788 #address-cells = <2>;
789 #size-cells = <1>;
790 ranges;
791 status = "disabled";
792 };
793 };
5b6089cb
JCPV		 794 };
795
e152e3f7 796 i2c-gpio-0 {
5b6089cb 797 compatible = "i2c-gpio";
92f8629b
JCPV		 798 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
799 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
5b6089cb
JCPV		 800 >;
801 i2c-gpio,sda-open-drain;
802 i2c-gpio,scl-open-drain;
803 i2c-gpio,delay-us = <2>; /* ~100 kHz */
804 #address-cells = <1>;
805 #size-cells = <0>;
f89ae61b
JCPV		 806 pinctrl-names = "default";
807 pinctrl-0 = <&pinctrl_i2c_gpio0>;
5b6089cb
JCPV		 808 status = "disabled";
809 };
810};
Linux 6.x block layer and io_uring tree(s)