Linux 4.10-rc1
[linux-2.6-block.git] / arch / arm / boot / dts / at91-sama5d2_xplained.dts
CommitLineData
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NF
1/*
2 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
3 *
4 * Copyright (C) 2015 Atmel,
5 * 2015 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45/dts-v1/;
46#include "sama5d2.dtsi"
a9b672a6 47#include "sama5d2-pinfunc.h"
13e2a6fd 48#include <dt-bindings/mfd/atmel-flexcom.h>
ff964962 49#include <dt-bindings/gpio/gpio.h>
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NF
50
51/ {
52 model = "Atmel SAMA5D2 Xplained";
53 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
54
55 chosen {
56 stdout-path = "serial0:115200n8";
57 };
58
59 memory {
60 reg = <0x20000000 0x80000>;
61 };
62
63 clocks {
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NF
64 slow_xtal {
65 clock-frequency = <32768>;
66 };
67
68 main_xtal {
69 clock-frequency = <12000000>;
70 };
71 };
72
73 ahb {
74 usb0: gadget@00300000 {
ff964962
CP
75 atmel,vbus-gpio = <&pioA 31 GPIO_ACTIVE_HIGH>;
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_usba_vbus>;
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NF
78 status = "okay";
79 };
80
81 usb1: ohci@00400000 {
82 num-ports = <3>;
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CP
83 atmel,vbus-gpio = <0 /* &pioA 41 GPIO_ACTIVE_HIGH */
84 &pioA 42 GPIO_ACTIVE_HIGH
85 0
86 >;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_usb_default>;
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NF
89 status = "okay";
90 };
91
92 usb2: ehci@00500000 {
93 status = "okay";
94 };
95
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LD
96 sdmmc0: sdio-host@a0000000 {
97 bus-width = <8>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_sdmmc0_default>;
100 non-removable;
101 mmc-ddr-1_8v;
102 status = "okay";
103 };
104
105 sdmmc1: sdio-host@b0000000 {
106 bus-width = <4>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_sdmmc1_default>;
109 status = "okay"; /* conflict with qspi0 */
110 };
111
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NF
112 apb {
113 spi0: spi@f8000000 {
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LD
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_spi0_default>;
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116 status = "okay";
117
118 m25p80@0 {
119 compatible = "atmel,at25df321a";
120 reg = <0>;
121 spi-max-frequency = <50000000>;
122 };
123 };
124
125 macb0: ethernet@f8008000 {
a9b672a6 126 pinctrl-names = "default";
6c482fd1 127 pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
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128 phy-mode = "rmii";
129 status = "okay";
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NF
130
131 ethernet-phy@1 {
132 reg = <0x1>;
133 interrupt-parent = <&pioA>;
134 interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
135 };
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136 };
137
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SW
138 pdmic@f8018000 {
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_pdmic_default>;
141 atmel,model = "PDMIC @ sama5d2_xplained";
142 atmel,mic-min-freq = <1000000>;
143 atmel,mic-max-freq = <3246000>;
144 atmel,mic-offset = <0x0>;
145 status = "okay";
146 };
147
22b5a0f7 148 uart1: serial@f8020000 {
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LD
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_uart1_default>;
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151 status = "okay";
152 };
153
154 i2c0: i2c@f8028000 {
155 dmas = <0>, <0>;
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LD
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_i2c0_default>;
0a804b57 158 i2c-sda-hold-time-ns = <350>;
22b5a0f7 159 status = "okay";
143877e6 160
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WY
161 pmic@5b {
162 compatible = "active-semi,act8945a";
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163 reg = <0x5b>;
164 active-semi,vsel-high;
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WY
165 active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>;
166 active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>;
167 active-semi,irq_gpios = <&pioA 45 GPIO_ACTIVE_LOW>;
168 active-semi,input-voltage-threshold-microvolt = <6600>;
169 active-semi,precondition-timeout = <40>;
170 active-semi,total-timeout = <3>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>;
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173 status = "okay";
174
175 regulators {
b8bca7ea 176 vdd_1v35_reg: REG_DCDC1 {
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177 regulator-name = "VDD_1V35";
178 regulator-min-microvolt = <1350000>;
179 regulator-max-microvolt = <1350000>;
180 regulator-always-on;
181 };
182
b8bca7ea 183 vdd_1v2_reg: REG_DCDC2 {
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184 regulator-name = "VDD_1V2";
185 regulator-min-microvolt = <1100000>;
186 regulator-max-microvolt = <1300000>;
187 regulator-always-on;
188 };
189
b8bca7ea 190 vdd_3v3_reg: REG_DCDC3 {
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191 regulator-name = "VDD_3V3";
192 regulator-min-microvolt = <3300000>;
193 regulator-max-microvolt = <3300000>;
194 regulator-always-on;
195 };
196
b8bca7ea 197 vdd_fuse_reg: REG_LDO1 {
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198 regulator-name = "VDD_FUSE";
199 regulator-min-microvolt = <2500000>;
200 regulator-max-microvolt = <2500000>;
201 regulator-always-on;
202 };
203
b8bca7ea 204 vdd_3v3_lp_reg: REG_LDO2 {
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205 regulator-name = "VDD_3V3_LP";
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 regulator-always-on;
209 };
210
b8bca7ea 211 vdd_led_reg: REG_LDO3 {
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WY
212 regulator-name = "VDD_LED";
213 regulator-min-microvolt = <3300000>;
214 regulator-max-microvolt = <3300000>;
215 regulator-always-on;
216 };
217
b8bca7ea 218 vdd_sdhc_1v8_reg: REG_LDO4 {
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WY
219 regulator-name = "VDD_SDHC_1V8";
220 regulator-min-microvolt = <1800000>;
221 regulator-max-microvolt = <1800000>;
863c1ca7 222 regulator-always-on;
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WY
223 };
224 };
225 };
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226 };
227
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LD
228 flx0: flexcom@f8034000 {
229 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
230 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
231
232 uart5: serial@200 {
233 compatible = "atmel,at91sam9260-usart";
234 reg = <0x200 0x200>;
235 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
236 clocks = <&flx0_clk>;
237 clock-names = "usart";
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_flx0_default>;
240 atmel,fifo-size = <32>;
241 status = "okay";
242 };
243 };
244
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NF
245 shdwc@f8048010 {
246 atmel,shdwc-debouncer = <976>;
247
248 input@0 {
249 reg = <0>;
250 atmel,wakeup-type = "low";
251 };
252 };
253
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WY
254 watchdog@f8048040 {
255 status = "okay";
256 };
257
22b5a0f7 258 uart3: serial@fc008000 {
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259 pinctrl-names = "default";
260 pinctrl-0 = <&pinctrl_uart3_default>;
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261 status = "okay";
262 };
263
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LD
264 flx4: flexcom@fc018000 {
265 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
266 status = "okay";
267
268 i2c2: i2c@600 {
269 compatible = "atmel,sama5d2-i2c";
270 reg = <0x600 0x200>;
271 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
272 dmas = <0>, <0>;
273 dma-names = "tx", "rx";
274 #address-cells = <1>;
275 #size-cells = <0>;
276 clocks = <&flx4_clk>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_flx4_default>;
279 atmel,fifo-size = <16>;
280 status = "okay";
281 };
282 };
283
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284 i2c1: i2c@fc028000 {
285 dmas = <0>, <0>;
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286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_i2c1_default>;
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288 status = "okay";
289
290 at24@54 {
291 compatible = "atmel,24c02";
292 reg = <0x54>;
293 pagesize = <16>;
294 };
295 };
a9b672a6 296
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LD
297 adc: adc@fc030000 {
298 vddana-supply = <&vdd_3v3_lp_reg>;
299 vref-supply = <&vdd_3v3_lp_reg>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_adc_default>;
302 status = "okay";
303 };
304
a9b672a6 305 pinctrl@fc038000 {
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LD
306 /*
307 * There is no real pinmux for ADC, if the pin
308 * is not requested by another peripheral then
309 * the muxing is done when channel is enabled.
310 * Requesting pins for ADC is GPIO is
311 * encouraged to prevent conflicts and to
312 * disable bias in order to be in the same
313 * state when the pin is not muxed to the adc.
314 */
315 pinctrl_adc_default: adc_default {
316 pinmux = <PIN_PD23__GPIO>;
317 bias-disable;
318 };
319
b8bca7ea
WY
320 pinctrl_charger_chglev: charger_chglev {
321 pinmux = <PIN_PA12__GPIO>;
322 bias-disable;
323 };
324
325 pinctrl_charger_irq: charger_irq {
326 pinmux = <PIN_PB13__GPIO>;
327 bias-disable;
328 };
329
330 pinctrl_charger_lbo: charger_lbo {
331 pinmux = <PIN_PC8__GPIO>;
332 bias-pull-up;
333 };
334
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LD
335 pinctrl_flx0_default: flx0_default {
336 pinmux = <PIN_PB28__FLEXCOM0_IO0>,
337 <PIN_PB29__FLEXCOM0_IO1>;
338 bias-disable;
339 };
340
341 pinctrl_flx4_default: flx4_default {
342 pinmux = <PIN_PD12__FLEXCOM4_IO0>,
343 <PIN_PD13__FLEXCOM4_IO1>;
344 bias-disable;
345 };
346
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LD
347 pinctrl_i2c0_default: i2c0_default {
348 pinmux = <PIN_PD21__TWD0>,
349 <PIN_PD22__TWCK0>;
350 bias-disable;
351 };
352
353 pinctrl_i2c1_default: i2c1_default {
354 pinmux = <PIN_PD4__TWD1>,
355 <PIN_PD5__TWCK1>;
356 bias-disable;
357 };
358
c7e48d44
LD
359 pinctrl_key_gpio_default: key_gpio_default {
360 pinmux = <PIN_PB9__GPIO>;
361 bias-pull-up;
362 };
363
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WY
364 pinctrl_led_gpio_default: led_gpio_default {
365 pinmux = <PIN_PB0__GPIO>,
366 <PIN_PB5__GPIO>,
367 <PIN_PB6__GPIO>;
368 bias-pull-up;
369 };
370
a9b672a6
LD
371 pinctrl_macb0_default: macb0_default {
372 pinmux = <PIN_PB14__GTXCK>,
373 <PIN_PB15__GTXEN>,
374 <PIN_PB16__GRXDV>,
375 <PIN_PB17__GRXER>,
376 <PIN_PB18__GRX0>,
377 <PIN_PB19__GRX1>,
378 <PIN_PB20__GTX0>,
379 <PIN_PB21__GTX1>,
380 <PIN_PB22__GMDC>,
381 <PIN_PB23__GMDIO>;
382 bias-disable;
383 };
384
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NF
385 pinctrl_macb0_phy_irq: macb0_phy_irq {
386 pinmux = <PIN_PC9__GPIO>;
34ff2dc7 387 bias-disable;
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NF
388 };
389
ca6349a8
SW
390 pinctrl_pdmic_default: pdmic_default {
391 pinmux = <PIN_PB26__PDMIC_DAT>,
392 <PIN_PB27__PDMIC_CLK>;
393 bias-disable;
394 };
395
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LD
396 pinctrl_sdmmc0_default: sdmmc0_default {
397 cmd_data {
398 pinmux = <PIN_PA1__SDMMC0_CMD>,
399 <PIN_PA2__SDMMC0_DAT0>,
400 <PIN_PA3__SDMMC0_DAT1>,
401 <PIN_PA4__SDMMC0_DAT2>,
402 <PIN_PA5__SDMMC0_DAT3>,
403 <PIN_PA6__SDMMC0_DAT4>,
404 <PIN_PA7__SDMMC0_DAT5>,
405 <PIN_PA8__SDMMC0_DAT6>,
406 <PIN_PA9__SDMMC0_DAT7>;
407 bias-pull-up;
408 };
409
410 ck_cd_rstn_vddsel {
411 pinmux = <PIN_PA0__SDMMC0_CK>,
412 <PIN_PA10__SDMMC0_RSTN>,
413 <PIN_PA11__SDMMC0_VDDSEL>,
414 <PIN_PA13__SDMMC0_CD>;
415 bias-disable;
416 };
417 };
418
419 pinctrl_sdmmc1_default: sdmmc1_default {
420 cmd_data {
421 pinmux = <PIN_PA28__SDMMC1_CMD>,
422 <PIN_PA18__SDMMC1_DAT0>,
423 <PIN_PA19__SDMMC1_DAT1>,
424 <PIN_PA20__SDMMC1_DAT2>,
425 <PIN_PA21__SDMMC1_DAT3>;
426 bias-pull-up;
427 };
428
429 conf-ck_cd {
430 pinmux = <PIN_PA22__SDMMC1_CK>,
431 <PIN_PA30__SDMMC1_CD>;
432 bias-disable;
433 };
434 };
435
a9b672a6
LD
436 pinctrl_spi0_default: spi0_default {
437 pinmux = <PIN_PA14__SPI0_SPCK>,
438 <PIN_PA15__SPI0_MOSI>,
439 <PIN_PA16__SPI0_MISO>,
440 <PIN_PA17__SPI0_NPCS0>;
441 bias-disable;
442 };
443
444 pinctrl_uart1_default: uart1_default {
445 pinmux = <PIN_PD2__URXD1>,
446 <PIN_PD3__UTXD1>;
447 bias-disable;
448 };
449
450 pinctrl_uart3_default: uart3_default {
451 pinmux = <PIN_PB11__URXD3>,
452 <PIN_PB12__UTXD3>;
453 bias-disable;
454 };
ff964962
CP
455
456 pinctrl_usb_default: usb_default {
457 pinmux = <PIN_PB10__GPIO>;
458 bias-disable;
459 };
460
461 pinctrl_usba_vbus: usba_vbus {
462 pinmux = <PIN_PA31__GPIO>;
463 bias-disable;
464 };
465
a9b672a6 466 };
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NF
467 };
468 };
c7e48d44
LD
469
470 gpio_keys {
471 compatible = "gpio-keys";
472
473 pinctrl-names = "default";
474 pinctrl-0 = <&pinctrl_key_gpio_default>;
475
476 bp1 {
477 label = "PB_USER";
478 gpios = <&pioA 41 GPIO_ACTIVE_LOW>;
479 linux,code = <0x104>;
480 };
481 };
ed0f4b3f
WY
482
483 leds {
484 compatible = "gpio-leds";
485 pinctrl-names = "default";
486 pinctrl-0 = <&pinctrl_led_gpio_default>;
487 status = "okay";
488
489 red {
490 label = "red";
491 gpios = <&pioA 38 GPIO_ACTIVE_LOW>;
492 };
493
494 green {
495 label = "green";
496 gpios = <&pioA 37 GPIO_ACTIVE_LOW>;
497 };
498
499 blue {
500 label = "blue";
501 gpios = <&pioA 32 GPIO_ACTIVE_LOW>;
502 linux,default-trigger = "heartbeat";
503 };
504 };
22b5a0f7 505};