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21dd0ece PR |
1 | /* |
2 | * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module. | |
3 | * | |
4 | * Copyright (C) 2017 Axentia Technologies AB | |
5 | * | |
6 | * Author: Peter Rosin <peda@axentia.se> | |
7 | * | |
8 | * Licensed under GPLv2 or later. | |
9 | */ | |
10 | ||
11 | #include "sama5d31.dtsi" | |
12 | ||
13 | / { | |
14 | compatible = "axentia,linea", | |
15 | "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; | |
16 | ||
17 | memory { | |
18 | reg = <0x20000000 0x4000000>; | |
19 | }; | |
20 | }; | |
21 | ||
22 | &slow_xtal { | |
23 | clock-frequency = <32768>; | |
24 | }; | |
25 | ||
26 | &main_xtal { | |
27 | clock-frequency = <12000000>; | |
28 | }; | |
29 | ||
30 | &i2c0 { | |
31 | status = "okay"; | |
32 | ||
33 | eeprom@51 { | |
43c3a448 | 34 | compatible = "st,24c64", "atmel,24c64"; |
21dd0ece PR |
35 | reg = <0x51>; |
36 | pagesize = <32>; | |
37 | }; | |
38 | }; | |
39 | ||
1004a297 BB |
40 | &ebi { |
41 | pinctrl-0 = <&pinctrl_ebi_nand_addr>; | |
42 | pinctrl-names = "default"; | |
21dd0ece | 43 | status = "okay"; |
1004a297 BB |
44 | }; |
45 | ||
21dd0ece | 46 | |
1004a297 BB |
47 | &nand_controller { |
48 | status = "okay"; | |
49 | ||
50 | nand: nand@3 { | |
51 | reg = <0x3 0x0 0x2>; | |
52 | atmel,rb = <0>; | |
53 | nand-bus-width = <8>; | |
54 | nand-ecc-mode = "hw"; | |
55 | nand-ecc-strength = <4>; | |
56 | nand-ecc-step-size = <512>; | |
57 | nand-on-flash-bbt; | |
58 | label = "atmel_nand"; | |
59 | }; | |
21dd0ece | 60 | }; |