[linux-2.6-block.git] / arch / arm / boot / dts / aspeed-g4.dtsi

#include "skeleton.dtsi"

/ {
	model = "Aspeed BMC";
	compatible = "aspeed,ast2400";
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&vic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		fmc: flash-controller@1e620000 {
			reg = < 0x1e620000 0x94
				0x20000000 0x02000000 >;
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "aspeed,ast2400-fmc";
			status = "disabled";
			interrupts = <19>;
			flash@0 {
				reg = < 0 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
		};

		spi: flash-controller@1e630000 {
			reg = < 0x1e630000 0x18
				0x30000000 0x02000000 >;
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "aspeed,ast2400-spi";
			status = "disabled";
			flash@0 {
				reg = < 0 >;
				compatible = "jedec,spi-nor";
				status = "disabled";
			};
		};

		vic: interrupt-controller@1e6c0080 {
			compatible = "aspeed,ast2400-vic";
			interrupt-controller;
			#interrupt-cells = <1>;
			valid-sources = <0xffffffff 0x0007ffff>;
			reg = <0x1e6c0080 0x80>;
		};

		mac0: ethernet@1e660000 {
			compatible = "faraday,ftgmac100";
			reg = <0x1e660000 0x180>;
			interrupts = <2>;
			no-hw-checksum;
			status = "disabled";
		};

		mac1: ethernet@1e680000 {
			compatible = "faraday,ftgmac100";
			reg = <0x1e680000 0x180>;
			interrupts = <3>;
			no-hw-checksum;
			status = "disabled";
		};

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			syscon: syscon@1e6e2000 {
				compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
				reg = <0x1e6e2000 0x1a8>;
				#address-cells = <1>;
				#size-cells = <0>;

                                clk_clkin: clk_clkin {
                                        #clock-cells = <0>;
                                        compatible = "fixed-clock";
                                        clock-frequency = <48000000>;
                                };

                                clk_hpll: clk_hpll@70 {
                                        #clock-cells = <0>;
                                        compatible = "aspeed,g4-hpll-clock", "fixed-clock";
                                        reg = <0x70>;
                                        clocks = <&clk_clkin>;
                                        clock-frequency = <384000000>;
                                };

                                clk_ahb: clk_ahb@70 {
                                        #clock-cells = <0>;
                                        compatible = "aspeed,g4-ahb-clock", "fixed-clock";
                                        reg = <0x70>;
                                        clocks = <&clk_hpll>;
                                        clock-frequency = <192000000>;
                                };

                                clk_apb: clk_apb@08 {
                                        #clock-cells = <0>;
                                        compatible = "aspeed,g4-apb-clock", "fixed-clock";
                                        reg = <0x08>;
                                        clocks = <&clk_hpll>;
                                        clock-frequency = <48000000>;
                                };

                                clk_uart: clk_uart@2c{
                                        #clock-cells = <0>;
                                        compatible = "aspeed,g4-uart-clock", "fixed-clock";
                                        reg = <0x2c>;
                                        clock-frequency = <24000000>;
                                };

				pinctrl: pinctrl {
					compatible = "aspeed,g4-pinctrl";

					pinctrl_acpi_default: acpi_default {
						function = "ACPI";
						groups = "ACPI";
					};

					pinctrl_adc0_default: adc0_default {
						function = "ADC0";
						groups = "ADC0";
					};

					pinctrl_adc1_default: adc1_default {
						function = "ADC1";
						groups = "ADC1";
					};

					pinctrl_adc10_default: adc10_default {
						function = "ADC10";
						groups = "ADC10";
					};

					pinctrl_adc11_default: adc11_default {
						function = "ADC11";
						groups = "ADC11";
					};

					pinctrl_adc12_default: adc12_default {
						function = "ADC12";
						groups = "ADC12";
					};

					pinctrl_adc13_default: adc13_default {
						function = "ADC13";
						groups = "ADC13";
					};

					pinctrl_adc14_default: adc14_default {
						function = "ADC14";
						groups = "ADC14";
					};

					pinctrl_adc15_default: adc15_default {
						function = "ADC15";
						groups = "ADC15";
					};

					pinctrl_adc2_default: adc2_default {
						function = "ADC2";
						groups = "ADC2";
					};

					pinctrl_adc3_default: adc3_default {
						function = "ADC3";
						groups = "ADC3";
					};

					pinctrl_adc4_default: adc4_default {
						function = "ADC4";
						groups = "ADC4";
					};

					pinctrl_adc5_default: adc5_default {
						function = "ADC5";
						groups = "ADC5";
					};

					pinctrl_adc6_default: adc6_default {
						function = "ADC6";
						groups = "ADC6";
					};

					pinctrl_adc7_default: adc7_default {
						function = "ADC7";
						groups = "ADC7";
					};

					pinctrl_adc8_default: adc8_default {
						function = "ADC8";
						groups = "ADC8";
					};

					pinctrl_adc9_default: adc9_default {
						function = "ADC9";
						groups = "ADC9";
					};

					pinctrl_bmcint_default: bmcint_default {
						function = "BMCINT";
						groups = "BMCINT";
					};

					pinctrl_ddcclk_default: ddcclk_default {
						function = "DDCCLK";
						groups = "DDCCLK";
					};

					pinctrl_ddcdat_default: ddcdat_default {
						function = "DDCDAT";
						groups = "DDCDAT";
					};

					pinctrl_extrst_default: extrst_default {
						function = "EXTRST";
						groups = "EXTRST";
					};

					pinctrl_flack_default: flack_default {
						function = "FLACK";
						groups = "FLACK";
					};

					pinctrl_flbusy_default: flbusy_default {
						function = "FLBUSY";
						groups = "FLBUSY";
					};

					pinctrl_flwp_default: flwp_default {
						function = "FLWP";
						groups = "FLWP";
					};

					pinctrl_gpid_default: gpid_default {
						function = "GPID";
						groups = "GPID";
					};

					pinctrl_gpid0_default: gpid0_default {
						function = "GPID0";
						groups = "GPID0";
					};

					pinctrl_gpid2_default: gpid2_default {
						function = "GPID2";
						groups = "GPID2";
					};

					pinctrl_gpid4_default: gpid4_default {
						function = "GPID4";
						groups = "GPID4";
					};

					pinctrl_gpid6_default: gpid6_default {
						function = "GPID6";
						groups = "GPID6";
					};

					pinctrl_gpie0_default: gpie0_default {
						function = "GPIE0";
						groups = "GPIE0";
					};

					pinctrl_gpie2_default: gpie2_default {
						function = "GPIE2";
						groups = "GPIE2";
					};

					pinctrl_gpie4_default: gpie4_default {
						function = "GPIE4";
						groups = "GPIE4";
					};

					pinctrl_gpie6_default: gpie6_default {
						function = "GPIE6";
						groups = "GPIE6";
					};

					pinctrl_i2c10_default: i2c10_default {
						function = "I2C10";
						groups = "I2C10";
					};

					pinctrl_i2c11_default: i2c11_default {
						function = "I2C11";
						groups = "I2C11";
					};

					pinctrl_i2c12_default: i2c12_default {
						function = "I2C12";
						groups = "I2C12";
					};

					pinctrl_i2c13_default: i2c13_default {
						function = "I2C13";
						groups = "I2C13";
					};

					pinctrl_i2c14_default: i2c14_default {
						function = "I2C14";
						groups = "I2C14";
					};

					pinctrl_i2c3_default: i2c3_default {
						function = "I2C3";
						groups = "I2C3";
					};

					pinctrl_i2c4_default: i2c4_default {
						function = "I2C4";
						groups = "I2C4";
					};

					pinctrl_i2c5_default: i2c5_default {
						function = "I2C5";
						groups = "I2C5";
					};

					pinctrl_i2c6_default: i2c6_default {
						function = "I2C6";
						groups = "I2C6";
					};

					pinctrl_i2c7_default: i2c7_default {
						function = "I2C7";
						groups = "I2C7";
					};

					pinctrl_i2c8_default: i2c8_default {
						function = "I2C8";
						groups = "I2C8";
					};

					pinctrl_i2c9_default: i2c9_default {
						function = "I2C9";
						groups = "I2C9";
					};

					pinctrl_lpcpd_default: lpcpd_default {
						function = "LPCPD";
						groups = "LPCPD";
					};

					pinctrl_lpcpme_default: lpcpme_default {
						function = "LPCPME";
						groups = "LPCPME";
					};

					pinctrl_lpcrst_default: lpcrst_default {
						function = "LPCRST";
						groups = "LPCRST";
					};

					pinctrl_lpcsmi_default: lpcsmi_default {
						function = "LPCSMI";
						groups = "LPCSMI";
					};

					pinctrl_mac1link_default: mac1link_default {
						function = "MAC1LINK";
						groups = "MAC1LINK";
					};

					pinctrl_mac2link_default: mac2link_default {
						function = "MAC2LINK";
						groups = "MAC2LINK";
					};

					pinctrl_mdio1_default: mdio1_default {
						function = "MDIO1";
						groups = "MDIO1";
					};

					pinctrl_mdio2_default: mdio2_default {
						function = "MDIO2";
						groups = "MDIO2";
					};

					pinctrl_ncts1_default: ncts1_default {
						function = "NCTS1";
						groups = "NCTS1";
					};

					pinctrl_ncts2_default: ncts2_default {
						function = "NCTS2";
						groups = "NCTS2";
					};

					pinctrl_ncts3_default: ncts3_default {
						function = "NCTS3";
						groups = "NCTS3";
					};

					pinctrl_ncts4_default: ncts4_default {
						function = "NCTS4";
						groups = "NCTS4";
					};

					pinctrl_ndcd1_default: ndcd1_default {
						function = "NDCD1";
						groups = "NDCD1";
					};

					pinctrl_ndcd2_default: ndcd2_default {
						function = "NDCD2";
						groups = "NDCD2";
					};

					pinctrl_ndcd3_default: ndcd3_default {
						function = "NDCD3";
						groups = "NDCD3";
					};

					pinctrl_ndcd4_default: ndcd4_default {
						function = "NDCD4";
						groups = "NDCD4";
					};

					pinctrl_ndsr1_default: ndsr1_default {
						function = "NDSR1";
						groups = "NDSR1";
					};

					pinctrl_ndsr2_default: ndsr2_default {
						function = "NDSR2";
						groups = "NDSR2";
					};

					pinctrl_ndsr3_default: ndsr3_default {
						function = "NDSR3";
						groups = "NDSR3";
					};

					pinctrl_ndsr4_default: ndsr4_default {
						function = "NDSR4";
						groups = "NDSR4";
					};

					pinctrl_ndtr1_default: ndtr1_default {
						function = "NDTR1";
						groups = "NDTR1";
					};

					pinctrl_ndtr2_default: ndtr2_default {
						function = "NDTR2";
						groups = "NDTR2";
					};

					pinctrl_ndtr3_default: ndtr3_default {
						function = "NDTR3";
						groups = "NDTR3";
					};

					pinctrl_ndtr4_default: ndtr4_default {
						function = "NDTR4";
						groups = "NDTR4";
					};

					pinctrl_ndts4_default: ndts4_default {
						function = "NDTS4";
						groups = "NDTS4";
					};

					pinctrl_nri1_default: nri1_default {
						function = "NRI1";
						groups = "NRI1";
					};

					pinctrl_nri2_default: nri2_default {
						function = "NRI2";
						groups = "NRI2";
					};

					pinctrl_nri3_default: nri3_default {
						function = "NRI3";
						groups = "NRI3";
					};

					pinctrl_nri4_default: nri4_default {
						function = "NRI4";
						groups = "NRI4";
					};

					pinctrl_nrts1_default: nrts1_default {
						function = "NRTS1";
						groups = "NRTS1";
					};

					pinctrl_nrts2_default: nrts2_default {
						function = "NRTS2";
						groups = "NRTS2";
					};

					pinctrl_nrts3_default: nrts3_default {
						function = "NRTS3";
						groups = "NRTS3";
					};

					pinctrl_oscclk_default: oscclk_default {
						function = "OSCCLK";
						groups = "OSCCLK";
					};

					pinctrl_pwm0_default: pwm0_default {
						function = "PWM0";
						groups = "PWM0";
					};

					pinctrl_pwm1_default: pwm1_default {
						function = "PWM1";
						groups = "PWM1";
					};

					pinctrl_pwm2_default: pwm2_default {
						function = "PWM2";
						groups = "PWM2";
					};

					pinctrl_pwm3_default: pwm3_default {
						function = "PWM3";
						groups = "PWM3";
					};

					pinctrl_pwm4_default: pwm4_default {
						function = "PWM4";
						groups = "PWM4";
					};

					pinctrl_pwm5_default: pwm5_default {
						function = "PWM5";
						groups = "PWM5";
					};

					pinctrl_pwm6_default: pwm6_default {
						function = "PWM6";
						groups = "PWM6";
					};

					pinctrl_pwm7_default: pwm7_default {
						function = "PWM7";
						groups = "PWM7";
					};

					pinctrl_rgmii1_default: rgmii1_default {
						function = "RGMII1";
						groups = "RGMII1";
					};

					pinctrl_rgmii2_default: rgmii2_default {
						function = "RGMII2";
						groups = "RGMII2";
					};

					pinctrl_rmii1_default: rmii1_default {
						function = "RMII1";
						groups = "RMII1";
					};

					pinctrl_rmii2_default: rmii2_default {
						function = "RMII2";
						groups = "RMII2";
					};

					pinctrl_rom16_default: rom16_default {
						function = "ROM16";
						groups = "ROM16";
					};

					pinctrl_rom8_default: rom8_default {
						function = "ROM8";
						groups = "ROM8";
					};

					pinctrl_romcs1_default: romcs1_default {
						function = "ROMCS1";
						groups = "ROMCS1";
					};

					pinctrl_romcs2_default: romcs2_default {
						function = "ROMCS2";
						groups = "ROMCS2";
					};

					pinctrl_romcs3_default: romcs3_default {
						function = "ROMCS3";
						groups = "ROMCS3";
					};

					pinctrl_romcs4_default: romcs4_default {
						function = "ROMCS4";
						groups = "ROMCS4";
					};

					pinctrl_rxd1_default: rxd1_default {
						function = "RXD1";
						groups = "RXD1";
					};

					pinctrl_rxd2_default: rxd2_default {
						function = "RXD2";
						groups = "RXD2";
					};

					pinctrl_rxd3_default: rxd3_default {
						function = "RXD3";
						groups = "RXD3";
					};

					pinctrl_rxd4_default: rxd4_default {
						function = "RXD4";
						groups = "RXD4";
					};

					pinctrl_salt1_default: salt1_default {
						function = "SALT1";
						groups = "SALT1";
					};

					pinctrl_salt2_default: salt2_default {
						function = "SALT2";
						groups = "SALT2";
					};

					pinctrl_salt3_default: salt3_default {
						function = "SALT3";
						groups = "SALT3";
					};

					pinctrl_salt4_default: salt4_default {
						function = "SALT4";
						groups = "SALT4";
					};

					pinctrl_sd1_default: sd1_default {
						function = "SD1";
						groups = "SD1";
					};

					pinctrl_sd2_default: sd2_default {
						function = "SD2";
						groups = "SD2";
					};

					pinctrl_sgpmck_default: sgpmck_default {
						function = "SGPMCK";
						groups = "SGPMCK";
					};

					pinctrl_sgpmi_default: sgpmi_default {
						function = "SGPMI";
						groups = "SGPMI";
					};

					pinctrl_sgpmld_default: sgpmld_default {
						function = "SGPMLD";
						groups = "SGPMLD";
					};

					pinctrl_sgpmo_default: sgpmo_default {
						function = "SGPMO";
						groups = "SGPMO";
					};

					pinctrl_sgpsck_default: sgpsck_default {
						function = "SGPSCK";
						groups = "SGPSCK";
					};

					pinctrl_sgpsi0_default: sgpsi0_default {
						function = "SGPSI0";
						groups = "SGPSI0";
					};

					pinctrl_sgpsi1_default: sgpsi1_default {
						function = "SGPSI1";
						groups = "SGPSI1";
					};

					pinctrl_sgpsld_default: sgpsld_default {
						function = "SGPSLD";
						groups = "SGPSLD";
					};

					pinctrl_sioonctrl_default: sioonctrl_default {
						function = "SIOONCTRL";
						groups = "SIOONCTRL";
					};

					pinctrl_siopbi_default: siopbi_default {
						function = "SIOPBI";
						groups = "SIOPBI";
					};

					pinctrl_siopbo_default: siopbo_default {
						function = "SIOPBO";
						groups = "SIOPBO";
					};

					pinctrl_siopwreq_default: siopwreq_default {
						function = "SIOPWREQ";
						groups = "SIOPWREQ";
					};

					pinctrl_siopwrgd_default: siopwrgd_default {
						function = "SIOPWRGD";
						groups = "SIOPWRGD";
					};

					pinctrl_sios3_default: sios3_default {
						function = "SIOS3";
						groups = "SIOS3";
					};

					pinctrl_sios5_default: sios5_default {
						function = "SIOS5";
						groups = "SIOS5";
					};

					pinctrl_siosci_default: siosci_default {
						function = "SIOSCI";
						groups = "SIOSCI";
					};

					pinctrl_spi1_default: spi1_default {
						function = "SPI1";
						groups = "SPI1";
					};

					pinctrl_spi1debug_default: spi1debug_default {
						function = "SPI1DEBUG";
						groups = "SPI1DEBUG";
					};

					pinctrl_spi1passthru_default: spi1passthru_default {
						function = "SPI1PASSTHRU";
						groups = "SPI1PASSTHRU";
					};

					pinctrl_spics1_default: spics1_default {
						function = "SPICS1";
						groups = "SPICS1";
					};

					pinctrl_timer3_default: timer3_default {
						function = "TIMER3";
						groups = "TIMER3";
					};

					pinctrl_timer4_default: timer4_default {
						function = "TIMER4";
						groups = "TIMER4";
					};

					pinctrl_timer5_default: timer5_default {
						function = "TIMER5";
						groups = "TIMER5";
					};

					pinctrl_timer6_default: timer6_default {
						function = "TIMER6";
						groups = "TIMER6";
					};

					pinctrl_timer7_default: timer7_default {
						function = "TIMER7";
						groups = "TIMER7";
					};

					pinctrl_timer8_default: timer8_default {
						function = "TIMER8";
						groups = "TIMER8";
					};

					pinctrl_txd1_default: txd1_default {
						function = "TXD1";
						groups = "TXD1";
					};

					pinctrl_txd2_default: txd2_default {
						function = "TXD2";
						groups = "TXD2";
					};

					pinctrl_txd3_default: txd3_default {
						function = "TXD3";
						groups = "TXD3";
					};

					pinctrl_txd4_default: txd4_default {
						function = "TXD4";
						groups = "TXD4";
					};

					pinctrl_uart6_default: uart6_default {
						function = "UART6";
						groups = "UART6";
					};

					pinctrl_usbcki_default: usbcki_default {
						function = "USBCKI";
						groups = "USBCKI";
					};

					pinctrl_vgabios_rom_default: vgabios_rom_default {
						function = "VGABIOS_ROM";
						groups = "VGABIOS_ROM";
					};

					pinctrl_vgahs_default: vgahs_default {
						function = "VGAHS";
						groups = "VGAHS";
					};

					pinctrl_vgavs_default: vgavs_default {
						function = "VGAVS";
						groups = "VGAVS";
					};

					pinctrl_vpi18_default: vpi18_default {
						function = "VPI18";
						groups = "VPI18";
					};

					pinctrl_vpi24_default: vpi24_default {
						function = "VPI24";
						groups = "VPI24";
					};

					pinctrl_vpi30_default: vpi30_default {
						function = "VPI30";
						groups = "VPI30";
					};

					pinctrl_vpo12_default: vpo12_default {
						function = "VPO12";
						groups = "VPO12";
					};

					pinctrl_vpo24_default: vpo24_default {
						function = "VPO24";
						groups = "VPO24";
					};

					pinctrl_wdtrst1_default: wdtrst1_default {
						function = "WDTRST1";
						groups = "WDTRST1";
					};

					pinctrl_wdtrst2_default: wdtrst2_default {
						function = "WDTRST2";
						groups = "WDTRST2";
					};

				};
			};

			sram@1e720000 {
				compatible = "mmio-sram";
				reg = <0x1e720000 0x8000>;	// 32K
			};

			gpio: gpio@1e780000 {
				#gpio-cells = <2>;
				gpio-controller;
				compatible = "aspeed,ast2400-gpio";
				reg = <0x1e780000 0x1000>;
				interrupts = <20>;
				gpio-ranges = <&pinctrl 0 0 220>;
				interrupt-controller;
			};

			timer: timer@1e782000 {
				compatible = "aspeed,ast2400-timer";
				reg = <0x1e782000 0x90>;
				// The moxart_timer driver registers only one
				// interrupt and assumes it's for timer 1
				//interrupts = <16 17 18 35 36 37 38 39>;
				interrupts = <16>;
				clocks = <&clk_apb>;
			};

			wdt1: wdt@1e785000 {
				compatible = "aspeed,wdt";
				reg = <0x1e785000 0x1c>;
				interrupts = <27>;
			};

			wdt2: wdt@1e785020 {
				compatible = "aspeed,wdt";
				reg = <0x1e785020 0x1c>;
				interrupts = <27>;
				clocks = <&clk_apb>;
				status = "disabled";
			};

			uart1: serial@1e783000 {
				compatible = "ns16550a";
				reg = <0x1e783000 0x1000>;
				reg-shift = <2>;
				interrupts = <9>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};

			uart2: serial@1e78d000 {
				compatible = "ns16550a";
				reg = <0x1e78d000 0x1000>;
				reg-shift = <2>;
				interrupts = <32>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};

			uart3: serial@1e78e000 {
				compatible = "ns16550a";
				reg = <0x1e78e000 0x1000>;
				reg-shift = <2>;
				interrupts = <33>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};

			uart4: serial@1e78f000 {
				compatible = "ns16550a";
				reg = <0x1e78f000 0x1000>;
				reg-shift = <2>;
				interrupts = <34>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};

			uart5: serial@1e784000 {
				compatible = "ns16550a";
				reg = <0x1e784000 0x1000>;
				reg-shift = <2>;
				interrupts = <10>;
				clocks = <&clk_uart>;
				current-speed = <38400>;
				no-loopback-test;
				status = "disabled";
			};

			uart6: serial@1e787000 {
				compatible = "ns16550a";
				reg = <0x1e787000 0x1000>;
				reg-shift = <2>;
				interrupts = <10>;
				clocks = <&clk_uart>;
				no-loopback-test;
				status = "disabled";
			};
		};
	};
};
Commit	Line	Data
d44a1138 JS	1	#include "skeleton.dtsi"
	2
	3	/ {
	4	model = "Aspeed BMC";
	5	compatible = "aspeed,ast2400";
	6	#address-cells = <1>;
	7	#size-cells = <1>;
	8	interrupt-parent = <&vic>;
	9
	10	cpus {
	11	#address-cells = <1>;
	12	#size-cells = <0>;
	13
	14	cpu@0 {
	15	compatible = "arm,arm926ej-s";
	16	device_type = "cpu";
	17	reg = <0>;
	18	};
	19	};
	20
d44a1138 JS	21	ahb {
	22	compatible = "simple-bus";
	23	#address-cells = <1>;
	24	#size-cells = <1>;
	25	ranges;
	26
74dc3cd3 CLG	27	fmc: flash-controller@1e620000 {
	28	reg = < 0x1e620000 0x94
	29	0x20000000 0x02000000 >;
	30	#address-cells = <1>;
	31	#size-cells = <0>;
	32	compatible = "aspeed,ast2400-fmc";
	33	status = "disabled";
	34	interrupts = <19>;
	35	flash@0 {
	36	reg = < 0 >;
	37	compatible = "jedec,spi-nor";
	38	status = "disabled";
	39	};
	40	};
	41
	42	spi: flash-controller@1e630000 {
	43	reg = < 0x1e630000 0x18
	44	0x30000000 0x02000000 >;
	45	#address-cells = <1>;
	46	#size-cells = <0>;
	47	compatible = "aspeed,ast2400-spi";
	48	status = "disabled";
	49	flash@0 {
	50	reg = < 0 >;
	51	compatible = "jedec,spi-nor";
	52	status = "disabled";
	53	};
	54	};
	55
d44a1138 JS	56	vic: interrupt-controller@1e6c0080 {
	57	compatible = "aspeed,ast2400-vic";
	58	interrupt-controller;
	59	#interrupt-cells = <1>;
	60	valid-sources = <0xffffffff 0x0007ffff>;
	61	reg = <0x1e6c0080 0x80>;
	62	};
	63
34ea5c9d JS	64	mac0: ethernet@1e660000 {
	65	compatible = "faraday,ftgmac100";
	66	reg = <0x1e660000 0x180>;
	67	interrupts = <2>;
	68	no-hw-checksum;
	69	status = "disabled";
	70	};
	71
	72	mac1: ethernet@1e680000 {
	73	compatible = "faraday,ftgmac100";
	74	reg = <0x1e680000 0x180>;
	75	interrupts = <3>;
	76	no-hw-checksum;
	77	status = "disabled";
	78	};
	79
d44a1138 JS	80	apb {
	81	compatible = "simple-bus";
	82	#address-cells = <1>;
	83	#size-cells = <1>;
	84	ranges;
	85
d9072279 AJ	86	syscon: syscon@1e6e2000 {
	87	compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
	88	reg = <0x1e6e2000 0x1a8>;
491bdcfa JS	89	#address-cells = <1>;
	90	#size-cells = <0>;
	91
	92	clk_clkin: clk_clkin {
	93	#clock-cells = <0>;
	94	compatible = "fixed-clock";
	95	clock-frequency = <48000000>;
	96	};
	97
	98	clk_hpll: clk_hpll@70 {
	99	#clock-cells = <0>;
	100	compatible = "aspeed,g4-hpll-clock", "fixed-clock";
	101	reg = <0x70>;
	102	clocks = <&clk_clkin>;
	103	clock-frequency = <384000000>;
	104	};
	105
	106	clk_ahb: clk_ahb@70 {
	107	#clock-cells = <0>;
	108	compatible = "aspeed,g4-ahb-clock", "fixed-clock";
	109	reg = <0x70>;
	110	clocks = <&clk_hpll>;
	111	clock-frequency = <192000000>;
	112	};
	113
	114	clk_apb: clk_apb@08 {
	115	#clock-cells = <0>;
	116	compatible = "aspeed,g4-apb-clock", "fixed-clock";
	117	reg = <0x08>;
	118	clocks = <&clk_hpll>;
	119	clock-frequency = <48000000>;
	120	};
	121
	122	clk_uart: clk_uart@2c{
	123	#clock-cells = <0>;
	124	compatible = "aspeed,g4-uart-clock", "fixed-clock";
	125	reg = <0x2c>;
	126	clock-frequency = <24000000>;
	127	};
d9072279 AJ	128
	129	pinctrl: pinctrl {
	130	compatible = "aspeed,g4-pinctrl";
	131
	132	pinctrl_acpi_default: acpi_default {
	133	function = "ACPI";
	134	groups = "ACPI";
	135	};
	136
	137	pinctrl_adc0_default: adc0_default {
	138	function = "ADC0";
	139	groups = "ADC0";
	140	};
	141
	142	pinctrl_adc1_default: adc1_default {
	143	function = "ADC1";
	144	groups = "ADC1";
	145	};
	146
	147	pinctrl_adc10_default: adc10_default {
	148	function = "ADC10";
	149	groups = "ADC10";
	150	};
	151
	152	pinctrl_adc11_default: adc11_default {
	153	function = "ADC11";
	154	groups = "ADC11";
	155	};
	156
	157	pinctrl_adc12_default: adc12_default {
	158	function = "ADC12";
	159	groups = "ADC12";
	160	};
	161
	162	pinctrl_adc13_default: adc13_default {
	163	function = "ADC13";
	164	groups = "ADC13";
	165	};
	166
	167	pinctrl_adc14_default: adc14_default {
	168	function = "ADC14";
	169	groups = "ADC14";
	170	};
	171
	172	pinctrl_adc15_default: adc15_default {
	173	function = "ADC15";
	174	groups = "ADC15";
	175	};
	176
	177	pinctrl_adc2_default: adc2_default {
	178	function = "ADC2";
	179	groups = "ADC2";
	180	};
	181
	182	pinctrl_adc3_default: adc3_default {
	183	function = "ADC3";
	184	groups = "ADC3";
	185	};
	186
	187	pinctrl_adc4_default: adc4_default {
	188	function = "ADC4";
	189	groups = "ADC4";
	190	};
	191
192	pinctrl_adc5_default: adc5_default {
193	function = "ADC5";
194	groups = "ADC5";
195	};
196
197	pinctrl_adc6_default: adc6_default {
198	function = "ADC6";
199	groups = "ADC6";
200	};
201
202	pinctrl_adc7_default: adc7_default {
203	function = "ADC7";
204	groups = "ADC7";
205	};
206
207	pinctrl_adc8_default: adc8_default {
208	function = "ADC8";
209	groups = "ADC8";
210	};
211
212	pinctrl_adc9_default: adc9_default {
213	function = "ADC9";
214	groups = "ADC9";
215	};
216
217	pinctrl_bmcint_default: bmcint_default {
218	function = "BMCINT";
219	groups = "BMCINT";
220	};
221
222	pinctrl_ddcclk_default: ddcclk_default {
223	function = "DDCCLK";
224	groups = "DDCCLK";
225	};
226
227	pinctrl_ddcdat_default: ddcdat_default {
228	function = "DDCDAT";
229	groups = "DDCDAT";
230	};
231
232	pinctrl_extrst_default: extrst_default {
233	function = "EXTRST";
234	groups = "EXTRST";
235	};
236
237	pinctrl_flack_default: flack_default {
238	function = "FLACK";
239	groups = "FLACK";
240	};
241
242	pinctrl_flbusy_default: flbusy_default {
243	function = "FLBUSY";
244	groups = "FLBUSY";
245	};
246
247	pinctrl_flwp_default: flwp_default {
248	function = "FLWP";
249	groups = "FLWP";
250	};
251
252	pinctrl_gpid_default: gpid_default {
253	function = "GPID";
254	groups = "GPID";
255	};
256
257	pinctrl_gpid0_default: gpid0_default {
258	function = "GPID0";
259	groups = "GPID0";
260	};
261
262	pinctrl_gpid2_default: gpid2_default {
263	function = "GPID2";
264	groups = "GPID2";
265	};
266
267	pinctrl_gpid4_default: gpid4_default {
268	function = "GPID4";
269	groups = "GPID4";
270	};
271
272	pinctrl_gpid6_default: gpid6_default {
273	function = "GPID6";
274	groups = "GPID6";
275	};
276
277	pinctrl_gpie0_default: gpie0_default {
278	function = "GPIE0";
279	groups = "GPIE0";
280	};
281
282	pinctrl_gpie2_default: gpie2_default {
283	function = "GPIE2";
284	groups = "GPIE2";
285	};
286
287	pinctrl_gpie4_default: gpie4_default {
288	function = "GPIE4";
289	groups = "GPIE4";
290	};
291
292	pinctrl_gpie6_default: gpie6_default {
293	function = "GPIE6";
294	groups = "GPIE6";
295	};
296
297	pinctrl_i2c10_default: i2c10_default {
298	function = "I2C10";
299	groups = "I2C10";
300	};
301
302	pinctrl_i2c11_default: i2c11_default {
303	function = "I2C11";
304	groups = "I2C11";
305	};
306
307	pinctrl_i2c12_default: i2c12_default {
308	function = "I2C12";
309	groups = "I2C12";
310	};
311
312	pinctrl_i2c13_default: i2c13_default {
313	function = "I2C13";
314	groups = "I2C13";
315	};
316
317	pinctrl_i2c14_default: i2c14_default {
318	function = "I2C14";
319	groups = "I2C14";
320	};
321
322	pinctrl_i2c3_default: i2c3_default {
323	function = "I2C3";
324	groups = "I2C3";
325	};
326
327	pinctrl_i2c4_default: i2c4_default {
328	function = "I2C4";
329	groups = "I2C4";
330	};
331
332	pinctrl_i2c5_default: i2c5_default {
333	function = "I2C5";
334	groups = "I2C5";
335	};
336
337	pinctrl_i2c6_default: i2c6_default {
338	function = "I2C6";
339	groups = "I2C6";
340	};
341
342	pinctrl_i2c7_default: i2c7_default {
343	function = "I2C7";
344	groups = "I2C7";
345	};
346
347	pinctrl_i2c8_default: i2c8_default {
348	function = "I2C8";
349	groups = "I2C8";
350	};
351
352	pinctrl_i2c9_default: i2c9_default {
353	function = "I2C9";
354	groups = "I2C9";
355	};
356
357	pinctrl_lpcpd_default: lpcpd_default {
358	function = "LPCPD";
359	groups = "LPCPD";
360	};
361
362	pinctrl_lpcpme_default: lpcpme_default {
363	function = "LPCPME";
364	groups = "LPCPME";
365	};
366
367	pinctrl_lpcrst_default: lpcrst_default {
368	function = "LPCRST";
369	groups = "LPCRST";
370	};
371
372	pinctrl_lpcsmi_default: lpcsmi_default {
373	function = "LPCSMI";
374	groups = "LPCSMI";
375	};
376
377	pinctrl_mac1link_default: mac1link_default {
378	function = "MAC1LINK";
379	groups = "MAC1LINK";
380	};
381
382	pinctrl_mac2link_default: mac2link_default {
383	function = "MAC2LINK";
384	groups = "MAC2LINK";
385	};
386
387	pinctrl_mdio1_default: mdio1_default {
388	function = "MDIO1";
389	groups = "MDIO1";
390	};
391
392	pinctrl_mdio2_default: mdio2_default {
393	function = "MDIO2";
394	groups = "MDIO2";
395	};
396
397	pinctrl_ncts1_default: ncts1_default {
398	function = "NCTS1";
399	groups = "NCTS1";
400	};
401
402	pinctrl_ncts2_default: ncts2_default {
403	function = "NCTS2";
404	groups = "NCTS2";
405	};
406
407	pinctrl_ncts3_default: ncts3_default {
408	function = "NCTS3";
409	groups = "NCTS3";
410	};
411
412	pinctrl_ncts4_default: ncts4_default {
413	function = "NCTS4";
414	groups = "NCTS4";
415	};
416
417	pinctrl_ndcd1_default: ndcd1_default {
418	function = "NDCD1";
419	groups = "NDCD1";
420	};
421
422	pinctrl_ndcd2_default: ndcd2_default {
423	function = "NDCD2";
424	groups = "NDCD2";
425	};
426
427	pinctrl_ndcd3_default: ndcd3_default {
428	function = "NDCD3";
429	groups = "NDCD3";
430	};
431
432	pinctrl_ndcd4_default: ndcd4_default {
433	function = "NDCD4";
434	groups = "NDCD4";
435	};
436
437	pinctrl_ndsr1_default: ndsr1_default {
438	function = "NDSR1";
439	groups = "NDSR1";
440	};
441
442	pinctrl_ndsr2_default: ndsr2_default {
443	function = "NDSR2";
444	groups = "NDSR2";
445	};
446
447	pinctrl_ndsr3_default: ndsr3_default {
448	function = "NDSR3";
449	groups = "NDSR3";
450	};
451
452	pinctrl_ndsr4_default: ndsr4_default {
453	function = "NDSR4";
454	groups = "NDSR4";
455	};
456
457	pinctrl_ndtr1_default: ndtr1_default {
458	function = "NDTR1";
459	groups = "NDTR1";
460	};
461
462	pinctrl_ndtr2_default: ndtr2_default {
463	function = "NDTR2";
464	groups = "NDTR2";
465	};
466
467	pinctrl_ndtr3_default: ndtr3_default {
468	function = "NDTR3";
469	groups = "NDTR3";
470	};
471
472	pinctrl_ndtr4_default: ndtr4_default {
473	function = "NDTR4";
474	groups = "NDTR4";
475	};
476
477	pinctrl_ndts4_default: ndts4_default {
478	function = "NDTS4";
479	groups = "NDTS4";
480	};
481
482	pinctrl_nri1_default: nri1_default {
483	function = "NRI1";
484	groups = "NRI1";
485	};
486
487	pinctrl_nri2_default: nri2_default {
488	function = "NRI2";
489	groups = "NRI2";
490	};
491
492	pinctrl_nri3_default: nri3_default {
493	function = "NRI3";
494	groups = "NRI3";
495	};
496
497	pinctrl_nri4_default: nri4_default {
498	function = "NRI4";
499	groups = "NRI4";
500	};
501
502	pinctrl_nrts1_default: nrts1_default {
503	function = "NRTS1";
504	groups = "NRTS1";
505	};
506
507	pinctrl_nrts2_default: nrts2_default {
508	function = "NRTS2";
509	groups = "NRTS2";
510	};
511
512	pinctrl_nrts3_default: nrts3_default {
513	function = "NRTS3";
514	groups = "NRTS3";
515	};
516
517	pinctrl_oscclk_default: oscclk_default {
518	function = "OSCCLK";
519	groups = "OSCCLK";
520	};
521
522	pinctrl_pwm0_default: pwm0_default {
523	function = "PWM0";
524	groups = "PWM0";
525	};
526
527	pinctrl_pwm1_default: pwm1_default {
528	function = "PWM1";
529	groups = "PWM1";
530	};
531
532	pinctrl_pwm2_default: pwm2_default {
533	function = "PWM2";
534	groups = "PWM2";
535	};
536
537	pinctrl_pwm3_default: pwm3_default {
538	function = "PWM3";
539	groups = "PWM3";
540	};
541
542	pinctrl_pwm4_default: pwm4_default {
543	function = "PWM4";
544	groups = "PWM4";
545	};
546
547	pinctrl_pwm5_default: pwm5_default {
548	function = "PWM5";
549	groups = "PWM5";
550	};
551
552	pinctrl_pwm6_default: pwm6_default {
553	function = "PWM6";
554	groups = "PWM6";
555	};
556
557	pinctrl_pwm7_default: pwm7_default {
558	function = "PWM7";
559	groups = "PWM7";
560	};
561
562	pinctrl_rgmii1_default: rgmii1_default {
563	function = "RGMII1";
564	groups = "RGMII1";
565	};
566
567	pinctrl_rgmii2_default: rgmii2_default {
568	function = "RGMII2";
569	groups = "RGMII2";
570	};
571
572	pinctrl_rmii1_default: rmii1_default {
573	function = "RMII1";
574	groups = "RMII1";
575	};
576
577	pinctrl_rmii2_default: rmii2_default {
578	function = "RMII2";
579	groups = "RMII2";
580	};
581
582	pinctrl_rom16_default: rom16_default {
583	function = "ROM16";
584	groups = "ROM16";
585	};
586
587	pinctrl_rom8_default: rom8_default {
588	function = "ROM8";
589	groups = "ROM8";
590	};
591
592	pinctrl_romcs1_default: romcs1_default {
593	function = "ROMCS1";
594	groups = "ROMCS1";
595	};
596
597	pinctrl_romcs2_default: romcs2_default {
598	function = "ROMCS2";
599	groups = "ROMCS2";
600	};
601
602	pinctrl_romcs3_default: romcs3_default {
603	function = "ROMCS3";
604	groups = "ROMCS3";
605	};
606
607	pinctrl_romcs4_default: romcs4_default {
608	function = "ROMCS4";
609	groups = "ROMCS4";
610	};
611
612	pinctrl_rxd1_default: rxd1_default {
613	function = "RXD1";
614	groups = "RXD1";
615	};
616
617	pinctrl_rxd2_default: rxd2_default {
618	function = "RXD2";
619	groups = "RXD2";
620	};
621
622	pinctrl_rxd3_default: rxd3_default {
623	function = "RXD3";
624	groups = "RXD3";
625	};
626
627	pinctrl_rxd4_default: rxd4_default {
628	function = "RXD4";
629	groups = "RXD4";
630	};
631
632	pinctrl_salt1_default: salt1_default {
633	function = "SALT1";
634	groups = "SALT1";
635	};
636
637	pinctrl_salt2_default: salt2_default {
638	function = "SALT2";
639	groups = "SALT2";
640	};
641
642	pinctrl_salt3_default: salt3_default {
643	function = "SALT3";
644	groups = "SALT3";
645	};
646
647	pinctrl_salt4_default: salt4_default {
648	function = "SALT4";
649	groups = "SALT4";
650	};
651
652	pinctrl_sd1_default: sd1_default {
653	function = "SD1";
654	groups = "SD1";
655	};
656
657	pinctrl_sd2_default: sd2_default {
658	function = "SD2";
659	groups = "SD2";
660	};
661
662	pinctrl_sgpmck_default: sgpmck_default {
663	function = "SGPMCK";
664	groups = "SGPMCK";
665	};
666
667	pinctrl_sgpmi_default: sgpmi_default {
668	function = "SGPMI";
669	groups = "SGPMI";
670	};
671
672	pinctrl_sgpmld_default: sgpmld_default {
673	function = "SGPMLD";
674	groups = "SGPMLD";
675	};
676
677	pinctrl_sgpmo_default: sgpmo_default {
678	function = "SGPMO";
679	groups = "SGPMO";
680	};
681
682	pinctrl_sgpsck_default: sgpsck_default {
683	function = "SGPSCK";
684	groups = "SGPSCK";
685	};
686
687	pinctrl_sgpsi0_default: sgpsi0_default {
688	function = "SGPSI0";
689	groups = "SGPSI0";
690	};
691
692	pinctrl_sgpsi1_default: sgpsi1_default {
693	function = "SGPSI1";
694	groups = "SGPSI1";
695	};
696
697	pinctrl_sgpsld_default: sgpsld_default {
698	function = "SGPSLD";
699	groups = "SGPSLD";
700	};
701
702	pinctrl_sioonctrl_default: sioonctrl_default {
703	function = "SIOONCTRL";
704	groups = "SIOONCTRL";
705	};
706
707	pinctrl_siopbi_default: siopbi_default {
708	function = "SIOPBI";
709	groups = "SIOPBI";
710	};
711
712	pinctrl_siopbo_default: siopbo_default {
713	function = "SIOPBO";
714	groups = "SIOPBO";
715	};
716
717	pinctrl_siopwreq_default: siopwreq_default {
718	function = "SIOPWREQ";
719	groups = "SIOPWREQ";
720	};
721
722	pinctrl_siopwrgd_default: siopwrgd_default {
723	function = "SIOPWRGD";
724	groups = "SIOPWRGD";
725	};
726
727	pinctrl_sios3_default: sios3_default {
728	function = "SIOS3";
729	groups = "SIOS3";
730	};
731
732	pinctrl_sios5_default: sios5_default {
733	function = "SIOS5";
734	groups = "SIOS5";
735	};
736
737	pinctrl_siosci_default: siosci_default {
738	function = "SIOSCI";
739	groups = "SIOSCI";
740	};
741
742	pinctrl_spi1_default: spi1_default {
743	function = "SPI1";
744	groups = "SPI1";
745	};
746
747	pinctrl_spi1debug_default: spi1debug_default {
748	function = "SPI1DEBUG";
749	groups = "SPI1DEBUG";
750	};
751
752	pinctrl_spi1passthru_default: spi1passthru_default {
753	function = "SPI1PASSTHRU";
754	groups = "SPI1PASSTHRU";
755	};
756
757	pinctrl_spics1_default: spics1_default {
758	function = "SPICS1";
759	groups = "SPICS1";
760	};
761
762	pinctrl_timer3_default: timer3_default {
763	function = "TIMER3";
764	groups = "TIMER3";
765	};
766
767	pinctrl_timer4_default: timer4_default {
768	function = "TIMER4";
769	groups = "TIMER4";
770	};
771
772	pinctrl_timer5_default: timer5_default {
773	function = "TIMER5";
774	groups = "TIMER5";
775	};
776
777	pinctrl_timer6_default: timer6_default {
778	function = "TIMER6";
779	groups = "TIMER6";
780	};
781
782	pinctrl_timer7_default: timer7_default {
783	function = "TIMER7";
784	groups = "TIMER7";
785	};
786
787	pinctrl_timer8_default: timer8_default {
788	function = "TIMER8";
789	groups = "TIMER8";
790	};
791
792	pinctrl_txd1_default: txd1_default {
793	function = "TXD1";
794	groups = "TXD1";
795	};
796
797	pinctrl_txd2_default: txd2_default {
798	function = "TXD2";
799	groups = "TXD2";
800	};
801
802	pinctrl_txd3_default: txd3_default {
803	function = "TXD3";
804	groups = "TXD3";
805	};
806
807	pinctrl_txd4_default: txd4_default {
808	function = "TXD4";
809	groups = "TXD4";
810	};
811
812	pinctrl_uart6_default: uart6_default {
813	function = "UART6";
814	groups = "UART6";
815	};
816
817	pinctrl_usbcki_default: usbcki_default {
818	function = "USBCKI";
819	groups = "USBCKI";
820	};
821
822	pinctrl_vgabios_rom_default: vgabios_rom_default {
823	function = "VGABIOS_ROM";
824	groups = "VGABIOS_ROM";
825	};
826
827	pinctrl_vgahs_default: vgahs_default {
828	function = "VGAHS";
829	groups = "VGAHS";
830	};
831
832	pinctrl_vgavs_default: vgavs_default {
833	function = "VGAVS";
834	groups = "VGAVS";
835	};
836
837	pinctrl_vpi18_default: vpi18_default {
838	function = "VPI18";
839	groups = "VPI18";
840	};
841
842	pinctrl_vpi24_default: vpi24_default {
843	function = "VPI24";
844	groups = "VPI24";
845	};
846
847	pinctrl_vpi30_default: vpi30_default {
848	function = "VPI30";
849	groups = "VPI30";
850	};
851
852	pinctrl_vpo12_default: vpo12_default {
853	function = "VPO12";
854	groups = "VPO12";
855	};
856
857	pinctrl_vpo24_default: vpo24_default {
858	function = "VPO24";
859	groups = "VPO24";
860	};
861
862	pinctrl_wdtrst1_default: wdtrst1_default {
863	function = "WDTRST1";
864	groups = "WDTRST1";
865	};
866
867	pinctrl_wdtrst2_default: wdtrst2_default {
868	function = "WDTRST2";
869	groups = "WDTRST2";
870	};
871
872	};
873	};
874
d44a1138 JS	875	sram@1e720000 {
	876	compatible = "mmio-sram";
	877	reg = <0x1e720000 0x8000>; // 32K
	878	};
	879
09955007 AJ	880	gpio: gpio@1e780000 {
	881	#gpio-cells = <2>;
	882	gpio-controller;
	883	compatible = "aspeed,ast2400-gpio";
	884	reg = <0x1e780000 0x1000>;
	885	interrupts = <20>;
	886	gpio-ranges = <&pinctrl 0 0 220>;
	887	interrupt-controller;
	888	};
	889
d44a1138 JS	890	timer: timer@1e782000 {
	891	compatible = "aspeed,ast2400-timer";
	892	reg = <0x1e782000 0x90>;
	893	// The moxart_timer driver registers only one
	894	// interrupt and assumes it's for timer 1
	895	//interrupts = <16 17 18 35 36 37 38 39>;
	896	interrupts = <16>;
	897	clocks = <&clk_apb>;
	898	};
	899
	900	wdt1: wdt@1e785000 {
	901	compatible = "aspeed,wdt";
	902	reg = <0x1e785000 0x1c>;
	903	interrupts = <27>;
	904	};
	905
	906	wdt2: wdt@1e785020 {
	907	compatible = "aspeed,wdt";
	908	reg = <0x1e785020 0x1c>;
	909	interrupts = <27>;
	910	clocks = <&clk_apb>;
	911	status = "disabled";
	912	};
	913
	914	uart1: serial@1e783000 {
	915	compatible = "ns16550a";
	916	reg = <0x1e783000 0x1000>;
	917	reg-shift = <2>;
	918	interrupts = <9>;
	919	clocks = <&clk_uart>;
	920	no-loopback-test;
	921	status = "disabled";
	922	};
	923
	924	uart2: serial@1e78d000 {
	925	compatible = "ns16550a";
	926	reg = <0x1e78d000 0x1000>;
	927	reg-shift = <2>;
	928	interrupts = <32>;
	929	clocks = <&clk_uart>;
	930	no-loopback-test;
	931	status = "disabled";
	932	};
	933
	934	uart3: serial@1e78e000 {
	935	compatible = "ns16550a";
	936	reg = <0x1e78e000 0x1000>;
	937	reg-shift = <2>;
	938	interrupts = <33>;
	939	clocks = <&clk_uart>;
	940	no-loopback-test;
	941	status = "disabled";
	942	};
	943
	944	uart4: serial@1e78f000 {
	945	compatible = "ns16550a";
	946	reg = <0x1e78f000 0x1000>;
	947	reg-shift = <2>;
	948	interrupts = <34>;
	949	clocks = <&clk_uart>;
	950	no-loopback-test;
	951	status = "disabled";
	952	};
	953
954	uart5: serial@1e784000 {
955	compatible = "ns16550a";
956	reg = <0x1e784000 0x1000>;
957	reg-shift = <2>;
958	interrupts = <10>;
959	clocks = <&clk_uart>;
960	current-speed = <38400>;
961	no-loopback-test;
962	status = "disabled";
963	};
964
965	uart6: serial@1e787000 {
966	compatible = "ns16550a";
967	reg = <0x1e787000 0x1000>;
968	reg-shift = <2>;
969	interrupts = <10>;
970	clocks = <&clk_uart>;
971	no-loopback-test;
972	status = "disabled";
973	};
974	};
975	};
976	};