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Merge tag 'soc-dt-late-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[linux-block.git] / arch / arm / boot / dts / aspeed / aspeed-bmc-ibm-system1.dts
CommitLineData
e83c420a
AG		 1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2023 IBM Corp.
3/dts-v1/;
4
5#include "aspeed-g6.dtsi"
6#include <dt-bindings/gpio/aspeed-gpio.h>
7#include <dt-bindings/i2c/i2c.h>
8#include <dt-bindings/leds/leds-pca955x.h>
9
10/ {
11 model = "System1";
12 compatible = "ibm,system1-bmc", "aspeed,ast2600";
13
14 aliases {
15 i2c16 = &i2c8mux1chn0;
16 i2c17 = &i2c8mux1chn1;
17 i2c18 = &i2c8mux1chn2;
18 i2c19 = &i2c8mux1chn3;
19 i2c20 = &i2c8mux1chn4;
20 i2c21 = &i2c8mux1chn5;
21 i2c22 = &i2c8mux1chn6;
22 i2c23 = &i2c8mux1chn7;
23 i2c24 = &i2c3mux0chn0;
24 i2c25 = &i2c3mux0chn1;
25 i2c26 = &i2c3mux0chn2;
26 i2c27 = &i2c3mux0chn3;
27 i2c28 = &i2c3mux0chn4;
28 i2c29 = &i2c3mux0chn5;
29 i2c30 = &i2c3mux0chn6;
30 i2c31 = &i2c3mux0chn7;
31 i2c32 = &i2c6mux0chn0;
32 i2c33 = &i2c6mux0chn1;
33 i2c34 = &i2c6mux0chn2;
34 i2c35 = &i2c6mux0chn3;
35 i2c36 = &i2c6mux0chn4;
36 i2c37 = &i2c6mux0chn5;
37 i2c38 = &i2c6mux0chn6;
38 i2c39 = &i2c6mux0chn7;
39 i2c40 = &i2c7mux0chn0;
40 i2c41 = &i2c7mux0chn1;
41 i2c42 = &i2c7mux0chn2;
42 i2c43 = &i2c7mux0chn3;
43 i2c44 = &i2c7mux0chn4;
44 i2c45 = &i2c7mux0chn5;
45 i2c46 = &i2c7mux0chn6;
46 i2c47 = &i2c7mux0chn7;
47 i2c48 = &i2c8mux0chn0;
48 i2c49 = &i2c8mux0chn1;
49 i2c50 = &i2c8mux0chn2;
50 i2c51 = &i2c8mux0chn3;
51 i2c52 = &i2c8mux0chn4;
52 i2c53 = &i2c8mux0chn5;
53 i2c54 = &i2c8mux0chn6;
54 i2c55 = &i2c8mux0chn7;
55 i2c56 = &i2c14mux0chn0;
56 i2c57 = &i2c14mux0chn1;
57 i2c58 = &i2c14mux0chn2;
58 i2c59 = &i2c14mux0chn3;
59 i2c60 = &i2c14mux0chn4;
60 i2c61 = &i2c14mux0chn5;
61 i2c62 = &i2c14mux0chn6;
62 i2c63 = &i2c14mux0chn7;
63 i2c64 = &i2c15mux0chn0;
64 i2c65 = &i2c15mux0chn1;
65 i2c66 = &i2c15mux0chn2;
66 i2c67 = &i2c15mux0chn3;
67 i2c68 = &i2c15mux0chn4;
68 i2c69 = &i2c15mux0chn5;
69 i2c70 = &i2c15mux0chn6;
70 i2c71 = &i2c15mux0chn7;
71 };
72
73 chosen {
74 stdout-path = "uart5:115200n8";
75 };
76
77 memory@80000000 {
78 device_type = "memory";
79 reg = <0x80000000 0x40000000>;
80 };
81
82 reserved-memory {
83 #address-cells = <1>;
84 #size-cells = <1>;
85 ranges;
86
87 eventlog: tcg-event-log@b3d00000 {
88 no-map;
89 reg = <0xb3d00000 0x100000>;
90 };
91
92 ramoops@b3e00000 {
93 compatible = "ramoops";
94 reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */
95 record-size = <0x8000>;
96 console-size = <0x8000>;
97 ftrace-size = <0x8000>;
98 pmsg-size = <0x8000>;
99 max-reason = <3>; /* KMSG_DUMP_EMERG */
100 };
101
102 /* LPC FW cycle bridge region requires natural alignment */
103 flash_memory: region@b4000000 {
104 no-map;
105 reg = <0xb4000000 0x04000000>; /* 64M */
106 };
107
108 /* VGA region is dictated by hardware strapping */
109 vga_memory: region@bf000000 {
110 no-map;
111 compatible = "shared-dma-pool";
112 reg = <0xbf000000 0x01000000>; /* 16M */
113 };
114 };
115
116 leds {
117 compatible = "gpio-leds";
118
119 led-0 {
120 gpios = <&gpio0 ASPEED_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
121 };
122
123 led-1 {
124 gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_HIGH>;
125 };
126
127 led-2 {
128 gpios = <&gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
129 };
130
131 led-3 {
132 gpios = <&gpio0 ASPEED_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
133 };
134
135 led-4 {
136 gpios = <&pca3 5 GPIO_ACTIVE_LOW>;
137 };
138
139 led-5 {
140 gpios = <&pca3 6 GPIO_ACTIVE_LOW>;
141 };
142
143 led-6 {
144 gpios = <&pca3 7 GPIO_ACTIVE_LOW>;
145 };
146
147 led-7 {
148 gpios = <&pca3 8 GPIO_ACTIVE_LOW>;
149 };
150
151 led-8 {
152 gpios = <&pca3 9 GPIO_ACTIVE_LOW>;
153 };
154
155 led-9 {
156 gpios = <&pca3 10 GPIO_ACTIVE_LOW>;
157 };
158
159 led-a {
160 gpios = <&pca3 11 GPIO_ACTIVE_LOW>;
161 };
162
163 led-b {
164 gpios = <&pca4 4 GPIO_ACTIVE_HIGH>;
165 };
166
167 led-c {
168 gpios = <&pca4 5 GPIO_ACTIVE_HIGH>;
169 };
170
171 led-d {
172 gpios = <&pca4 6 GPIO_ACTIVE_HIGH>;
173 };
174
175 led-e {
176 gpios = <&pca4 7 GPIO_ACTIVE_HIGH>;
177 };
178 };
179
180 gpio-keys-polled {
181 compatible = "gpio-keys-polled";
182 poll-interval = <1000>;
183
184 event-nvme0-presence {
185 label = "nvme0-presence";
186 gpios = <&pca4 0 GPIO_ACTIVE_LOW>;
187 linux,code = <0>;
188 };
189
190 event-nvme1-presence {
191 label = "nvme1-presence";
192 gpios = <&pca4 1 GPIO_ACTIVE_LOW>;
193 linux,code = <1>;
194 };
195
196 event-nvme2-presence {
197 label = "nvme2-presence";
198 gpios = <&pca4 2 GPIO_ACTIVE_LOW>;
199 linux,code = <2>;
200 };
201
202 event-nvme3-presence {
203 label = "nvme3-presence";
204 gpios = <&pca4 3 GPIO_ACTIVE_LOW>;
205 linux,code = <3>;
206 };
207 };
208
209 iio-hwmon {
210 compatible = "iio-hwmon";
211 io-channels = <&p12v_vd 0>, <&p5v_aux_vd 0>,
212 <&p5v_bmc_aux_vd 0>, <&p3v3_aux_vd 0>,
213 <&p3v3_bmc_aux_vd 0>, <&p1v8_bmc_aux_vd 0>,
214 <&adc1 4>, <&adc0 2>, <&adc1 0>,
215 <&p2v5_aux_vd 0>, <&adc1 7>;
216 };
217
218 p12v_vd: voltage-divider1 {
219 compatible = "voltage-divider";
220 io-channels = <&adc1 3>;
221 #io-channel-cells = <1>;
222
223 /*
224 * Scale the system voltage by 1127/127 to fit the ADC range.
225 * Use small nominator to prevent integer overflow.
226 */
227 output-ohms = <15>;
228 full-ohms = <133>;
229 };
230
231 p5v_aux_vd: voltage-divider2 {
232 compatible = "voltage-divider";
233 io-channels = <&adc1 5>;
234 #io-channel-cells = <1>;
235
236 /*
237 * Scale the system voltage by 1365/365 to fit the ADC range.
238 * Use small nominator to prevent integer overflow.
239 */
240 output-ohms = <50>;
241 full-ohms = <187>;
242 };
243
244 p5v_bmc_aux_vd: voltage-divider3 {
245 compatible = "voltage-divider";
246 io-channels = <&adc0 3>;
247 #io-channel-cells = <1>;
248
249 /*
250 * Scale the system voltage by 1365/365 to fit the ADC range.
251 * Use small nominator to prevent integer overflow.
252 */
253 output-ohms = <50>;
254 full-ohms = <187>;
255 };
256
257 p3v3_aux_vd: voltage-divider4 {
258 compatible = "voltage-divider";
259 io-channels = <&adc1 2>;
260 #io-channel-cells = <1>;
261
262 /*
263 * Scale the system voltage by 1698/698 to fit the ADC range.
264 * Use small nominator to prevent integer overflow.
265 */
266 output-ohms = <14>;
267 full-ohms = <34>;
268 };
269
270 p3v3_bmc_aux_vd: voltage-divider5 {
271 compatible = "voltage-divider";
272 io-channels = <&adc0 7>;
273 #io-channel-cells = <1>;
274
275 /*
276 * Scale the system voltage by 1698/698 to fit the ADC range.
277 * Use small nominator to prevent integer overflow.
278 */
279 output-ohms = <14>;
280 full-ohms = <34>;
281 };
282
283 p1v8_bmc_aux_vd: voltage-divider6 {
284 compatible = "voltage-divider";
285 io-channels = <&adc0 6>;
286 #io-channel-cells = <1>;
287
288 /*
289 * Scale the system voltage by 4000/3000 to fit the ADC range.
290 * Use small nominator to prevent integer overflow.
291 */
292 output-ohms = <3>;
293 full-ohms = <4>;
294 };
295
296 p2v5_aux_vd: voltage-divider7 {
297 compatible = "voltage-divider";
298 io-channels = <&adc1 1>;
299 #io-channel-cells = <1>;
300
301 /*
302 * Scale the system voltage by 2100/1100 to fit the ADC range.
303 * Use small nominator to prevent integer overflow.
304 */
305 output-ohms = <11>;
306 full-ohms = <21>;
307 };
308
309 p1v8_bmc_aux: fixedregulator-p1v8-bmc-aux {
310 compatible = "regulator-fixed";
311 regulator-name = "p1v8_bmc_aux";
312 regulator-min-microvolt = <1800000>;
313 regulator-max-microvolt = <1800000>;
314 regulator-always-on;
315 };
316};
317
318&adc0 {
319 status = "okay";
320 vref-supply = <&p1v8_bmc_aux>;
321
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_adc0_default
324 &pinctrl_adc1_default
325 &pinctrl_adc2_default
326 &pinctrl_adc3_default
327 &pinctrl_adc4_default
328 &pinctrl_adc5_default
329 &pinctrl_adc6_default
330 &pinctrl_adc7_default>;
331};
332
333&adc1 {
334 status = "okay";
335 vref-supply = <&p1v8_bmc_aux>;
336 aspeed,battery-sensing;
337
338 aspeed,int-vref-microvolt = <2500000>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&pinctrl_adc8_default
341 &pinctrl_adc9_default
342 &pinctrl_adc10_default
343 &pinctrl_adc11_default
344 &pinctrl_adc12_default
345 &pinctrl_adc13_default
346 &pinctrl_adc14_default
347 &pinctrl_adc15_default>;
348};
349
350&ehci1 {
351 status = "okay";
352};
353
354&uhci {
355 status = "okay";
356};
357
358&gpio0 {
359 gpio-line-names =
360 /*A0-A7*/ "","","","","","","","",
361 /*B0-B7*/ "","","","","bmc-tpm-reset","","","",
362 /*C0-C7*/ "","","","","","","","",
363 /*D0-D7*/ "","","","","","","","",
364 /*E0-E7*/ "","","","","","","","",
365 /*F0-F7*/ "","","","","","","","",
366 /*G0-G7*/ "","","","","","","","",
367 /*H0-H7*/ "","","","","","","","",
368 /*I0-I7*/ "","","","","","","","",
369 /*J0-J7*/ "","","","","","","","",
370 /*K0-K7*/ "","","","","","","","",
371 /*L0-L7*/ "","","","","","","","bmc-ready",
372 /*M0-M7*/ "","","","","","","","",
373 /*N0-N7*/ "","","","","","","","",
374 /*O0-O7*/ "","","","","","","","",
375 /*P0-P7*/ "","","","","","","","bmc-hb",
376 /*Q0-Q7*/ "","","","","","","","",
377 /*R0-R7*/ "","","","","","","","",
378 /*S0-S7*/ "","","","","","","rear-enc-fault0","rear-enc-id0",
379 /*T0-T7*/ "","","","","","","","",
380 /*U0-U7*/ "","","","","","","","",
381 /*V0-V7*/ "","rtc-battery-voltage-read-enable","","power-chassis-control","","","","",
382 /*W0-W7*/ "","","","","","","","",
383 /*X0-X7*/ "","power-chassis-good","","","","","","",
384 /*Y0-Y7*/ "","","","","","","","",
385 /*Z0-Z7*/ "","","","","","","","";
386};
387
388&emmc_controller {
389 status = "okay";
390};
391
392&pinctrl_emmc_default {
393 bias-disable;
394};
395
396&emmc {
397 status = "okay";
398 clk-phase-mmc-hs200 = <180>, <180>;
399};
400
401&ibt {
402 status = "okay";
403};
404
405&uart2 {
406 status = "okay";
407};
408
409&vuart1 {
410 status = "okay";
411};
412
413&vuart2 {
414 status = "okay";
415};
416
417&lpc_ctrl {
418 status = "okay";
419 memory-region = <&flash_memory>;
420};
421
422&mac2 {
423 status = "okay";
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_rmii3_default>;
426 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
427 <&syscon ASPEED_CLK_MAC3RCLK>;
428 clock-names = "MACCLK", "RCLK";
429 use-ncsi;
430};
431
432&mac3 {
433 status = "okay";
434 pinctrl-names = "default";
435 pinctrl-0 = <&pinctrl_rmii4_default>;
436 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>,
437 <&syscon ASPEED_CLK_MAC4RCLK>;
438 clock-names = "MACCLK", "RCLK";
439 use-ncsi;
440};
441
442&wdt1 {
443 aspeed,reset-type = "none";
444 aspeed,external-signal;
445 aspeed,ext-push-pull;
446 aspeed,ext-active-high;
447
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_wdtrst1_default>;
450};
451
452&wdt2 {
453 status = "okay";
454};
455
456&kcs2 {
457 status = "okay";
458 aspeed,lpc-io-reg = <0xca8 0xcac>;
459};
460
461&kcs3 {
462 status = "okay";
463 aspeed,lpc-io-reg = <0xca2>;
464 aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
465};
466
467&i2c0 {
468 status = "okay";
469
470 eeprom@50 {
471 compatible = "atmel,24c64";
472 reg = <0x50>;
473 };
474
475 regulator@60 {
476 compatible = "maxim,max8952";
477 reg = <0x60>;
478
479 max8952,default-mode = <0>;
480 max8952,dvs-mode-microvolt = <1250000>, <1200000>,
481 <1050000>, <950000>;
482 max8952,sync-freq = <0>;
483 max8952,ramp-speed = <0>;
484
485 regulator-name = "VR_v77_1v4";
486 regulator-min-microvolt = <770000>;
487 regulator-max-microvolt = <1400000>;
488 regulator-always-on;
489 regulator-boot-on;
490 };
491};
492
493&i2c1 {
494 status = "okay";
495
496 regulator@42 {
497 compatible = "infineon,ir38263";
498 reg = <0x42>;
499 };
500
501 led-controller@60 {
502 compatible = "nxp,pca9552";
503 reg = <0x60>;
504 #address-cells = <1>;
505 #size-cells = <0>;
506
507 gpio-controller;
508 #gpio-cells = <2>;
509
510 led@0 {
511 label = "nic1-perst";
512 reg = <0>;
513 retain-state-shutdown;
514 default-state = "keep";
515 type = <PCA955X_TYPE_LED>;
516 };
517
518 led@1 {
519 label = "bmc-perst";
520 reg = <1>;
521 retain-state-shutdown;
522 default-state = "keep";
523 type = <PCA955X_TYPE_LED>;
524 };
525
526 led@2 {
527 label = "reset-M2-SSD1-2-perst";
528 reg = <2>;
529 retain-state-shutdown;
530 default-state = "keep";
531 type = <PCA955X_TYPE_LED>;
532 };
533
534 led@3 {
535 label = "pcie-perst1";
536 reg = <3>;
537 retain-state-shutdown;
538 default-state = "keep";
539 type = <PCA955X_TYPE_LED>;
540 };
541
542 led@4 {
543 label = "pcie-perst2";
544 reg = <4>;
545 retain-state-shutdown;
546 default-state = "keep";
547 type = <PCA955X_TYPE_LED>;
548 };
549
550 led@5 {
551 label = "pcie-perst3";
552 reg = <5>;
553 retain-state-shutdown;
554 default-state = "keep";
555 type = <PCA955X_TYPE_LED>;
556 };
557
558 led@6 {
559 label = "pcie-perst4";
560 reg = <6>;
561 retain-state-shutdown;
562 default-state = "keep";
563 type = <PCA955X_TYPE_LED>;
564 };
565
566 led@7 {
567 label = "pcie-perst5";
568 reg = <7>;
569 retain-state-shutdown;
570 default-state = "keep";
571 type = <PCA955X_TYPE_LED>;
572 };
573
574 led@8 {
575 label = "pcie-perst6";
576 reg = <8>;
577 retain-state-shutdown;
578 default-state = "keep";
579 type = <PCA955X_TYPE_LED>;
580 };
581
582 led@9 {
583 label = "pcie-perst7";
584 reg = <9>;
585 retain-state-shutdown;
586 default-state = "keep";
587 type = <PCA955X_TYPE_LED>;
588 };
589
590 led@10 {
591 label = "pcie-perst8";
592 reg = <10>;
593 retain-state-shutdown;
594 default-state = "keep";
595 type = <PCA955X_TYPE_LED>;
596 };
597
598 led@11 {
599 label = "PV-cp0-sw1stk4-perst";
600 reg = <11>;
601 retain-state-shutdown;
602 default-state = "keep";
603 type = <PCA955X_TYPE_LED>;
604 };
605
606 led@12 {
607 label = "PV-cp0-sw1stk5-perst";
608 reg = <12>;
609 retain-state-shutdown;
610 default-state = "keep";
611 type = <PCA955X_TYPE_LED>;
612 };
613
614 led@13 {
615 label = "pe-cp-drv0-perst";
616 reg = <13>;
617 retain-state-shutdown;
618 default-state = "keep";
619 type = <PCA955X_TYPE_LED>;
620 };
621
622 led@14 {
623 label = "pe-cp-drv1-perst";
624 reg = <14>;
625 retain-state-shutdown;
626 default-state = "keep";
627 type = <PCA955X_TYPE_LED>;
628 };
629
630 led@15 {
631 label = "lom-perst";
632 reg = <15>;
633 retain-state-shutdown;
634 default-state = "keep";
635 type = <PCA955X_TYPE_LED>;
636 };
637 };
638
639 gpio@74 {
640 compatible = "nxp,pca9539";
641 reg = <0x74>;
642
643 gpio-controller;
644 #gpio-cells = <2>;
645
646 gpio-line-names =
647 "PLUG_DETECT_PCIE_J101_N",
648 "PLUG_DETECT_PCIE_J102_N",
649 "PLUG_DETECT_PCIE_J103_N",
650 "PLUG_DETECT_PCIE_J104_N",
651 "PLUG_DETECT_PCIE_J105_N",
652 "PLUG_DETECT_PCIE_J106_N",
653 "PLUG_DETECT_PCIE_J107_N",
654 "PLUG_DETECT_PCIE_J108_N",
655 "PLUG_DETECT_M2_SSD1_N",
656 "PLUG_DETECT_NIC1_N",
657 "SEL_SMB_DIMM_CPU0",
658 "presence-ps2",
659 "presence-ps3",
660 "", "",
661 "PWRBRD_PLUG_DETECT2_N";
662 };
663};
664
665&i2c2 {
666 status = "okay";
667
668 power-supply@58 {
669 compatible = "ibm,cffps";
670 reg = <0x58>;
671 };
672
673 power-supply@59 {
674 compatible = "ibm,cffps";
675 reg = <0x59>;
676 };
677
678 power-supply@5a {
679 compatible = "ibm,cffps";
680 reg = <0x5a>;
681 };
682
683 power-supply@5b {
684 compatible = "ibm,cffps";
685 reg = <0x5b>;
686 };
687};
688
689&i2c3 {
690 status = "okay";
691
692 i2c-mux@70 {
693 compatible = "nxp,pca9548";
694 reg = <0x70>;
695 #address-cells = <1>;
696 #size-cells = <0>;
697 i2c-mux-idle-disconnect;
698
699 i2c3mux0chn0: i2c@0 {
700 #address-cells = <1>;
701 #size-cells = <0>;
702 reg = <0>;
703 };
704
705 i2c3mux0chn1: i2c@1 {
706 #address-cells = <1>;
707 #size-cells = <0>;
708 reg = <1>;
709 };
710
711 i2c3mux0chn2: i2c@2 {
712 #address-cells = <1>;
713 #size-cells = <0>;
714 reg = <2>;
715 };
716
717 i2c3mux0chn3: i2c@3 {
718 #address-cells = <1>;
719 #size-cells = <0>;
720 reg = <3>;
721 };
722
723 i2c3mux0chn4: i2c@4 {
724 #address-cells = <1>;
725 #size-cells = <0>;
726 reg = <4>;
727 };
728
729 i2c3mux0chn5: i2c@5 {
730 #address-cells = <1>;
731 #size-cells = <0>;
732 reg = <5>;
733 };
734
735 i2c3mux0chn6: i2c@6 {
736 #address-cells = <1>;
737 #size-cells = <0>;
738 reg = <6>;
739 };
740
741 i2c3mux0chn7: i2c@7 {
742 #address-cells = <1>;
743 #size-cells = <0>;
744 reg = <7>;
745 };
746 };
747};
748
749&i2c4 {
750 status = "okay";
751};
752
753&i2c5 {
754 status = "okay";
755
756 regulator@42 {
757 compatible = "infineon,ir38263";
758 reg = <0x42>;
759 };
760
761 regulator@43 {
762 compatible = "infineon,ir38060";
763 reg = <0x43>;
764 };
765};
766
767&i2c6 {
768 status = "okay";
769
770 fan-controller@52 {
771 compatible = "maxim,max31785a";
772 reg = <0x52>;
773 };
774
775 fan-controller@54 {
776 compatible = "maxim,max31785a";
777 reg = <0x54>;
778 };
779
780 eeprom@55 {
781 compatible = "atmel,24c64";
782 reg = <0x55>;
783 };
784
785 i2c-mux@70 {
786 compatible = "nxp,pca9548";
787 reg = <0x70>;
788 #address-cells = <1>;
789 #size-cells = <0>;
790 i2c-mux-idle-disconnect;
791
792 i2c6mux0chn0: i2c@0 {
793 #address-cells = <1>;
794 #size-cells = <0>;
795 reg = <0>;
796 };
797
798 i2c6mux0chn1: i2c@1 {
799 #address-cells = <1>;
800 #size-cells = <0>;
801 reg = <1>;
802 };
803
804 i2c6mux0chn2: i2c@2 {
805 #address-cells = <1>;
806 #size-cells = <0>;
807 reg = <2>;
808 };
809
810 i2c6mux0chn3: i2c@3 {
811 #address-cells = <1>;
812 #size-cells = <0>;
813 reg = <3>;
814 };
815
816 i2c6mux0chn4: i2c@4 {
817 #address-cells = <1>;
818 #size-cells = <0>;
819 reg = <4>;
820
821 humidity-sensor@40 {
822 compatible = "ti,hdc1080";
823 reg = <0x40>;
824 };
825
826 temperature-sensor@48 {
827 compatible = "ti,tmp275";
828 reg = <0x48>;
829 };
830
831 eeprom@50 {
832 compatible = "atmel,24c32";
833 reg = <0x50>;
834 };
835
836 led-controller@60 {
837 compatible = "nxp,pca9551";
838 reg = <0x60>;
839 #address-cells = <1>;
840 #size-cells = <0>;
841
842 gpio-controller;
843 #gpio-cells = <2>;
844
845 led@0 {
846 label = "enclosure-id-led";
847 reg = <0>;
848 retain-state-shutdown;
849 default-state = "keep";
850 type = <PCA955X_TYPE_LED>;
851 };
852
853 led@1 {
854 label = "attention-led";
855 reg = <1>;
856 retain-state-shutdown;
857 default-state = "keep";
858 type = <PCA955X_TYPE_LED>;
859 };
860
861 led@2 {
862 label = "enclosure-fault-rollup-led";
863 reg = <2>;
864 retain-state-shutdown;
865 default-state = "keep";
866 type = <PCA955X_TYPE_LED>;
867 };
868
869 led@3 {
870 label = "power-on-led";
871 reg = <3>;
872 retain-state-shutdown;
873 default-state = "keep";
874 type = <PCA955X_TYPE_LED>;
875 };
876 };
877
878 temperature-sensor@76 {
879 compatible = "infineon,dps310";
880 reg = <0x76>;
881 };
882 };
883
884 i2c6mux0chn5: i2c@5 {
885 #address-cells = <1>;
886 #size-cells = <0>;
887 reg = <5>;
888 };
889
890 i2c6mux0chn6: i2c@6 {
891 #address-cells = <1>;
892 #size-cells = <0>;
893 reg = <6>;
894 };
895
896 i2c6mux0chn7: i2c@7 {
897 #address-cells = <1>;
898 #size-cells = <0>;
899 reg = <7>;
900 };
901 };
902
903 pca3: gpio@74 {
904 compatible = "nxp,pca9539";
905 reg = <0x74>;
906
907 gpio-controller;
908 #gpio-cells = <2>;
909 };
910
911 pca4: gpio@77 {
912 compatible = "nxp,pca9539";
913 reg = <0x77>;
914
915 gpio-controller;
916 #gpio-cells = <2>;
917
918 gpio-line-names =
919 "PE_NVMED0_EXP_PRSNT_N",
920 "PE_NVMED1_EXP_PRSNT_N",
921 "PE_NVMED2_EXP_PRSNT_N",
922 "PE_NVMED3_EXP_PRSNT_N",
923 "LED_FAULT_NVMED0",
924 "LED_FAULT_NVMED1",
925 "LED_FAULT_NVMED2",
926 "LED_FAULT_NVMED3",
927 "FAN0_PRESENCE_R_N",
928 "FAN1_PRESENCE_R_N",
929 "FAN2_PRESENCE_R_N",
930 "FAN3_PRESENCE_R_N",
931 "FAN4_PRESENCE_R_N",
932 "FAN5_PRESENCE_N",
933 "FAN6_PRESENCE_N",
934 "";
935 };
936};
937
938&i2c7 {
939 status = "okay";
940
941 i2c-mux@70 {
942 compatible = "nxp,pca9548";
943 reg = <0x70>;
944 #address-cells = <1>;
945 #size-cells = <0>;
946 i2c-mux-idle-disconnect;
947
948 i2c7mux0chn0: i2c@0 {
949 #address-cells = <1>;
950 #size-cells = <0>;
951 reg = <0>;
952 };
953
954 i2c7mux0chn1: i2c@1 {
955 #address-cells = <1>;
956 #size-cells = <0>;
957 reg = <1>;
958 };
959
960 i2c7mux0chn2: i2c@2 {
961 #address-cells = <1>;
962 #size-cells = <0>;
963 reg = <2>;
964 };
965
966 i2c7mux0chn3: i2c@3 {
967 #address-cells = <1>;
968 #size-cells = <0>;
969 reg = <3>;
970
971 regulator@58 {
972 compatible = "mps,mp2973";
973 reg = <0x58>;
974 };
975 };
976
977 i2c7mux0chn4: i2c@4 {
978 #address-cells = <1>;
979 #size-cells = <0>;
980 reg = <4>;
981 };
982
983 i2c7mux0chn5: i2c@5 {
984 #address-cells = <1>;
985 #size-cells = <0>;
986 reg = <5>;
987
988 regulator@40 {
989 compatible = "infineon,tda38640";
990 reg = <0x40>;
991 };
992 };
993
994 i2c7mux0chn6: i2c@6 {
995 #address-cells = <1>;
996 #size-cells = <0>;
997 reg = <6>;
998 };
999
1000 i2c7mux0chn7: i2c@7 {
1001 #address-cells = <1>;
1002 #size-cells = <0>;
1003 reg = <7>;
1004 };
1005 };
1006};
1007
1008&i2c8 {
1009 status = "okay";
1010
1011 i2c-mux@71 {
1012 compatible = "nxp,pca9548";
1013 reg = <0x71>;
1014 #address-cells = <1>;
1015 #size-cells = <0>;
1016 i2c-mux-idle-disconnect;
1017
1018 i2c8mux0chn0: i2c@0 {
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1021 reg = <0>;
1022
1023 regulator@58 {
1024 compatible = "mps,mp2971";
1025 reg = <0x58>;
1026 };
1027 };
1028
1029 i2c8mux0chn1: i2c@1 {
1030 #address-cells = <1>;
1031 #size-cells = <0>;
1032 reg = <1>;
1033
1034 regulator@40 {
1035 compatible = "infineon,tda38640";
1036 reg = <0x40>;
1037 };
1038
1039 regulator@41 {
1040 compatible = "infineon,tda38640";
1041 reg = <0x41>;
1042 };
1043
1044 regulator@58 {
1045 compatible = "mps,mp2971";
1046 reg = <0x58>;
1047 };
1048
1049 regulator@5b {
1050 compatible = "mps,mp2971";
1051 reg = <0x5b>;
1052 };
1053 };
1054
1055 i2c8mux0chn2: i2c@2 {
1056 #address-cells = <1>;
1057 #size-cells = <0>;
1058 reg = <2>;
1059 };
1060
1061 i2c8mux0chn3: i2c@3 {
1062 #address-cells = <1>;
1063 #size-cells = <0>;
1064 reg = <3>;
1065 };
1066
1067 i2c8mux0chn4: i2c@4 {
1068 #address-cells = <1>;
1069 #size-cells = <0>;
1070 reg = <4>;
1071
1072 i2c-mux@70 {
1073 compatible = "nxp,pca9548";
1074 reg = <0x70>;
1075 #address-cells = <1>;
1076 #size-cells = <0>;
1077 i2c-mux-idle-disconnect;
1078
1079 i2c8mux1chn0: i2c@0 {
1080 #address-cells = <1>;
1081 #size-cells = <0>;
1082 reg = <0>;
1083 };
1084
1085 i2c8mux1chn1: i2c@1 {
1086 #address-cells = <1>;
1087 #size-cells = <0>;
1088 reg = <1>;
1089 };
1090
1091 i2c8mux1chn2: i2c@2 {
1092 #address-cells = <1>;
1093 #size-cells = <0>;
1094 reg = <2>;
1095 };
1096
1097 i2c8mux1chn3: i2c@3 {
1098 #address-cells = <1>;
1099 #size-cells = <0>;
1100 reg = <3>;
1101 };
1102
1103 i2c8mux1chn4: i2c@4 {
1104 #address-cells = <1>;
1105 #size-cells = <0>;
1106 reg = <4>;
1107 };
1108
1109 i2c8mux1chn5: i2c@5 {
1110 #address-cells = <1>;
1111 #size-cells = <0>;
1112 reg = <5>;
1113 };
1114
1115 i2c8mux1chn6: i2c@6 {
1116 #address-cells = <1>;
1117 #size-cells = <0>;
1118 reg = <6>;
1119 };
1120
1121 i2c8mux1chn7: i2c@7 {
1122 #address-cells = <1>;
1123 #size-cells = <0>;
1124 reg = <7>;
1125 };
1126 };
1127 };
1128
1129 i2c8mux0chn5: i2c@5 {
1130 #address-cells = <1>;
1131 #size-cells = <0>;
1132 reg = <5>;
1133 };
1134
1135 i2c8mux0chn6: i2c@6 {
1136 #address-cells = <1>;
1137 #size-cells = <0>;
1138 reg = <6>;
1139
1140 temperature-sensor@4c {
1141 compatible = "ti,tmp423";
1142 reg = <0x4c>;
1143 };
1144 };
1145
1146 i2c8mux0chn7: i2c@7 {
1147 #address-cells = <1>;
1148 #size-cells = <0>;
1149 reg = <7>;
1150
1151 regulator@40 {
1152 compatible = "infineon,ir38060";
1153 reg = <0x40>;
1154 };
1155 };
1156 };
1157};
1158
1159&i2c9 {
1160 status = "okay";
1161
1162 regulator@40 {
1163 compatible = "infineon,ir38263";
1164 reg = <0x40>;
1165 };
1166
1167 regulator@41 {
1168 compatible = "infineon,ir38263";
1169 reg = <0x41>;
1170 };
1171
1172 eeprom@50 {
1173 compatible = "atmel,24c64";
1174 reg = <0x50>;
1175 };
1176
1177 regulator@60 {
1178 compatible = "maxim,max8952";
1179 reg = <0x60>;
1180
1181 max8952,default-mode = <0>;
1182 max8952,dvs-mode-microvolt = <1250000>, <1200000>,
1183 <1050000>, <950000>;
1184 max8952,sync-freq = <0>;
1185 max8952,ramp-speed = <0>;
1186
1187 regulator-name = "VR_v77_1v4";
1188 regulator-min-microvolt = <770000>;
1189 regulator-max-microvolt = <1400000>;
1190 regulator-always-on;
1191 regulator-boot-on;
1192 };
1193};
1194
1195&i2c11 {
1196 status = "okay";
1197
1198 tpm@2e {
1199 compatible = "tcg,tpm-tis-i2c";
1200 reg = <0x2e>;
1201 memory-region = <&eventlog>;
1202 };
1203};
1204
1205&i2c12 {
1206 status = "okay";
1207};
1208
1209&i2c13 {
1210 status = "okay";
1211
1212 regulator@41 {
1213 compatible = "infineon,ir38263";
1214 reg = <0x41>;
1215 };
1216
1217 led-controller@61 {
1218 compatible = "nxp,pca9552";
1219 reg = <0x61>;
1220 #address-cells = <1>;
1221 #size-cells = <0>;
1222
1223 gpio-controller;
1224 #gpio-cells = <2>;
1225
1226 led@0 {
1227 label = "efuse-12v-slots";
1228 reg = <0>;
1229 retain-state-shutdown;
1230 default-state = "keep";
1231 type = <PCA955X_TYPE_LED>;
1232 };
1233
1234 led@1 {
1235 label = "efuse-3p3v-slot";
1236 reg = <1>;
1237 retain-state-shutdown;
1238 default-state = "keep";
1239 type = <PCA955X_TYPE_LED>;
1240 };
1241
1242 led@3 {
1243 label = "nic2-pert";
1244 reg = <3>;
1245 retain-state-shutdown;
1246 default-state = "keep";
1247 type = <PCA955X_TYPE_LED>;
1248 };
1249
1250 led@4 {
1251 label = "pcie-perst9";
1252 reg = <4>;
1253 retain-state-shutdown;
1254 default-state = "keep";
1255 type = <PCA955X_TYPE_LED>;
1256 };
1257
1258 led@5 {
1259 label = "pcie-perst10";
1260 reg = <5>;
1261 retain-state-shutdown;
1262 default-state = "keep";
1263 type = <PCA955X_TYPE_LED>;
1264 };
1265
1266 led@6 {
1267 label = "pcie-perst11";
1268 reg = <6>;
1269 retain-state-shutdown;
1270 default-state = "keep";
1271 type = <PCA955X_TYPE_LED>;
1272 };
1273
1274 led@7 {
1275 label = "pcie-perst12";
1276 reg = <7>;
1277 retain-state-shutdown;
1278 default-state = "keep";
1279 type = <PCA955X_TYPE_LED>;
1280 };
1281
1282 led@8 {
1283 label = "pcie-perst13";
1284 reg = <8>;
1285 retain-state-shutdown;
1286 default-state = "keep";
1287 type = <PCA955X_TYPE_LED>;
1288 };
1289
1290 led@9 {
1291 label = "pcie-perst14";
1292 reg = <9>;
1293 retain-state-shutdown;
1294 default-state = "keep";
1295 type = <PCA955X_TYPE_LED>;
1296 };
1297
1298 led@10 {
1299 label = "pcie-perst15";
1300 reg = <10>;
1301 retain-state-shutdown;
1302 default-state = "keep";
1303 type = <PCA955X_TYPE_LED>;
1304 };
1305
1306 led@11 {
1307 label = "pcie-perst16";
1308 reg = <11>;
1309 retain-state-shutdown;
1310 default-state = "keep";
1311 type = <PCA955X_TYPE_LED>;
1312 };
1313
1314 led@12 {
1315 label = "PV-cp1-sw1stk4-perst";
1316 reg = <12>;
1317 retain-state-shutdown;
1318 default-state = "keep";
1319 type = <PCA955X_TYPE_LED>;
1320 };
1321
1322 led@13 {
1323 label = "PV-cp1-sw1stk5-perst";
1324 reg = <13>;
1325 retain-state-shutdown;
1326 default-state = "keep";
1327 type = <PCA955X_TYPE_LED>;
1328 };
1329
1330 led@14 {
1331 label = "pe-cp-drv2-perst";
1332 reg = <14>;
1333 retain-state-shutdown;
1334 default-state = "keep";
1335 type = <PCA955X_TYPE_LED>;
1336 };
1337
1338 led@15 {
1339 label = "pe-cp-drv3-perst";
1340 reg = <15>;
1341 retain-state-shutdown;
1342 default-state = "keep";
1343 type = <PCA955X_TYPE_LED>;
1344 };
1345 };
1346
1347 gpio@75 {
1348 compatible = "nxp,pca9539";
1349 reg = <0x75>;
1350
1351 gpio-controller;
1352 #gpio-cells = <2>;
1353
1354 gpio-line-names =
1355 "PLUG_DETECT_PCIE_J109_N",
1356 "PLUG_DETECT_PCIE_J110_N",
1357 "PLUG_DETECT_PCIE_J111_N",
1358 "PLUG_DETECT_PCIE_J112_N",
1359 "PLUG_DETECT_PCIE_J113_N",
1360 "PLUG_DETECT_PCIE_J114_N",
1361 "PLUG_DETECT_PCIE_J115_N",
1362 "PLUG_DETECT_PCIE_J116_N",
1363 "PLUG_DETECT_M2_SSD2_N",
1364 "PLUG_DETECT_NIC2_N",
1365 "SEL_SMB_DIMM_CPU1",
1366 "presence-ps0",
1367 "presence-ps1",
1368 "", "",
1369 "PWRBRD_PLUG_DETECT1_N";
1370 };
1371
1372 gpio@76 {
1373 compatible = "nxp,pca9539";
1374 reg = <0x76>;
1375
1376 gpio-controller;
1377 #gpio-cells = <2>;
1378
1379 gpio-line-names =
1380 "SW1_BOOTRCVRYB1_N",
1381 "SW1_BOOTRCVRYB0_N",
1382 "SW2_BOOTRCVRYB1_N",
1383 "SW2_BOOTRCVRYB0_N",
1384 "SW3_4_BOOTRCVRYB1_N",
1385 "SW3_4_BOOTRCVRYB0_N",
1386 "SW5_BOOTRCVRYB1_N",
1387 "SW5_BOOTRCVRYB0_N",
1388 "SW6_BOOTRCVRYB1_N",
1389 "SW6_BOOTRCVRYB0_N",
1390 "SW1_RESET_N",
1391 "SW3_RESET_N",
1392 "SW4_RESET_N",
1393 "SW2_RESET_N",
1394 "SW5_RESET_N",
1395 "SW6_RESET_N";
1396 };
1397};
1398
1399&i2c14 {
1400 status = "okay";
1401
1402 i2c-mux@70 {
1403 compatible = "nxp,pca9548";
1404 reg = <0x70>;
1405 #address-cells = <1>;
1406 #size-cells = <0>;
1407 i2c-mux-idle-disconnect;
1408
1409 i2c14mux0chn0: i2c@0 {
1410 #address-cells = <1>;
1411 #size-cells = <0>;
1412 reg = <0>;
1413 };
1414
1415 i2c14mux0chn1: i2c@1 {
1416 #address-cells = <1>;
1417 #size-cells = <0>;
1418 reg = <1>;
1419 };
1420
1421 i2c14mux0chn2: i2c@2 {
1422 #address-cells = <1>;
1423 #size-cells = <0>;
1424 reg = <2>;
1425 };
1426
1427 i2c14mux0chn3: i2c@3 {
1428 #address-cells = <1>;
1429 #size-cells = <0>;
1430 reg = <3>;
1431
1432 regulator@58 {
1433 compatible = "mps,mp2973";
1434 reg = <0x58>;
1435 };
1436 };
1437
1438 i2c14mux0chn4: i2c@4 {
1439 #address-cells = <1>;
1440 #size-cells = <0>;
1441 reg = <4>;
1442 };
1443
1444 i2c14mux0chn5: i2c@5 {
1445 #address-cells = <1>;
1446 #size-cells = <0>;
1447 reg = <5>;
1448
1449 regulator@40 {
1450 compatible = "infineon,tda38640";
1451 reg = <0x40>;
1452 };
1453 };
1454
1455 i2c14mux0chn6: i2c@6 {
1456 #address-cells = <1>;
1457 #size-cells = <0>;
1458 reg = <6>;
1459 };
1460
1461 i2c14mux0chn7: i2c@7 {
1462 #address-cells = <1>;
1463 #size-cells = <0>;
1464 reg = <7>;
1465 };
1466 };
1467};
1468
1469&i2c15 {
1470 status = "okay";
1471
1472 i2c-mux@71 {
1473 compatible = "nxp,pca9548";
1474 reg = <0x71>;
1475 #address-cells = <1>;
1476 #size-cells = <0>;
1477 i2c-mux-idle-disconnect;
1478
1479 i2c15mux0chn0: i2c@0 {
1480 #address-cells = <1>;
1481 #size-cells = <0>;
1482 reg = <0>;
1483
1484 regulator@58 {
1485 compatible = "mps,mp2971";
1486 reg = <0x58>;
1487 };
1488 };
1489
1490 i2c15mux0chn1: i2c@1 {
1491 #address-cells = <1>;
1492 #size-cells = <0>;
1493 reg = <1>;
1494
1495 regulator@40 {
1496 compatible = "infineon,tda38640";
1497 reg = <0x40>;
1498 };
1499
1500 regulator@41 {
1501 compatible = "infineon,tda38640";
1502 reg = <0x41>;
1503 };
1504
1505 regulator@58 {
1506 compatible = "mps,mp2971";
1507 reg = <0x58>;
1508 };
1509
1510 regulator@5b {
1511 compatible = "mps,mp2971";
1512 reg = <0x5b>;
1513 };
1514 };
1515
1516 i2c15mux0chn2: i2c@2 {
1517 #address-cells = <1>;
1518 #size-cells = <0>;
1519 reg = <2>;
1520 };
1521
1522 i2c15mux0chn3: i2c@3 {
1523 #address-cells = <1>;
1524 #size-cells = <0>;
1525 reg = <3>;
1526 };
1527
1528 i2c15mux0chn4: i2c@4 {
1529 #address-cells = <1>;
1530 #size-cells = <0>;
1531 reg = <4>;
1532
1533 i2c-mux@70 {
1534 compatible = "nxp,pca9548";
1535 reg = <0x70>;
1536 #address-cells = <1>;
1537 #size-cells = <0>;
1538 i2c-mux-idle-disconnect;
1539
1540 i2c15mux1chn0: i2c@0 {
1541 #address-cells = <1>;
1542 #size-cells = <0>;
1543 reg = <0>;
1544 };
1545
1546 i2c15mux1chn1: i2c@1 {
1547 #address-cells = <1>;
1548 #size-cells = <0>;
1549 reg = <1>;
1550 };
1551
1552 i2c15mux1chn2: i2c@2 {
1553 #address-cells = <1>;
1554 #size-cells = <0>;
1555 reg = <2>;
1556 };
1557
1558 i2c15mux1chn3: i2c@3 {
1559 #address-cells = <1>;
1560 #size-cells = <0>;
1561 reg = <3>;
1562 };
1563
1564 i2c15mux1chn4: i2c@4 {
1565 #address-cells = <1>;
1566 #size-cells = <0>;
1567 reg = <4>;
1568 };
1569
1570 i2c15mux1chn5: i2c@5 {
1571 #address-cells = <1>;
1572 #size-cells = <0>;
1573 reg = <5>;
1574 };
1575
1576 i2c15mux1chn6: i2c@6 {
1577 #address-cells = <1>;
1578 #size-cells = <0>;
1579 reg = <6>;
1580 };
1581
1582 i2c15mux1chn7: i2c@7 {
1583 #address-cells = <1>;
1584 #size-cells = <0>;
1585 reg = <7>;
1586 };
1587 };
1588 };
1589
1590 i2c15mux0chn5: i2c@5 {
1591 #address-cells = <1>;
1592 #size-cells = <0>;
1593 reg = <5>;
1594 };
1595
1596 i2c15mux0chn6: i2c@6 {
1597 #address-cells = <1>;
1598 #size-cells = <0>;
1599 reg = <6>;
1600
1601 temperature-sensor@4c {
1602 compatible = "ti,tmp423";
1603 reg = <0x4c>;
1604 };
1605 };
1606
1607 i2c15mux0chn7: i2c@7 {
1608 #address-cells = <1>;
1609 #size-cells = <0>;
1610 reg = <7>;
1611
1612 regulator@40 {
1613 compatible = "infineon,ir38060";
1614 reg = <0x40>;
1615 };
1616
1617 temperature-sensor@4c {
1618 compatible = "ti,tmp423";
1619 reg = <0x4c>;
1620 };
1621 };
1622 };
1623};
Linux 6.x block layer and io_uring tree(s)