Commit | Line | Data |
---|---|---|
ca36855e | 1 | // SPDX-License-Identifier: (GPL-2.0 OR MIT) |
4c945e85 | 2 | /* |
76138f94 | 3 | * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828) |
4c945e85 RK |
4 | * |
5 | * Copyright (C) 2015 Russell King | |
4c945e85 RK |
6 | */ |
7 | ||
8 | /dts-v1/; | |
76138f94 | 9 | #include "armada-388-clearfog.dtsi" |
4c945e85 RK |
10 | |
11 | / { | |
12 | model = "SolidRun Clearfog A1"; | |
13 | compatible = "solidrun,clearfog-a1", "marvell,armada388", | |
14 | "marvell,armada385", "marvell,armada380"; | |
d5bd6335 | 15 | |
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16 | soc { |
17 | internal-regs { | |
18 | usb3@f0000 { | |
19 | /* CON2, nearest CPU, USB2 only. */ | |
20 | status = "okay"; | |
21 | }; | |
22 | }; | |
23 | ||
28fbb9c5 | 24 | pcie { |
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25 | pcie@3,0 { |
26 | /* Port 2, Lane 0. CON2, nearest CPU. */ | |
27 | reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; | |
28 | status = "okay"; | |
29 | }; | |
30 | }; | |
31 | }; | |
32 | ||
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33 | gpio-keys { |
34 | compatible = "gpio-keys"; | |
35 | pinctrl-0 = <&rear_button_pins>; | |
36 | pinctrl-names = "default"; | |
37 | ||
41340053 | 38 | button-0 { |
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39 | /* The rear SW3 button */ |
40 | label = "Rear Button"; | |
41 | gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; | |
42 | linux,can-disable; | |
43 | linux,code = <BTN_0>; | |
44 | }; | |
45 | }; | |
d5bd6335 RK |
46 | }; |
47 | ||
48 | ð1 { | |
49 | /* ethernet@30000 */ | |
50 | fixed-link { | |
51 | speed = <1000>; | |
52 | full-duplex; | |
53 | }; | |
54 | }; | |
55 | ||
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56 | &expander0 { |
57 | /* | |
58 | * PCA9655 GPIO expander: | |
59 | * 0-CON3 CLKREQ# | |
60 | * 1-CON3 PERST# | |
61 | * 2-CON2 PERST# | |
62 | * 3-CON3 W_DISABLE | |
63 | * 4-CON2 CLKREQ# | |
64 | * 5-USB3 overcurrent | |
65 | * 6-USB3 power | |
66 | * 7-CON2 W_DISABLE | |
67 | * 8-JP4 P1 | |
68 | * 9-JP4 P4 | |
69 | * 10-JP4 P5 | |
70 | * 11-m.2 DEVSLP | |
71 | * 12-SFP_LOS | |
72 | * 13-SFP_TX_FAULT | |
73 | * 14-SFP_TX_DISABLE | |
74 | * 15-SFP_MOD_DEF0 | |
75 | */ | |
493c6469 | 76 | pcie2-0-clkreq-hog { |
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77 | gpio-hog; |
78 | gpios = <4 GPIO_ACTIVE_LOW>; | |
79 | input; | |
80 | line-name = "pcie2.0-clkreq"; | |
81 | }; | |
493c6469 | 82 | pcie2-0-w-disable-hog { |
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83 | gpio-hog; |
84 | gpios = <7 GPIO_ACTIVE_LOW>; | |
85 | output-low; | |
86 | line-name = "pcie2.0-w-disable"; | |
87 | }; | |
88 | }; | |
89 | ||
c0405563 FF |
90 | &mdio { |
91 | status = "okay"; | |
92 | ||
93 | switch@4 { | |
94 | compatible = "marvell,mv88e6085"; | |
95 | #address-cells = <1>; | |
96 | #size-cells = <0>; | |
97 | reg = <4>; | |
98 | pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; | |
99 | pinctrl-names = "default"; | |
100 | ||
101 | ports { | |
102 | #address-cells = <1>; | |
103 | #size-cells = <0>; | |
104 | ||
105 | port@0 { | |
106 | reg = <0>; | |
107 | label = "lan5"; | |
108 | }; | |
109 | ||
110 | port@1 { | |
111 | reg = <1>; | |
112 | label = "lan4"; | |
113 | }; | |
114 | ||
115 | port@2 { | |
116 | reg = <2>; | |
117 | label = "lan3"; | |
118 | }; | |
119 | ||
120 | port@3 { | |
121 | reg = <3>; | |
122 | label = "lan2"; | |
123 | }; | |
124 | ||
125 | port@4 { | |
126 | reg = <4>; | |
127 | label = "lan1"; | |
128 | }; | |
129 | ||
130 | port@5 { | |
131 | reg = <5>; | |
132 | label = "cpu"; | |
133 | ethernet = <ð1>; | |
134 | fixed-link { | |
135 | speed = <1000>; | |
136 | full-duplex; | |
137 | }; | |
138 | }; | |
139 | ||
140 | port@6 { | |
141 | /* 88E1512 external phy */ | |
142 | reg = <6>; | |
143 | label = "lan6"; | |
144 | fixed-link { | |
145 | speed = <1000>; | |
146 | full-duplex; | |
147 | }; | |
148 | }; | |
149 | }; | |
150 | }; | |
151 | }; | |
152 | ||
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153 | &pinctrl { |
154 | clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { | |
155 | marvell,pins = "mpp46"; | |
156 | marvell,function = "ref"; | |
157 | }; | |
158 | clearfog_dsa0_pins: clearfog-dsa0-pins { | |
159 | marvell,pins = "mpp23", "mpp41"; | |
160 | marvell,function = "gpio"; | |
161 | }; | |
162 | clearfog_spi1_cs_pins: spi1-cs-pins { | |
163 | marvell,pins = "mpp55"; | |
164 | marvell,function = "spi1"; | |
165 | }; | |
166 | rear_button_pins: rear-button-pins { | |
167 | marvell,pins = "mpp34"; | |
168 | marvell,function = "gpio"; | |
169 | }; | |
170 | }; | |
171 | ||
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172 | &spi1 { |
173 | /* | |
174 | * Add SPI CS pins for clearfog: | |
bb683d7a | 175 | * CS0: W25Q32 |
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176 | * CS1: |
177 | * CS2: mikrobus | |
178 | */ | |
179 | pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>; | |
0160a4b6 | 180 | }; |