projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| e1fdd060 DL |
1 | /* |
| 2 | * Support for CompuLab SBC-AM57x single board computer | |
| 3 | * | |
| 4 | * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/ | |
| 5 | * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify it | |
| 8 | * under the terms of the GNU General Public License version 2 as published by | |
| 9 | * the Free Software Foundation. | |
| 10 | */ | |
| 11 | ||
| 12 | #include "am57xx-cl-som-am57x.dts" | |
| 13 | #include "compulab-sb-som.dtsi" | |
| 14 | ||
| 15 | / { | |
| 16 | model = "CompuLab CL-SOM-AM57x on SB-SOM-AM57x"; | |
| 17 | compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; | |
| 18 | }; | |
| 19 | ||
| 20 | &dra7_pmx_core { | |
| 21 | uart3_pins_default: uart3_pins_default { | |
| 22 | pinctrl-single,pins = < | |
| 23 | DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ | |
| 24 | DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ | |
| 25 | >; | |
| 26 | }; | |
| 00d0e46a DL |
27 | |
| 28 | mmc1_pins_default: mmc1_pins_default { | |
| 29 | pinctrl-single,pins = < | |
| 30 | DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ | |
| 31 | DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ | |
| 32 | DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ | |
| 33 | DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ | |
| 34 | DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ | |
| 35 | DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ | |
| 36 | DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1_sdcd.gpio6_27 */ | |
| 37 | DRA7XX_CORE_IOPAD(0x377c, PIN_INPUT | MUX_MODE14) /* mmc1_sdwp.gpio6_28 */ | |
| 38 | >; | |
| 39 | }; | |
| ed7ce764 DL |
40 | |
| 41 | usb1_pins: pinmux_usb1_pins { | |
| 42 | pinctrl-single,pins = < | |
| 43 | DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ | |
| 44 | >; | |
| 45 | }; | |
| 6042f620 DL |
46 | |
| 47 | i2c5_pins_default: i2c5_pins_default { | |
| 48 | pinctrl-single,pins = < | |
| 49 | DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT| MUX_MODE10) /* mcasp1_axr0.i2c5_sda */ | |
| 50 | DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT| MUX_MODE10) /* mcasp1_axr1.i2c5_scl */ | |
| 51 | >; | |
| 52 | }; | |
| e1fdd060 DL |
53 | }; |
| 54 | ||
| 55 | &uart3 { | |
| 56 | status = "okay"; | |
| 57 | interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, | |
| 58 | <&dra7_pmx_core 0x3f8>; | |
| 59 | ||
| 60 | pinctrl-names = "default"; | |
| 61 | pinctrl-0 = <&uart3_pins_default>; | |
| 62 | }; | |
| 00d0e46a DL |
63 | |
| 64 | &mmc1 { | |
| 65 | status = "okay"; | |
| 66 | ||
| 67 | pinctrl-names = "default"; | |
| 68 | pinctrl-0 = <&mmc1_pins_default>; | |
| 69 | ||
| 70 | vmmc-supply = <&ldo1_reg>; | |
| 71 | bus-width = <4>; | |
| 72 | cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; | |
| 73 | wp-gpios = <&gpio6 28 GPIO_ACTIVE_HIGH>; | |
| 74 | }; | |
| ed7ce764 DL |
75 | |
| 76 | &usb1 { | |
| 77 | pinctrl-names = "default"; | |
| 78 | pinctrl-0 = <&usb1_pins>; | |
| 79 | }; | |
| 6042f620 DL |
80 | |
| 81 | &i2c5 { | |
| 82 | status = "okay"; | |
| 83 | pinctrl-names = "default"; | |
| 84 | pinctrl-0 = <&i2c5_pins_default>; | |
| 85 | clock-frequency = <400000>; | |
| 86 | ||
| 87 | eeprom_base: atmel@50 { | |
| 88 | compatible = "atmel,24c08"; | |
| 89 | reg = <0x50>; | |
| 90 | pagesize = <16>; | |
| 91 | }; | |
| 92 | }; |