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arm: dts: am33xx, Add syscon phandle to cpsw node
[linux-2.6-block.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
6a968678
NM		 21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
dde3b0d6
VH		 24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
7a57ee87
AC		 30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
97238b35
SAS		 32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
8170056d
DM		 36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
5fc0b42a
AC		 38 };
39
40 cpus {
2e0d513f
LP		 41 #address-cells = <1>;
42 #size-cells = <0>;
5fc0b42a
AC		 43 cpu@0 {
44 compatible = "arm,cortex-a8";
2e0d513f
LP		 45 device_type = "cpu";
46 reg = <0>;
efeedcf2
AC		 47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
8d766fa2
NM		 61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
efeedcf2 65 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 66 };
67 };
68
6797cdbe
AB		 69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
5fc0b42a 74 /*
5c5be9db 75 * The soc node represents the soc top level view. It is used for IPs
5fc0b42a
AC		 76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
b552dfc4
AC		 86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
93 };
94
5fc0b42a
AC		 95 /*
96 * XXX: Use a flat representation of the AM33XX interconnect.
b7ab524b
GU		 97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
5fc0b42a
AC		 99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
101 */
102 ocp {
103 compatible = "simple-bus";
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges;
107 ti,hwmods = "l3_main";
108
ea291c98
TK		 109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
112
113 prcm_clocks: clocks {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 };
117
118 prcm_clockdomains: clockdomains {
119 };
120 };
121
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
125
126 scrm_clocks: clocks {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 };
130
131 scrm_clockdomains: clockdomains {
132 };
133 };
134
c9aaf87c
MP		 135 cm: syscon@44e10000 {
136 compatible = "ti,am33xx-controlmodule", "syscon";
137 reg = <0x44e10000 0x800>;
138 };
139
5fc0b42a
AC		 140 intc: interrupt-controller@48200000 {
141 compatible = "ti,omap2-intc";
142 interrupt-controller;
143 #interrupt-cells = <1>;
144 ti,intc-size = <128>;
145 reg = <0x48200000 0x1000>;
146 };
147
505975d3
MP		 148 edma: edma@49000000 {
149 compatible = "ti,edma3";
150 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
151 reg = <0x49000000 0x10000>,
cf7eb979 152 <0x44e10f90 0x40>;
505975d3
MP		 153 interrupts = <12 13 14>;
154 #dma-cells = <1>;
505975d3
MP		 155 };
156
b918e2c0 157 gpio0: gpio@44e07000 {
5fc0b42a
AC		 158 compatible = "ti,omap4-gpio";
159 ti,hwmods = "gpio1";
160 gpio-controller;
161 #gpio-cells = <2>;
162 interrupt-controller;
5eac0eb7 163 #interrupt-cells = <2>;
4462b31c 164 reg = <0x44e07000 0x1000>;
4462b31c 165 interrupts = <96>;
5fc0b42a
AC		 166 };
167
b918e2c0 168 gpio1: gpio@4804c000 {
5fc0b42a
AC		 169 compatible = "ti,omap4-gpio";
170 ti,hwmods = "gpio2";
171 gpio-controller;
172 #gpio-cells = <2>;
173 interrupt-controller;
5eac0eb7 174 #interrupt-cells = <2>;
4462b31c 175 reg = <0x4804c000 0x1000>;
4462b31c 176 interrupts = <98>;
5fc0b42a
AC		 177 };
178
b918e2c0 179 gpio2: gpio@481ac000 {
5fc0b42a
AC		 180 compatible = "ti,omap4-gpio";
181 ti,hwmods = "gpio3";
182 gpio-controller;
183 #gpio-cells = <2>;
184 interrupt-controller;
5eac0eb7 185 #interrupt-cells = <2>;
4462b31c 186 reg = <0x481ac000 0x1000>;
4462b31c 187 interrupts = <32>;
5fc0b42a
AC		 188 };
189
b918e2c0 190 gpio3: gpio@481ae000 {
5fc0b42a
AC		 191 compatible = "ti,omap4-gpio";
192 ti,hwmods = "gpio4";
193 gpio-controller;
194 #gpio-cells = <2>;
195 interrupt-controller;
5eac0eb7 196 #interrupt-cells = <2>;
4462b31c 197 reg = <0x481ae000 0x1000>;
4462b31c 198 interrupts = <62>;
5fc0b42a
AC		 199 };
200
dde3b0d6 201 uart0: serial@44e09000 {
5fc0b42a
AC		 202 compatible = "ti,omap3-uart";
203 ti,hwmods = "uart1";
204 clock-frequency = <48000000>;
4462b31c 205 reg = <0x44e09000 0x2000>;
4462b31c 206 interrupts = <72>;
53d91034 207 status = "disabled";
5fc0b42a
AC		 208 };
209
dde3b0d6 210 uart1: serial@48022000 {
5fc0b42a
AC		 211 compatible = "ti,omap3-uart";
212 ti,hwmods = "uart2";
213 clock-frequency = <48000000>;
4462b31c 214 reg = <0x48022000 0x2000>;
4462b31c 215 interrupts = <73>;
53d91034 216 status = "disabled";
5fc0b42a
AC		 217 };
218
dde3b0d6 219 uart2: serial@48024000 {
5fc0b42a
AC		 220 compatible = "ti,omap3-uart";
221 ti,hwmods = "uart3";
222 clock-frequency = <48000000>;
4462b31c 223 reg = <0x48024000 0x2000>;
4462b31c 224 interrupts = <74>;
53d91034 225 status = "disabled";
5fc0b42a
AC		 226 };
227
dde3b0d6 228 uart3: serial@481a6000 {
5fc0b42a
AC		 229 compatible = "ti,omap3-uart";
230 ti,hwmods = "uart4";
231 clock-frequency = <48000000>;
4462b31c 232 reg = <0x481a6000 0x2000>;
4462b31c 233 interrupts = <44>;
53d91034 234 status = "disabled";
5fc0b42a
AC		 235 };
236
dde3b0d6 237 uart4: serial@481a8000 {
5fc0b42a
AC		 238 compatible = "ti,omap3-uart";
239 ti,hwmods = "uart5";
240 clock-frequency = <48000000>;
4462b31c 241 reg = <0x481a8000 0x2000>;
4462b31c 242 interrupts = <45>;
53d91034 243 status = "disabled";
5fc0b42a
AC		 244 };
245
dde3b0d6 246 uart5: serial@481aa000 {
5fc0b42a
AC		 247 compatible = "ti,omap3-uart";
248 ti,hwmods = "uart6";
249 clock-frequency = <48000000>;
4462b31c 250 reg = <0x481aa000 0x2000>;
4462b31c 251 interrupts = <46>;
53d91034 252 status = "disabled";
5fc0b42a
AC		 253 };
254
b918e2c0 255 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 256 compatible = "ti,omap4-i2c";
257 #address-cells = <1>;
258 #size-cells = <0>;
259 ti,hwmods = "i2c1";
4462b31c 260 reg = <0x44e0b000 0x1000>;
4462b31c 261 interrupts = <70>;
53d91034 262 status = "disabled";
5fc0b42a
AC		 263 };
264
b918e2c0 265 i2c1: i2c@4802a000 {
5fc0b42a
AC		 266 compatible = "ti,omap4-i2c";
267 #address-cells = <1>;
268 #size-cells = <0>;
269 ti,hwmods = "i2c2";
4462b31c 270 reg = <0x4802a000 0x1000>;
4462b31c 271 interrupts = <71>;
53d91034 272 status = "disabled";
5fc0b42a
AC		 273 };
274
b918e2c0 275 i2c2: i2c@4819c000 {
5fc0b42a
AC		 276 compatible = "ti,omap4-i2c";
277 #address-cells = <1>;
278 #size-cells = <0>;
279 ti,hwmods = "i2c3";
4462b31c 280 reg = <0x4819c000 0x1000>;
4462b31c 281 interrupts = <30>;
53d91034 282 status = "disabled";
5fc0b42a 283 };
5f789ebc 284
55b4452b
MP		 285 mmc1: mmc@48060000 {
286 compatible = "ti,omap4-hsmmc";
287 ti,hwmods = "mmc1";
288 ti,dual-volt;
289 ti,needs-special-reset;
290 ti,needs-special-hs-handling;
291 dmas = <&edma 24
292 &edma 25>;
293 dma-names = "tx", "rx";
294 interrupts = <64>;
295 interrupt-parent = <&intc>;
296 reg = <0x48060000 0x1000>;
297 status = "disabled";
298 };
299
300 mmc2: mmc@481d8000 {
301 compatible = "ti,omap4-hsmmc";
302 ti,hwmods = "mmc2";
303 ti,needs-special-reset;
304 dmas = <&edma 2
305 &edma 3>;
306 dma-names = "tx", "rx";
307 interrupts = <28>;
308 interrupt-parent = <&intc>;
309 reg = <0x481d8000 0x1000>;
310 status = "disabled";
311 };
312
313 mmc3: mmc@47810000 {
314 compatible = "ti,omap4-hsmmc";
315 ti,hwmods = "mmc3";
316 ti,needs-special-reset;
317 interrupts = <29>;
318 interrupt-parent = <&intc>;
319 reg = <0x47810000 0x1000>;
320 status = "disabled";
321 };
322
d4cbe80d
SA		 323 hwspinlock: spinlock@480ca000 {
324 compatible = "ti,omap4-hwspinlock";
325 reg = <0x480ca000 0x1000>;
326 ti,hwmods = "spinlock";
34054213 327 #hwlock-cells = <1>;
d4cbe80d
SA		 328 };
329
5f789ebc
AM		 330 wdt2: wdt@44e35000 {
331 compatible = "ti,omap3-wdt";
332 ti,hwmods = "wd_timer2";
4462b31c 333 reg = <0x44e35000 0x1000>;
4462b31c 334 interrupts = <91>;
5f789ebc 335 };
059b185d
AC		 336
337 dcan0: d_can@481cc000 {
338 compatible = "bosch,d_can";
339 ti,hwmods = "d_can0";
f178c015
AC		 340 reg = <0x481cc000 0x2000
341 0x44e10644 0x4>;
059b185d 342 interrupts = <52>;
059b185d
AC		 343 status = "disabled";
344 };
345
346 dcan1: d_can@481d0000 {
347 compatible = "bosch,d_can";
348 ti,hwmods = "d_can1";
f178c015
AC		 349 reg = <0x481d0000 0x2000
350 0x44e10644 0x4>;
059b185d 351 interrupts = <55>;
059b185d
AC		 352 status = "disabled";
353 };
fab8ad0b 354
40242301
SA		 355 mailbox: mailbox@480C8000 {
356 compatible = "ti,omap4-mailbox";
357 reg = <0x480C8000 0x200>;
358 interrupts = <77>;
359 ti,hwmods = "mailbox";
360 ti,mbox-num-users = <4>;
361 ti,mbox-num-fifos = <8>;
362 };
363
fab8ad0b 364 timer1: timer@44e31000 {
002e1ec5 365 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 366 reg = <0x44e31000 0x400>;
367 interrupts = <67>;
368 ti,hwmods = "timer1";
369 ti,timer-alwon;
370 };
371
372 timer2: timer@48040000 {
002e1ec5 373 compatible = "ti,am335x-timer";
fab8ad0b
JH		 374 reg = <0x48040000 0x400>;
375 interrupts = <68>;
376 ti,hwmods = "timer2";
377 };
378
379 timer3: timer@48042000 {
002e1ec5 380 compatible = "ti,am335x-timer";
fab8ad0b
JH		 381 reg = <0x48042000 0x400>;
382 interrupts = <69>;
383 ti,hwmods = "timer3";
384 };
385
386 timer4: timer@48044000 {
002e1ec5 387 compatible = "ti,am335x-timer";
fab8ad0b
JH		 388 reg = <0x48044000 0x400>;
389 interrupts = <92>;
390 ti,hwmods = "timer4";
391 ti,timer-pwm;
392 };
393
394 timer5: timer@48046000 {
002e1ec5 395 compatible = "ti,am335x-timer";
fab8ad0b
JH		 396 reg = <0x48046000 0x400>;
397 interrupts = <93>;
398 ti,hwmods = "timer5";
399 ti,timer-pwm;
400 };
401
402 timer6: timer@48048000 {
002e1ec5 403 compatible = "ti,am335x-timer";
fab8ad0b
JH		 404 reg = <0x48048000 0x400>;
405 interrupts = <94>;
406 ti,hwmods = "timer6";
407 ti,timer-pwm;
408 };
409
410 timer7: timer@4804a000 {
002e1ec5 411 compatible = "ti,am335x-timer";
fab8ad0b
JH		 412 reg = <0x4804a000 0x400>;
413 interrupts = <95>;
414 ti,hwmods = "timer7";
415 ti,timer-pwm;
416 };
0d935c16 417
ccd8b9e0 418 rtc: rtc@44e3e000 {
0d935c16
AM		 419 compatible = "ti,da830-rtc";
420 reg = <0x44e3e000 0x1000>;
421 interrupts = <75
422 76>;
423 ti,hwmods = "rtc";
424 };
9fd3c748
PA		 425
426 spi0: spi@48030000 {
427 compatible = "ti,omap4-mcspi";
428 #address-cells = <1>;
429 #size-cells = <0>;
430 reg = <0x48030000 0x400>;
7b3754c6 431 interrupts = <65>;
9fd3c748
PA		 432 ti,spi-num-cs = <2>;
433 ti,hwmods = "spi0";
f5e2f807
MP		 434 dmas = <&edma 16
435 &edma 17
436 &edma 18
437 &edma 19>;
438 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 439 status = "disabled";
440 };
441
442 spi1: spi@481a0000 {
443 compatible = "ti,omap4-mcspi";
444 #address-cells = <1>;
445 #size-cells = <0>;
446 reg = <0x481a0000 0x400>;
7b3754c6 447 interrupts = <125>;
9fd3c748
PA		 448 ti,spi-num-cs = <2>;
449 ti,hwmods = "spi1";
f5e2f807
MP		 450 dmas = <&edma 42
451 &edma 43
452 &edma 44
453 &edma 45>;
454 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 455 status = "disabled";
456 };
35b47fbb 457
97238b35
SAS		 458 usb: usb@47400000 {
459 compatible = "ti,am33xx-usb";
460 reg = <0x47400000 0x1000>;
461 ranges;
462 #address-cells = <1>;
463 #size-cells = <1>;
35b47fbb 464 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 465 status = "disabled";
466
8abcdd68 467 usb_ctrl_mod: control@44e10620 {
97238b35
SAS		 468 compatible = "ti,am335x-usb-ctrl-module";
469 reg = <0x44e10620 0x10
470 0x44e10648 0x4>;
471 reg-names = "phy_ctrl", "wakeup";
472 status = "disabled";
473 };
474
c031a7d4 475 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 476 compatible = "ti,am335x-usb-phy";
477 reg = <0x47401300 0x100>;
478 reg-names = "phy";
479 status = "disabled";
e7243b76 480 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 481 };
482
483 usb0: usb@47401000 {
484 compatible = "ti,musb-am33xx";
97238b35 485 status = "disabled";
c031a7d4
SAS		 486 reg = <0x47401400 0x400
487 0x47401000 0x200>;
488 reg-names = "mc", "control";
489
490 interrupts = <18>;
491 interrupt-names = "mc";
492 dr_mode = "otg";
493 mentor,multipoint = <1>;
494 mentor,num-eps = <16>;
495 mentor,ram-bits = <12>;
496 mentor,power = <500>;
497 phys = <&usb0_phy>;
9b3452d1
SAS		 498
499 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
500 &cppi41dma 2 0 &cppi41dma 3 0
501 &cppi41dma 4 0 &cppi41dma 5 0
502 &cppi41dma 6 0 &cppi41dma 7 0
503 &cppi41dma 8 0 &cppi41dma 9 0
504 &cppi41dma 10 0 &cppi41dma 11 0
505 &cppi41dma 12 0 &cppi41dma 13 0
506 &cppi41dma 14 0 &cppi41dma 0 1
507 &cppi41dma 1 1 &cppi41dma 2 1
508 &cppi41dma 3 1 &cppi41dma 4 1
509 &cppi41dma 5 1 &cppi41dma 6 1
510 &cppi41dma 7 1 &cppi41dma 8 1
511 &cppi41dma 9 1 &cppi41dma 10 1
512 &cppi41dma 11 1 &cppi41dma 12 1
513 &cppi41dma 13 1 &cppi41dma 14 1>;
514 dma-names =
515 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
516 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
517 "rx14", "rx15",
518 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
519 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
520 "tx14", "tx15";
97238b35
SAS		 521 };
522
c031a7d4 523 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 524 compatible = "ti,am335x-usb-phy";
525 reg = <0x47401b00 0x100>;
526 reg-names = "phy";
527 status = "disabled";
e7243b76 528 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 529 };
530
531 usb1: usb@47401800 {
532 compatible = "ti,musb-am33xx";
97238b35 533 status = "disabled";
c031a7d4
SAS		 534 reg = <0x47401c00 0x400
535 0x47401800 0x200>;
536 reg-names = "mc", "control";
537 interrupts = <19>;
538 interrupt-names = "mc";
539 dr_mode = "otg";
540 mentor,multipoint = <1>;
541 mentor,num-eps = <16>;
542 mentor,ram-bits = <12>;
543 mentor,power = <500>;
544 phys = <&usb1_phy>;
9b3452d1
SAS		 545
546 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
547 &cppi41dma 17 0 &cppi41dma 18 0
548 &cppi41dma 19 0 &cppi41dma 20 0
549 &cppi41dma 21 0 &cppi41dma 22 0
550 &cppi41dma 23 0 &cppi41dma 24 0
551 &cppi41dma 25 0 &cppi41dma 26 0
552 &cppi41dma 27 0 &cppi41dma 28 0
553 &cppi41dma 29 0 &cppi41dma 15 1
554 &cppi41dma 16 1 &cppi41dma 17 1
555 &cppi41dma 18 1 &cppi41dma 19 1
556 &cppi41dma 20 1 &cppi41dma 21 1
557 &cppi41dma 22 1 &cppi41dma 23 1
558 &cppi41dma 24 1 &cppi41dma 25 1
559 &cppi41dma 26 1 &cppi41dma 27 1
560 &cppi41dma 28 1 &cppi41dma 29 1>;
561 dma-names =
562 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
563 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
564 "rx14", "rx15",
565 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
566 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
567 "tx14", "tx15";
97238b35 568 };
9b3452d1 569
8abcdd68 570 cppi41dma: dma-controller@47402000 {
9b3452d1
SAS		 571 compatible = "ti,am3359-cppi41";
572 reg = <0x47400000 0x1000
573 0x47402000 0x1000
574 0x47403000 0x1000
575 0x47404000 0x4000>;
3b6394b4 576 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 577 interrupts = <17>;
578 interrupt-names = "glue";
579 #dma-cells = <2>;
580 #dma-channels = <30>;
581 #dma-requests = <256>;
582 status = "disabled";
583 };
35b47fbb 584 };
6be35c70 585
0a7486c9
PA		 586 epwmss0: epwmss@48300000 {
587 compatible = "ti,am33xx-pwmss";
588 reg = <0x48300000 0x10>;
589 ti,hwmods = "epwmss0";
590 #address-cells = <1>;
591 #size-cells = <1>;
592 status = "disabled";
593 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
594 0x48300180 0x48300180 0x80 /* EQEP */
595 0x48300200 0x48300200 0x80>; /* EHRPWM */
596
597 ecap0: ecap@48300100 {
598 compatible = "ti,am33xx-ecap";
599 #pwm-cells = <3>;
600 reg = <0x48300100 0x80>;
e8c85a3e
MP		 601 interrupts = <31>;
602 interrupt-names = "ecap0";
0a7486c9
PA		 603 ti,hwmods = "ecap0";
604 status = "disabled";
605 };
606
607 ehrpwm0: ehrpwm@48300200 {
608 compatible = "ti,am33xx-ehrpwm";
609 #pwm-cells = <3>;
610 reg = <0x48300200 0x80>;
611 ti,hwmods = "ehrpwm0";
612 status = "disabled";
613 };
614 };
615
616 epwmss1: epwmss@48302000 {
617 compatible = "ti,am33xx-pwmss";
618 reg = <0x48302000 0x10>;
619 ti,hwmods = "epwmss1";
620 #address-cells = <1>;
621 #size-cells = <1>;
622 status = "disabled";
623 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
624 0x48302180 0x48302180 0x80 /* EQEP */
625 0x48302200 0x48302200 0x80>; /* EHRPWM */
626
627 ecap1: ecap@48302100 {
628 compatible = "ti,am33xx-ecap";
629 #pwm-cells = <3>;
630 reg = <0x48302100 0x80>;
e8c85a3e
MP		 631 interrupts = <47>;
632 interrupt-names = "ecap1";
0a7486c9
PA		 633 ti,hwmods = "ecap1";
634 status = "disabled";
635 };
636
637 ehrpwm1: ehrpwm@48302200 {
638 compatible = "ti,am33xx-ehrpwm";
639 #pwm-cells = <3>;
640 reg = <0x48302200 0x80>;
641 ti,hwmods = "ehrpwm1";
642 status = "disabled";
643 };
644 };
645
646 epwmss2: epwmss@48304000 {
647 compatible = "ti,am33xx-pwmss";
648 reg = <0x48304000 0x10>;
649 ti,hwmods = "epwmss2";
650 #address-cells = <1>;
651 #size-cells = <1>;
652 status = "disabled";
653 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
654 0x48304180 0x48304180 0x80 /* EQEP */
655 0x48304200 0x48304200 0x80>; /* EHRPWM */
656
657 ecap2: ecap@48304100 {
658 compatible = "ti,am33xx-ecap";
659 #pwm-cells = <3>;
660 reg = <0x48304100 0x80>;
e8c85a3e
MP		 661 interrupts = <61>;
662 interrupt-names = "ecap2";
0a7486c9
PA		 663 ti,hwmods = "ecap2";
664 status = "disabled";
665 };
666
667 ehrpwm2: ehrpwm@48304200 {
668 compatible = "ti,am33xx-ehrpwm";
669 #pwm-cells = <3>;
670 reg = <0x48304200 0x80>;
671 ti,hwmods = "ehrpwm2";
672 status = "disabled";
673 };
674 };
675
1a39a65c
M		 676 mac: ethernet@4a100000 {
677 compatible = "ti,cpsw";
678 ti,hwmods = "cpgmac0";
0987a6ef
GC		 679 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
680 clock-names = "fck", "cpts";
1a39a65c
M		 681 cpdma_channels = <8>;
682 ale_entries = <1024>;
683 bd_ram_size = <0x2000>;
684 no_bd_ram = <0>;
685 rx_descs = <64>;
686 mac_control = <0x20>;
687 slaves = <2>;
e86ac13b 688 active_slave = <0>;
1a39a65c
M		 689 cpts_clock_mult = <0x80000000>;
690 cpts_clock_shift = <29>;
691 reg = <0x4a100000 0x800
692 0x4a101200 0x100>;
693 #address-cells = <1>;
694 #size-cells = <1>;
695 interrupt-parent = <&intc>;
696 /*
697 * c0_rx_thresh_pend
698 * c0_rx_pend
699 * c0_tx_pend
700 * c0_misc_pend
701 */
702 interrupts = <40 41 42 43>;
703 ranges;
fa5f4adf 704 syscon = <&cm>;
16c75a13 705 status = "disabled";
1a39a65c
M		 706
707 davinci_mdio: mdio@4a101000 {
708 compatible = "ti,davinci_mdio";
709 #address-cells = <1>;
710 #size-cells = <0>;
711 ti,hwmods = "davinci_mdio";
712 bus_freq = <1000000>;
713 reg = <0x4a101000 0x100>;
16c75a13 714 status = "disabled";
1a39a65c
M		 715 };
716
717 cpsw_emac0: slave@4a100200 {
718 /* Filled in by U-Boot */
719 mac-address = [ 00 00 00 00 00 00 ];
720 };
721
722 cpsw_emac1: slave@4a100300 {
723 /* Filled in by U-Boot */
724 mac-address = [ 00 00 00 00 00 00 ];
725 };
39ffbd91
M		 726
727 phy_sel: cpsw-phy-sel@44e10650 {
728 compatible = "ti,am3352-cpsw-phy-sel";
729 reg= <0x44e10650 0x4>;
730 reg-names = "gmii-sel";
731 };
1a39a65c 732 };
f6575c90
VB		 733
734 ocmcram: ocmcram@40300000 {
735 compatible = "ti,am3352-ocmcram";
736 reg = <0x40300000 0x10000>;
737 ti,hwmods = "ocmcram";
f6575c90
VB		 738 };
739
740 wkup_m3: wkup_m3@44d00000 {
741 compatible = "ti,am3353-wkup-m3";
742 reg = <0x44d00000 0x4000 /* M3 UMEM */
743 0x44d80000 0x2000>; /* M3 DMEM */
744 ti,hwmods = "wkup_m3";
f12ecbe2 745 ti,no-reset-on-init;
f6575c90 746 };
e45879ec 747
15e8246b
PA		 748 elm: elm@48080000 {
749 compatible = "ti,am3352-elm";
750 reg = <0x48080000 0x2000>;
751 interrupts = <4>;
752 ti,hwmods = "elm";
d6cfc1e2
BP		 753 status = "disabled";
754 };
755
756 lcdc: lcdc@4830e000 {
757 compatible = "ti,am33xx-tilcdc";
758 reg = <0x4830e000 0x1000>;
759 interrupt-parent = <&intc>;
760 interrupts = <36>;
761 ti,hwmods = "lcdc";
15e8246b
PA		 762 status = "disabled";
763 };
764
a82279dd
PR		 765 tscadc: tscadc@44e0d000 {
766 compatible = "ti,am3359-tscadc";
767 reg = <0x44e0d000 0x1000>;
768 interrupt-parent = <&intc>;
769 interrupts = <16>;
770 ti,hwmods = "adc_tsc";
771 status = "disabled";
772
773 tsc {
774 compatible = "ti,am3359-tsc";
775 };
776 am335x_adc: adc {
777 #io-channel-cells = <1>;
778 compatible = "ti,am3359-adc";
779 };
a82279dd
PR		 780 };
781
e45879ec
PA		 782 gpmc: gpmc@50000000 {
783 compatible = "ti,am3352-gpmc";
784 ti,hwmods = "gpmc";
f12ecbe2 785 ti,no-idle-on-init;
e45879ec
PA		 786 reg = <0x50000000 0x2000>;
787 interrupts = <100>;
00dddcaa
LP		 788 gpmc,num-cs = <7>;
789 gpmc,num-waitpins = <2>;
e45879ec
PA		 790 #address-cells = <2>;
791 #size-cells = <1>;
792 status = "disabled";
793 };
f8302e1e
MG		 794
795 sham: sham@53100000 {
796 compatible = "ti,omap4-sham";
797 ti,hwmods = "sham";
798 reg = <0x53100000 0x200>;
799 interrupts = <109>;
800 dmas = <&edma 36>;
801 dma-names = "rx";
802 };
99919e5e
MG		 803
804 aes: aes@53500000 {
805 compatible = "ti,omap4-aes";
806 ti,hwmods = "aes";
807 reg = <0x53500000 0xa0>;
7af8884a 808 interrupts = <103>;
99919e5e
MG		 809 dmas = <&edma 6>,
810 <&edma 5>;
811 dma-names = "tx", "rx";
812 };
3f72f875
PA		 813
814 mcasp0: mcasp@48038000 {
815 compatible = "ti,am33xx-mcasp-audio";
816 ti,hwmods = "mcasp0";
0bee55ab
JS		 817 reg = <0x48038000 0x2000>,
818 <0x46000000 0x400000>;
819 reg-names = "mpu", "dat";
3f72f875 820 interrupts = <80>, <81>;
ae107d06 821 interrupt-names = "tx", "rx";
3f72f875
PA		 822 status = "disabled";
823 dmas = <&edma 8>,
824 <&edma 9>;
825 dma-names = "tx", "rx";
826 };
827
828 mcasp1: mcasp@4803C000 {
829 compatible = "ti,am33xx-mcasp-audio";
830 ti,hwmods = "mcasp1";
0bee55ab
JS		 831 reg = <0x4803C000 0x2000>,
832 <0x46400000 0x400000>;
833 reg-names = "mpu", "dat";
3f72f875 834 interrupts = <82>, <83>;
ae107d06 835 interrupt-names = "tx", "rx";
3f72f875
PA		 836 status = "disabled";
837 dmas = <&edma 10>,
838 <&edma 11>;
839 dma-names = "tx", "rx";
840 };
ed845d6b
LV		 841
842 rng: rng@48310000 {
843 compatible = "ti,omap4-rng";
844 ti,hwmods = "rng";
845 reg = <0x48310000 0x2000>;
846 interrupts = <111>;
847 };
5fc0b42a
AC		 848 };
849};
ea291c98
TK		 850
851/include/ "am33xx-clocks.dtsi"
Linux 6.x block layer and io_uring tree(s)