ARM: dts: Add support for Newflow NanoBone board
[linux-2.6-block.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
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1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
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15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
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19
20 aliases {
6a968678
NM
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
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VH
24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
7a57ee87
AC
30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
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SAS
32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
8170056d
DM
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
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38 };
39
40 cpus {
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LP
41 #address-cells = <1>;
42 #size-cells = <0>;
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43 cpu@0 {
44 compatible = "arm,cortex-a8";
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LP
45 device_type = "cpu";
46 reg = <0>;
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AC
47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
61 clock-latency = <300000>; /* From omap-cpufreq driver */
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62 };
63 };
64
6797cdbe
AB
65 pmu {
66 compatible = "arm,cortex-a8-pmu";
67 interrupts = <3>;
68 };
69
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70 /*
71 * The soc node represents the soc top level view. It is uses for IPs
72 * that are not memory mapped in the MPU view or for the MPU itself.
73 */
74 soc {
75 compatible = "ti,omap-infra";
76 mpu {
77 compatible = "ti,omap3-mpu";
78 ti,hwmods = "mpu";
79 };
80 };
81
b552dfc4
AC
82 am33xx_pinmux: pinmux@44e10800 {
83 compatible = "pinctrl-single";
84 reg = <0x44e10800 0x0238>;
85 #address-cells = <1>;
86 #size-cells = <0>;
87 pinctrl-single,register-width = <32>;
88 pinctrl-single,function-mask = <0x7f>;
89 };
90
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AC
91 /*
92 * XXX: Use a flat representation of the AM33XX interconnect.
93 * The real AM33XX interconnect network is quite complex.Since
94 * that will not bring real advantage to represent that in DT
95 * for the moment, just use a fake OCP bus entry to represent
96 * the whole bus hierarchy.
97 */
98 ocp {
99 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103 ti,hwmods = "l3_main";
104
105 intc: interrupt-controller@48200000 {
106 compatible = "ti,omap2-intc";
107 interrupt-controller;
108 #interrupt-cells = <1>;
109 ti,intc-size = <128>;
110 reg = <0x48200000 0x1000>;
111 };
112
505975d3
MP
113 edma: edma@49000000 {
114 compatible = "ti,edma3";
115 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
116 reg = <0x49000000 0x10000>,
117 <0x44e10f90 0x10>;
118 interrupts = <12 13 14>;
119 #dma-cells = <1>;
120 dma-channels = <64>;
121 ti,edma-regions = <4>;
122 ti,edma-slots = <256>;
123 };
124
b918e2c0 125 gpio0: gpio@44e07000 {
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126 compatible = "ti,omap4-gpio";
127 ti,hwmods = "gpio1";
128 gpio-controller;
129 #gpio-cells = <2>;
130 interrupt-controller;
5eac0eb7 131 #interrupt-cells = <2>;
4462b31c 132 reg = <0x44e07000 0x1000>;
4462b31c 133 interrupts = <96>;
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AC
134 };
135
b918e2c0 136 gpio1: gpio@4804c000 {
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137 compatible = "ti,omap4-gpio";
138 ti,hwmods = "gpio2";
139 gpio-controller;
140 #gpio-cells = <2>;
141 interrupt-controller;
5eac0eb7 142 #interrupt-cells = <2>;
4462b31c 143 reg = <0x4804c000 0x1000>;
4462b31c 144 interrupts = <98>;
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145 };
146
b918e2c0 147 gpio2: gpio@481ac000 {
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148 compatible = "ti,omap4-gpio";
149 ti,hwmods = "gpio3";
150 gpio-controller;
151 #gpio-cells = <2>;
152 interrupt-controller;
5eac0eb7 153 #interrupt-cells = <2>;
4462b31c 154 reg = <0x481ac000 0x1000>;
4462b31c 155 interrupts = <32>;
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156 };
157
b918e2c0 158 gpio3: gpio@481ae000 {
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159 compatible = "ti,omap4-gpio";
160 ti,hwmods = "gpio4";
161 gpio-controller;
162 #gpio-cells = <2>;
163 interrupt-controller;
5eac0eb7 164 #interrupt-cells = <2>;
4462b31c 165 reg = <0x481ae000 0x1000>;
4462b31c 166 interrupts = <62>;
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167 };
168
dde3b0d6 169 uart0: serial@44e09000 {
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170 compatible = "ti,omap3-uart";
171 ti,hwmods = "uart1";
172 clock-frequency = <48000000>;
4462b31c 173 reg = <0x44e09000 0x2000>;
4462b31c 174 interrupts = <72>;
53d91034 175 status = "disabled";
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176 };
177
dde3b0d6 178 uart1: serial@48022000 {
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179 compatible = "ti,omap3-uart";
180 ti,hwmods = "uart2";
181 clock-frequency = <48000000>;
4462b31c 182 reg = <0x48022000 0x2000>;
4462b31c 183 interrupts = <73>;
53d91034 184 status = "disabled";
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185 };
186
dde3b0d6 187 uart2: serial@48024000 {
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188 compatible = "ti,omap3-uart";
189 ti,hwmods = "uart3";
190 clock-frequency = <48000000>;
4462b31c 191 reg = <0x48024000 0x2000>;
4462b31c 192 interrupts = <74>;
53d91034 193 status = "disabled";
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194 };
195
dde3b0d6 196 uart3: serial@481a6000 {
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197 compatible = "ti,omap3-uart";
198 ti,hwmods = "uart4";
199 clock-frequency = <48000000>;
4462b31c 200 reg = <0x481a6000 0x2000>;
4462b31c 201 interrupts = <44>;
53d91034 202 status = "disabled";
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203 };
204
dde3b0d6 205 uart4: serial@481a8000 {
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206 compatible = "ti,omap3-uart";
207 ti,hwmods = "uart5";
208 clock-frequency = <48000000>;
4462b31c 209 reg = <0x481a8000 0x2000>;
4462b31c 210 interrupts = <45>;
53d91034 211 status = "disabled";
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212 };
213
dde3b0d6 214 uart5: serial@481aa000 {
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215 compatible = "ti,omap3-uart";
216 ti,hwmods = "uart6";
217 clock-frequency = <48000000>;
4462b31c 218 reg = <0x481aa000 0x2000>;
4462b31c 219 interrupts = <46>;
53d91034 220 status = "disabled";
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221 };
222
b918e2c0 223 i2c0: i2c@44e0b000 {
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224 compatible = "ti,omap4-i2c";
225 #address-cells = <1>;
226 #size-cells = <0>;
227 ti,hwmods = "i2c1";
4462b31c 228 reg = <0x44e0b000 0x1000>;
4462b31c 229 interrupts = <70>;
53d91034 230 status = "disabled";
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231 };
232
b918e2c0 233 i2c1: i2c@4802a000 {
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234 compatible = "ti,omap4-i2c";
235 #address-cells = <1>;
236 #size-cells = <0>;
237 ti,hwmods = "i2c2";
4462b31c 238 reg = <0x4802a000 0x1000>;
4462b31c 239 interrupts = <71>;
53d91034 240 status = "disabled";
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241 };
242
b918e2c0 243 i2c2: i2c@4819c000 {
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244 compatible = "ti,omap4-i2c";
245 #address-cells = <1>;
246 #size-cells = <0>;
247 ti,hwmods = "i2c3";
4462b31c 248 reg = <0x4819c000 0x1000>;
4462b31c 249 interrupts = <30>;
53d91034 250 status = "disabled";
5fc0b42a 251 };
5f789ebc 252
55b4452b
MP
253 mmc1: mmc@48060000 {
254 compatible = "ti,omap4-hsmmc";
255 ti,hwmods = "mmc1";
256 ti,dual-volt;
257 ti,needs-special-reset;
258 ti,needs-special-hs-handling;
259 dmas = <&edma 24
260 &edma 25>;
261 dma-names = "tx", "rx";
262 interrupts = <64>;
263 interrupt-parent = <&intc>;
264 reg = <0x48060000 0x1000>;
265 status = "disabled";
266 };
267
268 mmc2: mmc@481d8000 {
269 compatible = "ti,omap4-hsmmc";
270 ti,hwmods = "mmc2";
271 ti,needs-special-reset;
272 dmas = <&edma 2
273 &edma 3>;
274 dma-names = "tx", "rx";
275 interrupts = <28>;
276 interrupt-parent = <&intc>;
277 reg = <0x481d8000 0x1000>;
278 status = "disabled";
279 };
280
281 mmc3: mmc@47810000 {
282 compatible = "ti,omap4-hsmmc";
283 ti,hwmods = "mmc3";
284 ti,needs-special-reset;
285 interrupts = <29>;
286 interrupt-parent = <&intc>;
287 reg = <0x47810000 0x1000>;
288 status = "disabled";
289 };
290
5f789ebc
AM
291 wdt2: wdt@44e35000 {
292 compatible = "ti,omap3-wdt";
293 ti,hwmods = "wd_timer2";
4462b31c 294 reg = <0x44e35000 0x1000>;
4462b31c 295 interrupts = <91>;
5f789ebc 296 };
059b185d
AC
297
298 dcan0: d_can@481cc000 {
299 compatible = "bosch,d_can";
300 ti,hwmods = "d_can0";
f178c015
AC
301 reg = <0x481cc000 0x2000
302 0x44e10644 0x4>;
059b185d 303 interrupts = <52>;
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AC
304 status = "disabled";
305 };
306
307 dcan1: d_can@481d0000 {
308 compatible = "bosch,d_can";
309 ti,hwmods = "d_can1";
f178c015
AC
310 reg = <0x481d0000 0x2000
311 0x44e10644 0x4>;
059b185d 312 interrupts = <55>;
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AC
313 status = "disabled";
314 };
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JH
315
316 timer1: timer@44e31000 {
002e1ec5 317 compatible = "ti,am335x-timer-1ms";
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JH
318 reg = <0x44e31000 0x400>;
319 interrupts = <67>;
320 ti,hwmods = "timer1";
321 ti,timer-alwon;
322 };
323
324 timer2: timer@48040000 {
002e1ec5 325 compatible = "ti,am335x-timer";
fab8ad0b
JH
326 reg = <0x48040000 0x400>;
327 interrupts = <68>;
328 ti,hwmods = "timer2";
329 };
330
331 timer3: timer@48042000 {
002e1ec5 332 compatible = "ti,am335x-timer";
fab8ad0b
JH
333 reg = <0x48042000 0x400>;
334 interrupts = <69>;
335 ti,hwmods = "timer3";
336 };
337
338 timer4: timer@48044000 {
002e1ec5 339 compatible = "ti,am335x-timer";
fab8ad0b
JH
340 reg = <0x48044000 0x400>;
341 interrupts = <92>;
342 ti,hwmods = "timer4";
343 ti,timer-pwm;
344 };
345
346 timer5: timer@48046000 {
002e1ec5 347 compatible = "ti,am335x-timer";
fab8ad0b
JH
348 reg = <0x48046000 0x400>;
349 interrupts = <93>;
350 ti,hwmods = "timer5";
351 ti,timer-pwm;
352 };
353
354 timer6: timer@48048000 {
002e1ec5 355 compatible = "ti,am335x-timer";
fab8ad0b
JH
356 reg = <0x48048000 0x400>;
357 interrupts = <94>;
358 ti,hwmods = "timer6";
359 ti,timer-pwm;
360 };
361
362 timer7: timer@4804a000 {
002e1ec5 363 compatible = "ti,am335x-timer";
fab8ad0b
JH
364 reg = <0x4804a000 0x400>;
365 interrupts = <95>;
366 ti,hwmods = "timer7";
367 ti,timer-pwm;
368 };
0d935c16
AM
369
370 rtc@44e3e000 {
371 compatible = "ti,da830-rtc";
372 reg = <0x44e3e000 0x1000>;
373 interrupts = <75
374 76>;
375 ti,hwmods = "rtc";
376 };
9fd3c748
PA
377
378 spi0: spi@48030000 {
379 compatible = "ti,omap4-mcspi";
380 #address-cells = <1>;
381 #size-cells = <0>;
382 reg = <0x48030000 0x400>;
7b3754c6 383 interrupts = <65>;
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PA
384 ti,spi-num-cs = <2>;
385 ti,hwmods = "spi0";
f5e2f807
MP
386 dmas = <&edma 16
387 &edma 17
388 &edma 18
389 &edma 19>;
390 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA
391 status = "disabled";
392 };
393
394 spi1: spi@481a0000 {
395 compatible = "ti,omap4-mcspi";
396 #address-cells = <1>;
397 #size-cells = <0>;
398 reg = <0x481a0000 0x400>;
7b3754c6 399 interrupts = <125>;
9fd3c748
PA
400 ti,spi-num-cs = <2>;
401 ti,hwmods = "spi1";
f5e2f807
MP
402 dmas = <&edma 42
403 &edma 43
404 &edma 44
405 &edma 45>;
406 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA
407 status = "disabled";
408 };
35b47fbb 409
97238b35
SAS
410 usb: usb@47400000 {
411 compatible = "ti,am33xx-usb";
412 reg = <0x47400000 0x1000>;
413 ranges;
414 #address-cells = <1>;
415 #size-cells = <1>;
35b47fbb 416 ti,hwmods = "usb_otg_hs";
97238b35
SAS
417 status = "disabled";
418
419 ctrl_mod: control@44e10000 {
420 compatible = "ti,am335x-usb-ctrl-module";
421 reg = <0x44e10620 0x10
422 0x44e10648 0x4>;
423 reg-names = "phy_ctrl", "wakeup";
424 status = "disabled";
425 };
426
c031a7d4 427 usb0_phy: usb-phy@47401300 {
97238b35
SAS
428 compatible = "ti,am335x-usb-phy";
429 reg = <0x47401300 0x100>;
430 reg-names = "phy";
431 status = "disabled";
432 ti,ctrl_mod = <&ctrl_mod>;
433 };
434
435 usb0: usb@47401000 {
436 compatible = "ti,musb-am33xx";
97238b35 437 status = "disabled";
c031a7d4
SAS
438 reg = <0x47401400 0x400
439 0x47401000 0x200>;
440 reg-names = "mc", "control";
441
442 interrupts = <18>;
443 interrupt-names = "mc";
444 dr_mode = "otg";
445 mentor,multipoint = <1>;
446 mentor,num-eps = <16>;
447 mentor,ram-bits = <12>;
448 mentor,power = <500>;
449 phys = <&usb0_phy>;
9b3452d1
SAS
450
451 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
452 &cppi41dma 2 0 &cppi41dma 3 0
453 &cppi41dma 4 0 &cppi41dma 5 0
454 &cppi41dma 6 0 &cppi41dma 7 0
455 &cppi41dma 8 0 &cppi41dma 9 0
456 &cppi41dma 10 0 &cppi41dma 11 0
457 &cppi41dma 12 0 &cppi41dma 13 0
458 &cppi41dma 14 0 &cppi41dma 0 1
459 &cppi41dma 1 1 &cppi41dma 2 1
460 &cppi41dma 3 1 &cppi41dma 4 1
461 &cppi41dma 5 1 &cppi41dma 6 1
462 &cppi41dma 7 1 &cppi41dma 8 1
463 &cppi41dma 9 1 &cppi41dma 10 1
464 &cppi41dma 11 1 &cppi41dma 12 1
465 &cppi41dma 13 1 &cppi41dma 14 1>;
466 dma-names =
467 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
468 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
469 "rx14", "rx15",
470 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
471 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
472 "tx14", "tx15";
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SAS
473 };
474
c031a7d4 475 usb1_phy: usb-phy@47401b00 {
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SAS
476 compatible = "ti,am335x-usb-phy";
477 reg = <0x47401b00 0x100>;
478 reg-names = "phy";
479 status = "disabled";
480 ti,ctrl_mod = <&ctrl_mod>;
481 };
482
483 usb1: usb@47401800 {
484 compatible = "ti,musb-am33xx";
97238b35 485 status = "disabled";
c031a7d4
SAS
486 reg = <0x47401c00 0x400
487 0x47401800 0x200>;
488 reg-names = "mc", "control";
489 interrupts = <19>;
490 interrupt-names = "mc";
491 dr_mode = "otg";
492 mentor,multipoint = <1>;
493 mentor,num-eps = <16>;
494 mentor,ram-bits = <12>;
495 mentor,power = <500>;
496 phys = <&usb1_phy>;
9b3452d1
SAS
497
498 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
499 &cppi41dma 17 0 &cppi41dma 18 0
500 &cppi41dma 19 0 &cppi41dma 20 0
501 &cppi41dma 21 0 &cppi41dma 22 0
502 &cppi41dma 23 0 &cppi41dma 24 0
503 &cppi41dma 25 0 &cppi41dma 26 0
504 &cppi41dma 27 0 &cppi41dma 28 0
505 &cppi41dma 29 0 &cppi41dma 15 1
506 &cppi41dma 16 1 &cppi41dma 17 1
507 &cppi41dma 18 1 &cppi41dma 19 1
508 &cppi41dma 20 1 &cppi41dma 21 1
509 &cppi41dma 22 1 &cppi41dma 23 1
510 &cppi41dma 24 1 &cppi41dma 25 1
511 &cppi41dma 26 1 &cppi41dma 27 1
512 &cppi41dma 28 1 &cppi41dma 29 1>;
513 dma-names =
514 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
515 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
516 "rx14", "rx15",
517 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
518 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
519 "tx14", "tx15";
97238b35 520 };
9b3452d1 521
c031a7d4 522 cppi41dma: dma-controller@07402000 {
9b3452d1
SAS
523 compatible = "ti,am3359-cppi41";
524 reg = <0x47400000 0x1000
525 0x47402000 0x1000
526 0x47403000 0x1000
527 0x47404000 0x4000>;
3b6394b4 528 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS
529 interrupts = <17>;
530 interrupt-names = "glue";
531 #dma-cells = <2>;
532 #dma-channels = <30>;
533 #dma-requests = <256>;
534 status = "disabled";
535 };
35b47fbb 536 };
6be35c70 537
0a7486c9
PA
538 epwmss0: epwmss@48300000 {
539 compatible = "ti,am33xx-pwmss";
540 reg = <0x48300000 0x10>;
541 ti,hwmods = "epwmss0";
542 #address-cells = <1>;
543 #size-cells = <1>;
544 status = "disabled";
545 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
546 0x48300180 0x48300180 0x80 /* EQEP */
547 0x48300200 0x48300200 0x80>; /* EHRPWM */
548
549 ecap0: ecap@48300100 {
550 compatible = "ti,am33xx-ecap";
551 #pwm-cells = <3>;
552 reg = <0x48300100 0x80>;
553 ti,hwmods = "ecap0";
554 status = "disabled";
555 };
556
557 ehrpwm0: ehrpwm@48300200 {
558 compatible = "ti,am33xx-ehrpwm";
559 #pwm-cells = <3>;
560 reg = <0x48300200 0x80>;
561 ti,hwmods = "ehrpwm0";
562 status = "disabled";
563 };
564 };
565
566 epwmss1: epwmss@48302000 {
567 compatible = "ti,am33xx-pwmss";
568 reg = <0x48302000 0x10>;
569 ti,hwmods = "epwmss1";
570 #address-cells = <1>;
571 #size-cells = <1>;
572 status = "disabled";
573 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
574 0x48302180 0x48302180 0x80 /* EQEP */
575 0x48302200 0x48302200 0x80>; /* EHRPWM */
576
577 ecap1: ecap@48302100 {
578 compatible = "ti,am33xx-ecap";
579 #pwm-cells = <3>;
580 reg = <0x48302100 0x80>;
581 ti,hwmods = "ecap1";
582 status = "disabled";
583 };
584
585 ehrpwm1: ehrpwm@48302200 {
586 compatible = "ti,am33xx-ehrpwm";
587 #pwm-cells = <3>;
588 reg = <0x48302200 0x80>;
589 ti,hwmods = "ehrpwm1";
590 status = "disabled";
591 };
592 };
593
594 epwmss2: epwmss@48304000 {
595 compatible = "ti,am33xx-pwmss";
596 reg = <0x48304000 0x10>;
597 ti,hwmods = "epwmss2";
598 #address-cells = <1>;
599 #size-cells = <1>;
600 status = "disabled";
601 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
602 0x48304180 0x48304180 0x80 /* EQEP */
603 0x48304200 0x48304200 0x80>; /* EHRPWM */
604
605 ecap2: ecap@48304100 {
606 compatible = "ti,am33xx-ecap";
607 #pwm-cells = <3>;
608 reg = <0x48304100 0x80>;
609 ti,hwmods = "ecap2";
610 status = "disabled";
611 };
612
613 ehrpwm2: ehrpwm@48304200 {
614 compatible = "ti,am33xx-ehrpwm";
615 #pwm-cells = <3>;
616 reg = <0x48304200 0x80>;
617 ti,hwmods = "ehrpwm2";
618 status = "disabled";
619 };
620 };
621
1a39a65c
M
622 mac: ethernet@4a100000 {
623 compatible = "ti,cpsw";
624 ti,hwmods = "cpgmac0";
625 cpdma_channels = <8>;
626 ale_entries = <1024>;
627 bd_ram_size = <0x2000>;
628 no_bd_ram = <0>;
629 rx_descs = <64>;
630 mac_control = <0x20>;
631 slaves = <2>;
e86ac13b 632 active_slave = <0>;
1a39a65c
M
633 cpts_clock_mult = <0x80000000>;
634 cpts_clock_shift = <29>;
635 reg = <0x4a100000 0x800
636 0x4a101200 0x100>;
637 #address-cells = <1>;
638 #size-cells = <1>;
639 interrupt-parent = <&intc>;
640 /*
641 * c0_rx_thresh_pend
642 * c0_rx_pend
643 * c0_tx_pend
644 * c0_misc_pend
645 */
646 interrupts = <40 41 42 43>;
647 ranges;
648
649 davinci_mdio: mdio@4a101000 {
650 compatible = "ti,davinci_mdio";
651 #address-cells = <1>;
652 #size-cells = <0>;
653 ti,hwmods = "davinci_mdio";
654 bus_freq = <1000000>;
655 reg = <0x4a101000 0x100>;
656 };
657
658 cpsw_emac0: slave@4a100200 {
659 /* Filled in by U-Boot */
660 mac-address = [ 00 00 00 00 00 00 ];
661 };
662
663 cpsw_emac1: slave@4a100300 {
664 /* Filled in by U-Boot */
665 mac-address = [ 00 00 00 00 00 00 ];
666 };
1a39a65c 667 };
f6575c90
VB
668
669 ocmcram: ocmcram@40300000 {
670 compatible = "ti,am3352-ocmcram";
671 reg = <0x40300000 0x10000>;
672 ti,hwmods = "ocmcram";
f6575c90
VB
673 };
674
675 wkup_m3: wkup_m3@44d00000 {
676 compatible = "ti,am3353-wkup-m3";
677 reg = <0x44d00000 0x4000 /* M3 UMEM */
678 0x44d80000 0x2000>; /* M3 DMEM */
679 ti,hwmods = "wkup_m3";
f12ecbe2 680 ti,no-reset-on-init;
f6575c90 681 };
e45879ec 682
15e8246b
PA
683 elm: elm@48080000 {
684 compatible = "ti,am3352-elm";
685 reg = <0x48080000 0x2000>;
686 interrupts = <4>;
687 ti,hwmods = "elm";
d6cfc1e2
BP
688 status = "disabled";
689 };
690
691 lcdc: lcdc@4830e000 {
692 compatible = "ti,am33xx-tilcdc";
693 reg = <0x4830e000 0x1000>;
694 interrupt-parent = <&intc>;
695 interrupts = <36>;
696 ti,hwmods = "lcdc";
15e8246b
PA
697 status = "disabled";
698 };
699
a82279dd
PR
700 tscadc: tscadc@44e0d000 {
701 compatible = "ti,am3359-tscadc";
702 reg = <0x44e0d000 0x1000>;
703 interrupt-parent = <&intc>;
704 interrupts = <16>;
705 ti,hwmods = "adc_tsc";
706 status = "disabled";
707
708 tsc {
709 compatible = "ti,am3359-tsc";
710 };
711 am335x_adc: adc {
712 #io-channel-cells = <1>;
713 compatible = "ti,am3359-adc";
714 };
a82279dd
PR
715 };
716
e45879ec
PA
717 gpmc: gpmc@50000000 {
718 compatible = "ti,am3352-gpmc";
719 ti,hwmods = "gpmc";
f12ecbe2 720 ti,no-idle-on-init;
e45879ec
PA
721 reg = <0x50000000 0x2000>;
722 interrupts = <100>;
00dddcaa
LP
723 gpmc,num-cs = <7>;
724 gpmc,num-waitpins = <2>;
e45879ec
PA
725 #address-cells = <2>;
726 #size-cells = <1>;
727 status = "disabled";
728 };
f8302e1e
MG
729
730 sham: sham@53100000 {
731 compatible = "ti,omap4-sham";
732 ti,hwmods = "sham";
733 reg = <0x53100000 0x200>;
734 interrupts = <109>;
735 dmas = <&edma 36>;
736 dma-names = "rx";
737 };
99919e5e
MG
738
739 aes: aes@53500000 {
740 compatible = "ti,omap4-aes";
741 ti,hwmods = "aes";
742 reg = <0x53500000 0xa0>;
7af8884a 743 interrupts = <103>;
99919e5e
MG
744 dmas = <&edma 6>,
745 <&edma 5>;
746 dma-names = "tx", "rx";
747 };
3f72f875
PA
748
749 mcasp0: mcasp@48038000 {
750 compatible = "ti,am33xx-mcasp-audio";
751 ti,hwmods = "mcasp0";
0bee55ab
JS
752 reg = <0x48038000 0x2000>,
753 <0x46000000 0x400000>;
754 reg-names = "mpu", "dat";
3f72f875
PA
755 interrupts = <80>, <81>;
756 interrupts-names = "tx", "rx";
757 status = "disabled";
758 dmas = <&edma 8>,
759 <&edma 9>;
760 dma-names = "tx", "rx";
761 };
762
763 mcasp1: mcasp@4803C000 {
764 compatible = "ti,am33xx-mcasp-audio";
765 ti,hwmods = "mcasp1";
0bee55ab
JS
766 reg = <0x4803C000 0x2000>,
767 <0x46400000 0x400000>;
768 reg-names = "mpu", "dat";
3f72f875
PA
769 interrupts = <82>, <83>;
770 interrupts-names = "tx", "rx";
771 status = "disabled";
772 dmas = <&edma 10>,
773 <&edma 11>;
774 dma-names = "tx", "rx";
775 };
5fc0b42a
AC
776 };
777};