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Merge branch 'for-linus' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jikos...
[linux-2.6-block.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
5fc0b42a
AC		 14/ {
15 compatible = "ti,am33xx";
4c94ac29 16 interrupt-parent = <&intc>;
f8bf0161
JMC		 17 #address-cells = <1>;
18 #size-cells = <1>;
1d8d6d3f 19 chosen { };
5fc0b42a
AC		 20
21 aliases {
6a968678
NM		 22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
dde3b0d6
VH		 25 serial0 = &uart0;
26 serial1 = &uart1;
27 serial2 = &uart2;
28 serial3 = &uart3;
29 serial4 = &uart4;
30 serial5 = &uart5;
7a57ee87
AC		 31 d_can0 = &dcan0;
32 d_can1 = &dcan1;
97238b35
SAS		 33 usb0 = &usb0;
34 usb1 = &usb1;
35 phy0 = &usb0_phy;
36 phy1 = &usb1_phy;
8170056d
DM		 37 ethernet0 = &cpsw_emac0;
38 ethernet1 = &cpsw_emac1;
cddfae25
SM		 39 spi0 = &spi0;
40 spi1 = &spi1;
5fc0b42a
AC		 41 };
42
43 cpus {
2e0d513f
LP		 44 #address-cells = <1>;
45 #size-cells = <0>;
5fc0b42a
AC		 46 cpu@0 {
47 compatible = "arm,cortex-a8";
2e0d513f
LP		 48 device_type = "cpu";
49 reg = <0>;
efeedcf2 50
72ac40fc 51 operating-points-v2 = <&cpu0_opp_table>;
8d766fa2
NM		 52
53 clocks = <&dpll_mpu_ck>;
54 clock-names = "cpu";
55
efeedcf2 56 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 57 };
58 };
59
72ac40fc
DG		 60 cpu0_opp_table: opp-table {
61 compatible = "operating-points-v2-ti-cpu";
62 syscon = <&scm_conf>;
63
64 /*
65 * The three following nodes are marked with opp-suspend
66 * because the can not be enabled simultaneously on a
67 * single SoC.
68 */
b9cb2ba7 69 opp50-300000000 {
72ac40fc
DG		 70 opp-hz = /bits/ 64 <300000000>;
71 opp-microvolt = <950000 931000 969000>;
72 opp-supported-hw = <0x06 0x0010>;
73 opp-suspend;
74 };
75
b9cb2ba7 76 opp100-275000000 {
72ac40fc
DG		 77 opp-hz = /bits/ 64 <275000000>;
78 opp-microvolt = <1100000 1078000 1122000>;
79 opp-supported-hw = <0x01 0x00FF>;
80 opp-suspend;
81 };
82
b9cb2ba7 83 opp100-300000000 {
72ac40fc
DG		 84 opp-hz = /bits/ 64 <300000000>;
85 opp-microvolt = <1100000 1078000 1122000>;
86 opp-supported-hw = <0x06 0x0020>;
87 opp-suspend;
88 };
89
b9cb2ba7 90 opp100-500000000 {
72ac40fc
DG		 91 opp-hz = /bits/ 64 <500000000>;
92 opp-microvolt = <1100000 1078000 1122000>;
93 opp-supported-hw = <0x01 0xFFFF>;
94 };
95
b9cb2ba7 96 opp100-600000000 {
72ac40fc
DG		 97 opp-hz = /bits/ 64 <600000000>;
98 opp-microvolt = <1100000 1078000 1122000>;
99 opp-supported-hw = <0x06 0x0040>;
100 };
101
b9cb2ba7 102 opp120-600000000 {
72ac40fc
DG		 103 opp-hz = /bits/ 64 <600000000>;
104 opp-microvolt = <1200000 1176000 1224000>;
105 opp-supported-hw = <0x01 0xFFFF>;
106 };
107
b9cb2ba7 108 opp120-720000000 {
72ac40fc
DG		 109 opp-hz = /bits/ 64 <720000000>;
110 opp-microvolt = <1200000 1176000 1224000>;
111 opp-supported-hw = <0x06 0x0080>;
112 };
113
b9cb2ba7 114 oppturbo-720000000 {
72ac40fc
DG		 115 opp-hz = /bits/ 64 <720000000>;
116 opp-microvolt = <1260000 1234800 1285200>;
117 opp-supported-hw = <0x01 0xFFFF>;
118 };
119
b9cb2ba7 120 oppturbo-800000000 {
72ac40fc
DG		 121 opp-hz = /bits/ 64 <800000000>;
122 opp-microvolt = <1260000 1234800 1285200>;
123 opp-supported-hw = <0x06 0x0100>;
124 };
125
b9cb2ba7 126 oppnitro-1000000000 {
72ac40fc
DG		 127 opp-hz = /bits/ 64 <1000000000>;
128 opp-microvolt = <1325000 1298500 1351500>;
129 opp-supported-hw = <0x04 0x0200>;
130 };
131 };
132
6797cdbe
AB		 133 pmu {
134 compatible = "arm,cortex-a8-pmu";
135 interrupts = <3>;
136 };
137
5fc0b42a 138 /*
5c5be9db 139 * The soc node represents the soc top level view. It is used for IPs
5fc0b42a
AC		 140 * that are not memory mapped in the MPU view or for the MPU itself.
141 */
142 soc {
143 compatible = "ti,omap-infra";
144 mpu {
145 compatible = "ti,omap3-mpu";
146 ti,hwmods = "mpu";
147 };
148 };
149
150 /*
151 * XXX: Use a flat representation of the AM33XX interconnect.
b7ab524b
GU		 152 * The real AM33XX interconnect network is quite complex. Since
153 * it will not bring real advantage to represent that in DT
5fc0b42a
AC		 154 * for the moment, just use a fake OCP bus entry to represent
155 * the whole bus hierarchy.
156 */
157 ocp {
158 compatible = "simple-bus";
159 #address-cells = <1>;
160 #size-cells = <1>;
161 ranges;
162 ti,hwmods = "l3_main";
163
e3bc5358
TK		 164 l4_wkup: l4_wkup@44c00000 {
165 compatible = "ti,am3-l4-wkup", "simple-bus";
166 #address-cells = <1>;
167 #size-cells = <1>;
168 ranges = <0 0x44c00000 0x280000>;
ea291c98 169
d129be27
SA		 170 wkup_m3: wkup_m3@100000 {
171 compatible = "ti,am3352-wkup-m3";
172 reg = <0x100000 0x4000>,
173 <0x180000 0x2000>;
174 reg-names = "umem", "dmem";
175 ti,hwmods = "wkup_m3";
176 ti,pm-firmware = "am335x-pm-firmware.elf";
177 };
178
e3bc5358
TK		 179 prcm: prcm@200000 {
180 compatible = "ti,am3-prcm";
181 reg = <0x200000 0x4000>;
ea291c98 182
e3bc5358
TK		 183 prcm_clocks: clocks {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 };
ea291c98 187
e3bc5358
TK		 188 prcm_clockdomains: clockdomains {
189 };
ea291c98
TK		 190 };
191
e3bc5358
TK		 192 scm: scm@210000 {
193 compatible = "ti,am3-scm", "simple-bus";
194 reg = <0x210000 0x2000>;
195 #address-cells = <1>;
196 #size-cells = <1>;
be76fd31 197 #pinctrl-cells = <1>;
e3bc5358
TK		 198 ranges = <0 0x210000 0x2000>;
199
200 am33xx_pinmux: pinmux@800 {
201 compatible = "pinctrl-single";
202 reg = <0x800 0x238>;
203 #address-cells = <1>;
204 #size-cells = <0>;
be76fd31 205 #pinctrl-cells = <1>;
e3bc5358
TK		 206 pinctrl-single,register-width = <32>;
207 pinctrl-single,function-mask = <0x7f>;
208 };
209
210 scm_conf: scm_conf@0 {
1aa09df0 211 compatible = "syscon", "simple-bus";
e3bc5358
TK		 212 reg = <0x0 0x800>;
213 #address-cells = <1>;
214 #size-cells = <1>;
1aa09df0 215 ranges = <0 0 0x800>;
e3bc5358
TK		 216
217 scm_clocks: clocks {
218 #address-cells = <1>;
219 #size-cells = <0>;
220 };
221 };
222
99937129
SA		 223 wkup_m3_ipc: wkup_m3_ipc@1324 {
224 compatible = "ti,am3352-wkup-m3-ipc";
225 reg = <0x1324 0x24>;
226 interrupts = <78>;
227 ti,rproc = <&wkup_m3>;
228 mboxes = <&mailbox &mbox_wkupm3>;
229 };
230
b5e50906
PU		 231 edma_xbar: dma-router@f90 {
232 compatible = "ti,am335x-edma-crossbar";
233 reg = <0xf90 0x40>;
234 #dma-cells = <3>;
235 dma-requests = <32>;
236 dma-masters = <&edma>;
237 };
238
e3bc5358
TK		 239 scm_clockdomains: clockdomains {
240 };
ea291c98
TK		 241 };
242 };
243
5fc0b42a 244 intc: interrupt-controller@48200000 {
cab82b76 245 compatible = "ti,am33xx-intc";
5fc0b42a
AC		 246 interrupt-controller;
247 #interrupt-cells = <1>;
5fc0b42a
AC		 248 reg = <0x48200000 0x1000>;
249 };
250
505975d3 251 edma: edma@49000000 {
b5e50906
PU		 252 compatible = "ti,edma3-tpcc";
253 ti,hwmods = "tpcc";
254 reg = <0x49000000 0x10000>;
255 reg-names = "edma3_cc";
505975d3 256 interrupts = <12 13 14>;
a5206553 257 interrupt-names = "edma3_ccint", "edma3_mperr",
b5e50906
PU		 258 "edma3_ccerrint";
259 dma-requests = <64>;
260 #dma-cells = <2>;
261
262 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
263 <&edma_tptc2 0>;
264
265 ti,edma-memcpy-channels = <20 21>;
266 };
267
268 edma_tptc0: tptc@49800000 {
269 compatible = "ti,edma3-tptc";
270 ti,hwmods = "tptc0";
271 reg = <0x49800000 0x100000>;
272 interrupts = <112>;
273 interrupt-names = "edma3_tcerrint";
274 };
275
276 edma_tptc1: tptc@49900000 {
277 compatible = "ti,edma3-tptc";
278 ti,hwmods = "tptc1";
279 reg = <0x49900000 0x100000>;
280 interrupts = <113>;
281 interrupt-names = "edma3_tcerrint";
282 };
283
284 edma_tptc2: tptc@49a00000 {
285 compatible = "ti,edma3-tptc";
286 ti,hwmods = "tptc2";
287 reg = <0x49a00000 0x100000>;
288 interrupts = <114>;
289 interrupt-names = "edma3_tcerrint";
505975d3
MP		 290 };
291
b918e2c0 292 gpio0: gpio@44e07000 {
5fc0b42a
AC		 293 compatible = "ti,omap4-gpio";
294 ti,hwmods = "gpio1";
295 gpio-controller;
296 #gpio-cells = <2>;
297 interrupt-controller;
5eac0eb7 298 #interrupt-cells = <2>;
4462b31c 299 reg = <0x44e07000 0x1000>;
4462b31c 300 interrupts = <96>;
5fc0b42a
AC		 301 };
302
b918e2c0 303 gpio1: gpio@4804c000 {
5fc0b42a
AC		 304 compatible = "ti,omap4-gpio";
305 ti,hwmods = "gpio2";
306 gpio-controller;
307 #gpio-cells = <2>;
308 interrupt-controller;
5eac0eb7 309 #interrupt-cells = <2>;
4462b31c 310 reg = <0x4804c000 0x1000>;
4462b31c 311 interrupts = <98>;
5fc0b42a
AC		 312 };
313
b918e2c0 314 gpio2: gpio@481ac000 {
5fc0b42a
AC		 315 compatible = "ti,omap4-gpio";
316 ti,hwmods = "gpio3";
317 gpio-controller;
318 #gpio-cells = <2>;
319 interrupt-controller;
5eac0eb7 320 #interrupt-cells = <2>;
4462b31c 321 reg = <0x481ac000 0x1000>;
4462b31c 322 interrupts = <32>;
5fc0b42a
AC		 323 };
324
b918e2c0 325 gpio3: gpio@481ae000 {
5fc0b42a
AC		 326 compatible = "ti,omap4-gpio";
327 ti,hwmods = "gpio4";
328 gpio-controller;
329 #gpio-cells = <2>;
330 interrupt-controller;
5eac0eb7 331 #interrupt-cells = <2>;
4462b31c 332 reg = <0x481ae000 0x1000>;
4462b31c 333 interrupts = <62>;
5fc0b42a
AC		 334 };
335
dde3b0d6 336 uart0: serial@44e09000 {
4fcdff9b 337 compatible = "ti,am3352-uart", "ti,omap3-uart";
5fc0b42a
AC		 338 ti,hwmods = "uart1";
339 clock-frequency = <48000000>;
4462b31c 340 reg = <0x44e09000 0x2000>;
4462b31c 341 interrupts = <72>;
53d91034 342 status = "disabled";
b5e50906 343 dmas = <&edma 26 0>, <&edma 27 0>;
13fd3d57 344 dma-names = "tx", "rx";
5fc0b42a
AC		 345 };
346
dde3b0d6 347 uart1: serial@48022000 {
4fcdff9b 348 compatible = "ti,am3352-uart", "ti,omap3-uart";
5fc0b42a
AC		 349 ti,hwmods = "uart2";
350 clock-frequency = <48000000>;
4462b31c 351 reg = <0x48022000 0x2000>;
4462b31c 352 interrupts = <73>;
53d91034 353 status = "disabled";
b5e50906 354 dmas = <&edma 28 0>, <&edma 29 0>;
13fd3d57 355 dma-names = "tx", "rx";
5fc0b42a
AC		 356 };
357
dde3b0d6 358 uart2: serial@48024000 {
4fcdff9b 359 compatible = "ti,am3352-uart", "ti,omap3-uart";
5fc0b42a
AC		 360 ti,hwmods = "uart3";
361 clock-frequency = <48000000>;
4462b31c 362 reg = <0x48024000 0x2000>;
4462b31c 363 interrupts = <74>;
53d91034 364 status = "disabled";
b5e50906 365 dmas = <&edma 30 0>, <&edma 31 0>;
13fd3d57 366 dma-names = "tx", "rx";
5fc0b42a
AC		 367 };
368
dde3b0d6 369 uart3: serial@481a6000 {
4fcdff9b 370 compatible = "ti,am3352-uart", "ti,omap3-uart";
5fc0b42a
AC		 371 ti,hwmods = "uart4";
372 clock-frequency = <48000000>;
4462b31c 373 reg = <0x481a6000 0x2000>;
4462b31c 374 interrupts = <44>;
53d91034 375 status = "disabled";
5fc0b42a
AC		 376 };
377
dde3b0d6 378 uart4: serial@481a8000 {
4fcdff9b 379 compatible = "ti,am3352-uart", "ti,omap3-uart";
5fc0b42a
AC		 380 ti,hwmods = "uart5";
381 clock-frequency = <48000000>;
4462b31c 382 reg = <0x481a8000 0x2000>;
4462b31c 383 interrupts = <45>;
53d91034 384 status = "disabled";
5fc0b42a
AC		 385 };
386
dde3b0d6 387 uart5: serial@481aa000 {
4fcdff9b 388 compatible = "ti,am3352-uart", "ti,omap3-uart";
5fc0b42a
AC		 389 ti,hwmods = "uart6";
390 clock-frequency = <48000000>;
4462b31c 391 reg = <0x481aa000 0x2000>;
4462b31c 392 interrupts = <46>;
53d91034 393 status = "disabled";
5fc0b42a
AC		 394 };
395
b918e2c0 396 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 397 compatible = "ti,omap4-i2c";
398 #address-cells = <1>;
399 #size-cells = <0>;
400 ti,hwmods = "i2c1";
4462b31c 401 reg = <0x44e0b000 0x1000>;
4462b31c 402 interrupts = <70>;
53d91034 403 status = "disabled";
5fc0b42a
AC		 404 };
405
b918e2c0 406 i2c1: i2c@4802a000 {
5fc0b42a
AC		 407 compatible = "ti,omap4-i2c";
408 #address-cells = <1>;
409 #size-cells = <0>;
410 ti,hwmods = "i2c2";
4462b31c 411 reg = <0x4802a000 0x1000>;
4462b31c 412 interrupts = <71>;
53d91034 413 status = "disabled";
5fc0b42a
AC		 414 };
415
b918e2c0 416 i2c2: i2c@4819c000 {
5fc0b42a
AC		 417 compatible = "ti,omap4-i2c";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 ti,hwmods = "i2c3";
4462b31c 421 reg = <0x4819c000 0x1000>;
4462b31c 422 interrupts = <30>;
53d91034 423 status = "disabled";
5fc0b42a 424 };
5f789ebc 425
55b4452b
MP		 426 mmc1: mmc@48060000 {
427 compatible = "ti,omap4-hsmmc";
428 ti,hwmods = "mmc1";
429 ti,dual-volt;
430 ti,needs-special-reset;
431 ti,needs-special-hs-handling;
b5e50906
PU		 432 dmas = <&edma_xbar 24 0 0
433 &edma_xbar 25 0 0>;
55b4452b
MP		 434 dma-names = "tx", "rx";
435 interrupts = <64>;
55b4452b
MP		 436 reg = <0x48060000 0x1000>;
437 status = "disabled";
438 };
439
440 mmc2: mmc@481d8000 {
441 compatible = "ti,omap4-hsmmc";
442 ti,hwmods = "mmc2";
443 ti,needs-special-reset;
b5e50906
PU		 444 dmas = <&edma 2 0
445 &edma 3 0>;
55b4452b
MP		 446 dma-names = "tx", "rx";
447 interrupts = <28>;
55b4452b
MP		 448 reg = <0x481d8000 0x1000>;
449 status = "disabled";
450 };
451
452 mmc3: mmc@47810000 {
453 compatible = "ti,omap4-hsmmc";
454 ti,hwmods = "mmc3";
455 ti,needs-special-reset;
456 interrupts = <29>;
55b4452b
MP		 457 reg = <0x47810000 0x1000>;
458 status = "disabled";
459 };
460
d4cbe80d
SA		 461 hwspinlock: spinlock@480ca000 {
462 compatible = "ti,omap4-hwspinlock";
463 reg = <0x480ca000 0x1000>;
464 ti,hwmods = "spinlock";
34054213 465 #hwlock-cells = <1>;
d4cbe80d
SA		 466 };
467
5f789ebc
AM		 468 wdt2: wdt@44e35000 {
469 compatible = "ti,omap3-wdt";
470 ti,hwmods = "wd_timer2";
4462b31c 471 reg = <0x44e35000 0x1000>;
4462b31c 472 interrupts = <91>;
5f789ebc 473 };
059b185d 474
e23aabc6
RQ		 475 dcan0: can@481cc000 {
476 compatible = "ti,am3352-d_can";
059b185d 477 ti,hwmods = "d_can0";
e23aabc6
RQ		 478 reg = <0x481cc000 0x2000>;
479 clocks = <&dcan0_fck>;
480 clock-names = "fck";
e3bc5358 481 syscon-raminit = <&scm_conf 0x644 0>;
059b185d 482 interrupts = <52>;
059b185d
AC		 483 status = "disabled";
484 };
485
e23aabc6
RQ		 486 dcan1: can@481d0000 {
487 compatible = "ti,am3352-d_can";
059b185d 488 ti,hwmods = "d_can1";
e23aabc6
RQ		 489 reg = <0x481d0000 0x2000>;
490 clocks = <&dcan1_fck>;
491 clock-names = "fck";
e3bc5358 492 syscon-raminit = <&scm_conf 0x644 1>;
059b185d 493 interrupts = <55>;
059b185d
AC		 494 status = "disabled";
495 };
fab8ad0b 496
40242301
SA		 497 mailbox: mailbox@480C8000 {
498 compatible = "ti,omap4-mailbox";
499 reg = <0x480C8000 0x200>;
500 interrupts = <77>;
501 ti,hwmods = "mailbox";
24df0453 502 #mbox-cells = <1>;
40242301
SA		 503 ti,mbox-num-users = <4>;
504 ti,mbox-num-fifos = <8>;
d27704d1 505 mbox_wkupm3: wkup_m3 {
2800971f 506 ti,mbox-send-noirq;
d27704d1
SA		 507 ti,mbox-tx = <0 0 0>;
508 ti,mbox-rx = <0 0 3>;
509 };
40242301
SA		 510 };
511
fab8ad0b 512 timer1: timer@44e31000 {
002e1ec5 513 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 514 reg = <0x44e31000 0x400>;
515 interrupts = <67>;
516 ti,hwmods = "timer1";
517 ti,timer-alwon;
518 };
519
520 timer2: timer@48040000 {
002e1ec5 521 compatible = "ti,am335x-timer";
fab8ad0b
JH		 522 reg = <0x48040000 0x400>;
523 interrupts = <68>;
524 ti,hwmods = "timer2";
525 };
526
527 timer3: timer@48042000 {
002e1ec5 528 compatible = "ti,am335x-timer";
fab8ad0b
JH		 529 reg = <0x48042000 0x400>;
530 interrupts = <69>;
531 ti,hwmods = "timer3";
532 };
533
534 timer4: timer@48044000 {
002e1ec5 535 compatible = "ti,am335x-timer";
fab8ad0b
JH		 536 reg = <0x48044000 0x400>;
537 interrupts = <92>;
538 ti,hwmods = "timer4";
539 ti,timer-pwm;
540 };
541
542 timer5: timer@48046000 {
002e1ec5 543 compatible = "ti,am335x-timer";
fab8ad0b
JH		 544 reg = <0x48046000 0x400>;
545 interrupts = <93>;
546 ti,hwmods = "timer5";
547 ti,timer-pwm;
548 };
549
550 timer6: timer@48048000 {
002e1ec5 551 compatible = "ti,am335x-timer";
fab8ad0b
JH		 552 reg = <0x48048000 0x400>;
553 interrupts = <94>;
554 ti,hwmods = "timer6";
555 ti,timer-pwm;
556 };
557
558 timer7: timer@4804a000 {
002e1ec5 559 compatible = "ti,am335x-timer";
fab8ad0b
JH		 560 reg = <0x4804a000 0x400>;
561 interrupts = <95>;
562 ti,hwmods = "timer7";
563 ti,timer-pwm;
564 };
0d935c16 565
ccd8b9e0 566 rtc: rtc@44e3e000 {
6ac7b4a2 567 compatible = "ti,am3352-rtc", "ti,da830-rtc";
0d935c16
AM		 568 reg = <0x44e3e000 0x1000>;
569 interrupts = <75
570 76>;
571 ti,hwmods = "rtc";
17fad5f3
K		 572 clocks = <&clkdiv32k_ick>;
573 clock-names = "int-clk";
0d935c16 574 };
9fd3c748
PA		 575
576 spi0: spi@48030000 {
577 compatible = "ti,omap4-mcspi";
578 #address-cells = <1>;
579 #size-cells = <0>;
580 reg = <0x48030000 0x400>;
7b3754c6 581 interrupts = <65>;
9fd3c748
PA		 582 ti,spi-num-cs = <2>;
583 ti,hwmods = "spi0";
b5e50906
PU		 584 dmas = <&edma 16 0
585 &edma 17 0
586 &edma 18 0
587 &edma 19 0>;
f5e2f807 588 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 589 status = "disabled";
590 };
591
592 spi1: spi@481a0000 {
593 compatible = "ti,omap4-mcspi";
594 #address-cells = <1>;
595 #size-cells = <0>;
596 reg = <0x481a0000 0x400>;
7b3754c6 597 interrupts = <125>;
9fd3c748
PA		 598 ti,spi-num-cs = <2>;
599 ti,hwmods = "spi1";
b5e50906
PU		 600 dmas = <&edma 42 0
601 &edma 43 0
602 &edma 44 0
603 &edma 45 0>;
f5e2f807 604 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 605 status = "disabled";
606 };
35b47fbb 607
97238b35
SAS		 608 usb: usb@47400000 {
609 compatible = "ti,am33xx-usb";
610 reg = <0x47400000 0x1000>;
611 ranges;
612 #address-cells = <1>;
613 #size-cells = <1>;
35b47fbb 614 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 615 status = "disabled";
616
8abcdd68 617 usb_ctrl_mod: control@44e10620 {
97238b35
SAS		 618 compatible = "ti,am335x-usb-ctrl-module";
619 reg = <0x44e10620 0x10
620 0x44e10648 0x4>;
621 reg-names = "phy_ctrl", "wakeup";
622 status = "disabled";
623 };
624
c031a7d4 625 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 626 compatible = "ti,am335x-usb-phy";
627 reg = <0x47401300 0x100>;
628 reg-names = "phy";
629 status = "disabled";
e7243b76 630 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 631 };
632
633 usb0: usb@47401000 {
634 compatible = "ti,musb-am33xx";
97238b35 635 status = "disabled";
c031a7d4
SAS		 636 reg = <0x47401400 0x400
637 0x47401000 0x200>;
638 reg-names = "mc", "control";
639
640 interrupts = <18>;
641 interrupt-names = "mc";
642 dr_mode = "otg";
643 mentor,multipoint = <1>;
644 mentor,num-eps = <16>;
645 mentor,ram-bits = <12>;
646 mentor,power = <500>;
647 phys = <&usb0_phy>;
9b3452d1
SAS		 648
649 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
650 &cppi41dma 2 0 &cppi41dma 3 0
651 &cppi41dma 4 0 &cppi41dma 5 0
652 &cppi41dma 6 0 &cppi41dma 7 0
653 &cppi41dma 8 0 &cppi41dma 9 0
654 &cppi41dma 10 0 &cppi41dma 11 0
655 &cppi41dma 12 0 &cppi41dma 13 0
656 &cppi41dma 14 0 &cppi41dma 0 1
657 &cppi41dma 1 1 &cppi41dma 2 1
658 &cppi41dma 3 1 &cppi41dma 4 1
659 &cppi41dma 5 1 &cppi41dma 6 1
660 &cppi41dma 7 1 &cppi41dma 8 1
661 &cppi41dma 9 1 &cppi41dma 10 1
662 &cppi41dma 11 1 &cppi41dma 12 1
663 &cppi41dma 13 1 &cppi41dma 14 1>;
664 dma-names =
665 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
666 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
667 "rx14", "rx15",
668 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
669 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
670 "tx14", "tx15";
97238b35
SAS		 671 };
672
c031a7d4 673 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 674 compatible = "ti,am335x-usb-phy";
675 reg = <0x47401b00 0x100>;
676 reg-names = "phy";
677 status = "disabled";
e7243b76 678 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 679 };
680
681 usb1: usb@47401800 {
682 compatible = "ti,musb-am33xx";
97238b35 683 status = "disabled";
c031a7d4
SAS		 684 reg = <0x47401c00 0x400
685 0x47401800 0x200>;
686 reg-names = "mc", "control";
687 interrupts = <19>;
688 interrupt-names = "mc";
689 dr_mode = "otg";
690 mentor,multipoint = <1>;
691 mentor,num-eps = <16>;
692 mentor,ram-bits = <12>;
693 mentor,power = <500>;
694 phys = <&usb1_phy>;
9b3452d1
SAS		 695
696 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
697 &cppi41dma 17 0 &cppi41dma 18 0
698 &cppi41dma 19 0 &cppi41dma 20 0
699 &cppi41dma 21 0 &cppi41dma 22 0
700 &cppi41dma 23 0 &cppi41dma 24 0
701 &cppi41dma 25 0 &cppi41dma 26 0
702 &cppi41dma 27 0 &cppi41dma 28 0
703 &cppi41dma 29 0 &cppi41dma 15 1
704 &cppi41dma 16 1 &cppi41dma 17 1
705 &cppi41dma 18 1 &cppi41dma 19 1
706 &cppi41dma 20 1 &cppi41dma 21 1
707 &cppi41dma 22 1 &cppi41dma 23 1
708 &cppi41dma 24 1 &cppi41dma 25 1
709 &cppi41dma 26 1 &cppi41dma 27 1
710 &cppi41dma 28 1 &cppi41dma 29 1>;
711 dma-names =
712 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
713 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
714 "rx14", "rx15",
715 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
716 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
717 "tx14", "tx15";
97238b35 718 };
9b3452d1 719
8abcdd68 720 cppi41dma: dma-controller@47402000 {
9b3452d1
SAS		 721 compatible = "ti,am3359-cppi41";
722 reg = <0x47400000 0x1000
723 0x47402000 0x1000
724 0x47403000 0x1000
725 0x47404000 0x4000>;
3b6394b4 726 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 727 interrupts = <17>;
728 interrupt-names = "glue";
729 #dma-cells = <2>;
730 #dma-channels = <30>;
731 #dma-requests = <256>;
732 status = "disabled";
733 };
35b47fbb 734 };
6be35c70 735
0a7486c9
PA		 736 epwmss0: epwmss@48300000 {
737 compatible = "ti,am33xx-pwmss";
738 reg = <0x48300000 0x10>;
739 ti,hwmods = "epwmss0";
740 #address-cells = <1>;
741 #size-cells = <1>;
742 status = "disabled";
743 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
744 0x48300180 0x48300180 0x80 /* EQEP */
745 0x48300200 0x48300200 0x80>; /* EHRPWM */
746
747 ecap0: ecap@48300100 {
229110c1
FCJ		 748 compatible = "ti,am3352-ecap",
749 "ti,am33xx-ecap";
0a7486c9
PA		 750 #pwm-cells = <3>;
751 reg = <0x48300100 0x80>;
229110c1
FCJ		 752 clocks = <&l4ls_gclk>;
753 clock-names = "fck";
e8c85a3e
MP		 754 interrupts = <31>;
755 interrupt-names = "ecap0";
0a7486c9
PA		 756 status = "disabled";
757 };
758
dce2a652 759 ehrpwm0: pwm@48300200 {
229110c1
FCJ		 760 compatible = "ti,am3352-ehrpwm",
761 "ti,am33xx-ehrpwm";
0a7486c9
PA		 762 #pwm-cells = <3>;
763 reg = <0x48300200 0x80>;
229110c1
FCJ		 764 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
765 clock-names = "tbclk", "fck";
0a7486c9
PA		 766 status = "disabled";
767 };
768 };
769
770 epwmss1: epwmss@48302000 {
771 compatible = "ti,am33xx-pwmss";
772 reg = <0x48302000 0x10>;
773 ti,hwmods = "epwmss1";
774 #address-cells = <1>;
775 #size-cells = <1>;
776 status = "disabled";
777 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
778 0x48302180 0x48302180 0x80 /* EQEP */
779 0x48302200 0x48302200 0x80>; /* EHRPWM */
780
781 ecap1: ecap@48302100 {
229110c1
FCJ		 782 compatible = "ti,am3352-ecap",
783 "ti,am33xx-ecap";
0a7486c9
PA		 784 #pwm-cells = <3>;
785 reg = <0x48302100 0x80>;
229110c1
FCJ		 786 clocks = <&l4ls_gclk>;
787 clock-names = "fck";
e8c85a3e
MP		 788 interrupts = <47>;
789 interrupt-names = "ecap1";
0a7486c9
PA		 790 status = "disabled";
791 };
792
dce2a652 793 ehrpwm1: pwm@48302200 {
229110c1
FCJ		 794 compatible = "ti,am3352-ehrpwm",
795 "ti,am33xx-ehrpwm";
0a7486c9
PA		 796 #pwm-cells = <3>;
797 reg = <0x48302200 0x80>;
229110c1
FCJ		 798 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
799 clock-names = "tbclk", "fck";
0a7486c9
PA		 800 status = "disabled";
801 };
802 };
803
804 epwmss2: epwmss@48304000 {
805 compatible = "ti,am33xx-pwmss";
806 reg = <0x48304000 0x10>;
807 ti,hwmods = "epwmss2";
808 #address-cells = <1>;
809 #size-cells = <1>;
810 status = "disabled";
811 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
812 0x48304180 0x48304180 0x80 /* EQEP */
813 0x48304200 0x48304200 0x80>; /* EHRPWM */
814
815 ecap2: ecap@48304100 {
229110c1
FCJ		 816 compatible = "ti,am3352-ecap",
817 "ti,am33xx-ecap";
0a7486c9
PA		 818 #pwm-cells = <3>;
819 reg = <0x48304100 0x80>;
229110c1
FCJ		 820 clocks = <&l4ls_gclk>;
821 clock-names = "fck";
e8c85a3e
MP		 822 interrupts = <61>;
823 interrupt-names = "ecap2";
0a7486c9
PA		 824 status = "disabled";
825 };
826
dce2a652 827 ehrpwm2: pwm@48304200 {
229110c1
FCJ		 828 compatible = "ti,am3352-ehrpwm",
829 "ti,am33xx-ehrpwm";
0a7486c9
PA		 830 #pwm-cells = <3>;
831 reg = <0x48304200 0x80>;
229110c1
FCJ		 832 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
833 clock-names = "tbclk", "fck";
0a7486c9
PA		 834 status = "disabled";
835 };
836 };
837
1a39a65c 838 mac: ethernet@4a100000 {
21696f71 839 compatible = "ti,am335x-cpsw","ti,cpsw";
1a39a65c 840 ti,hwmods = "cpgmac0";
0987a6ef
GC		 841 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
842 clock-names = "fck", "cpts";
1a39a65c
M		 843 cpdma_channels = <8>;
844 ale_entries = <1024>;
845 bd_ram_size = <0x2000>;
1a39a65c
M		 846 mac_control = <0x20>;
847 slaves = <2>;
e86ac13b 848 active_slave = <0>;
1a39a65c
M		 849 cpts_clock_mult = <0x80000000>;
850 cpts_clock_shift = <29>;
851 reg = <0x4a100000 0x800
852 0x4a101200 0x100>;
853 #address-cells = <1>;
854 #size-cells = <1>;
1a39a65c
M		 855 /*
856 * c0_rx_thresh_pend
857 * c0_rx_pend
858 * c0_tx_pend
859 * c0_misc_pend
860 */
861 interrupts = <40 41 42 43>;
862 ranges;
e3bc5358 863 syscon = <&scm_conf>;
16c75a13 864 status = "disabled";
1a39a65c
M		 865
866 davinci_mdio: mdio@4a101000 {
9efd1a6f 867 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
1a39a65c
M		 868 #address-cells = <1>;
869 #size-cells = <0>;
870 ti,hwmods = "davinci_mdio";
871 bus_freq = <1000000>;
872 reg = <0x4a101000 0x100>;
16c75a13 873 status = "disabled";
1a39a65c
M		 874 };
875
876 cpsw_emac0: slave@4a100200 {
877 /* Filled in by U-Boot */
878 mac-address = [ 00 00 00 00 00 00 ];
879 };
880
881 cpsw_emac1: slave@4a100300 {
882 /* Filled in by U-Boot */
883 mac-address = [ 00 00 00 00 00 00 ];
884 };
39ffbd91
M		 885
886 phy_sel: cpsw-phy-sel@44e10650 {
887 compatible = "ti,am3352-cpsw-phy-sel";
888 reg= <0x44e10650 0x4>;
889 reg-names = "gmii-sel";
890 };
1a39a65c 891 };
f6575c90
VB		 892
893 ocmcram: ocmcram@40300000 {
8b9a2810
RN		 894 compatible = "mmio-sram";
895 reg = <0x40300000 0x10000>; /* 64k */
f6575c90
VB		 896 };
897
15e8246b
PA		 898 elm: elm@48080000 {
899 compatible = "ti,am3352-elm";
900 reg = <0x48080000 0x2000>;
901 interrupts = <4>;
902 ti,hwmods = "elm";
d6cfc1e2
BP		 903 status = "disabled";
904 };
905
906 lcdc: lcdc@4830e000 {
907 compatible = "ti,am33xx-tilcdc";
908 reg = <0x4830e000 0x1000>;
d6cfc1e2
BP		 909 interrupts = <36>;
910 ti,hwmods = "lcdc";
15e8246b
PA		 911 status = "disabled";
912 };
913
a82279dd
PR		 914 tscadc: tscadc@44e0d000 {
915 compatible = "ti,am3359-tscadc";
916 reg = <0x44e0d000 0x1000>;
a82279dd
PR		 917 interrupts = <16>;
918 ti,hwmods = "adc_tsc";
919 status = "disabled";
55e871fc
M		 920 dmas = <&edma 53 0>, <&edma 57 0>;
921 dma-names = "fifo0", "fifo1";
a82279dd
PR		 922
923 tsc {
924 compatible = "ti,am3359-tsc";
925 };
926 am335x_adc: adc {
927 #io-channel-cells = <1>;
928 compatible = "ti,am3359-adc";
929 };
a82279dd
PR		 930 };
931
e45879ec
PA		 932 gpmc: gpmc@50000000 {
933 compatible = "ti,am3352-gpmc";
934 ti,hwmods = "gpmc";
f12ecbe2 935 ti,no-idle-on-init;
e45879ec
PA		 936 reg = <0x50000000 0x2000>;
937 interrupts = <100>;
a2abf904 938 dmas = <&edma 52 0>;
201c7e33 939 dma-names = "rxtx";
00dddcaa
LP		 940 gpmc,num-cs = <7>;
941 gpmc,num-waitpins = <2>;
e45879ec
PA		 942 #address-cells = <2>;
943 #size-cells = <1>;
03752148
RQ		 944 interrupt-controller;
945 #interrupt-cells = <2>;
4eb4dd57
RQ		 946 gpio-controller;
947 #gpio-cells = <2>;
e45879ec
PA		 948 status = "disabled";
949 };
f8302e1e
MG		 950
951 sham: sham@53100000 {
952 compatible = "ti,omap4-sham";
953 ti,hwmods = "sham";
954 reg = <0x53100000 0x200>;
955 interrupts = <109>;
b5e50906 956 dmas = <&edma 36 0>;
f8302e1e
MG		 957 dma-names = "rx";
958 };
99919e5e
MG		 959
960 aes: aes@53500000 {
961 compatible = "ti,omap4-aes";
962 ti,hwmods = "aes";
963 reg = <0x53500000 0xa0>;
7af8884a 964 interrupts = <103>;
b5e50906
PU		 965 dmas = <&edma 6 0>,
966 <&edma 5 0>;
99919e5e
MG		 967 dma-names = "tx", "rx";
968 };
3f72f875
PA		 969
970 mcasp0: mcasp@48038000 {
971 compatible = "ti,am33xx-mcasp-audio";
972 ti,hwmods = "mcasp0";
0bee55ab
JS		 973 reg = <0x48038000 0x2000>,
974 <0x46000000 0x400000>;
975 reg-names = "mpu", "dat";
3f72f875 976 interrupts = <80>, <81>;
ae107d06 977 interrupt-names = "tx", "rx";
3f72f875 978 status = "disabled";
b5e50906
PU		 979 dmas = <&edma 8 2>,
980 <&edma 9 2>;
3f72f875
PA		 981 dma-names = "tx", "rx";
982 };
983
984 mcasp1: mcasp@4803C000 {
985 compatible = "ti,am33xx-mcasp-audio";
986 ti,hwmods = "mcasp1";
0bee55ab
JS		 987 reg = <0x4803C000 0x2000>,
988 <0x46400000 0x400000>;
989 reg-names = "mpu", "dat";
3f72f875 990 interrupts = <82>, <83>;
ae107d06 991 interrupt-names = "tx", "rx";
3f72f875 992 status = "disabled";
b5e50906
PU		 993 dmas = <&edma 10 2>,
994 <&edma 11 2>;
3f72f875
PA		 995 dma-names = "tx", "rx";
996 };
ed845d6b
LV		 997
998 rng: rng@48310000 {
999 compatible = "ti,omap4-rng";
1000 ti,hwmods = "rng";
1001 reg = <0x48310000 0x2000>;
1002 interrupts = <111>;
1003 };
5fc0b42a
AC		 1004 };
1005};
ea291c98
TK		 1006
1007/include/ "am33xx-clocks.dtsi"
Linux 6.x block layer and io_uring tree(s)