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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux-2.6-block.git] / arch / arm / boot / dts / am335x-evmsk.dts
CommitLineData
571ccb28
AC		 1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * AM335x Starter Kit
11 * http://www.ti.com/tool/tmdssk3358
12 */
13
14/dts-v1/;
15
eb33ef66 16#include "am33xx.dtsi"
eb9bdef1 17#include <dt-bindings/pwm/pwm.h>
571ccb28
AC		 18
19/ {
20 model = "TI AM335x EVM-SK";
21 compatible = "ti,am335x-evmsk", "ti,am33xx";
22
23 cpus {
24 cpu@0 {
25 cpu0-supply = <&vdd1_reg>;
26 };
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x80000000 0x10000000>; /* 256 MB */
32 };
33
571ccb28
AC		 34 vbat: fixedregulator@0 {
35 compatible = "regulator-fixed";
36 regulator-name = "vbat";
37 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <5000000>;
39 regulator-boot-on;
40 };
41
42 lis3_reg: fixedregulator@1 {
43 compatible = "regulator-fixed";
44 regulator-name = "lis3_reg";
45 regulator-boot-on;
46 };
29b0b843 47
90f4f01b
IK		 48 wl12xx_vmmc: fixedregulator@2 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&wl12xx_gpio>;
51 compatible = "regulator-fixed";
52 regulator-name = "vwl1271";
53 regulator-min-microvolt = <1800000>;
54 regulator-max-microvolt = <1800000>;
55 gpio = <&gpio1 29 0>;
56 startup-delay-us = <70000>;
57 enable-active-high;
58 };
59
12f03236
DG		 60 vtt_fixed: fixedregulator@3 {
61 compatible = "regulator-fixed";
62 regulator-name = "vtt";
63 regulator-min-microvolt = <1500000>;
64 regulator-max-microvolt = <1500000>;
65 gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
66 regulator-always-on;
67 regulator-boot-on;
68 enable-active-high;
69 };
70
29b0b843 71 leds {
b8f70c3a
VH		 72 pinctrl-names = "default";
73 pinctrl-0 = <&user_leds_s0>;
74
29b0b843
AC		 75 compatible = "gpio-leds";
76
77 led@1 {
78 label = "evmsk:green:usr0";
e94233c2 79 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
29b0b843
AC		 80 default-state = "off";
81 };
82
83 led@2 {
84 label = "evmsk:green:usr1";
e94233c2 85 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
29b0b843
AC		 86 default-state = "off";
87 };
88
89 led@3 {
90 label = "evmsk:green:mmc0";
e94233c2 91 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
29b0b843
AC		 92 linux,default-trigger = "mmc0";
93 default-state = "off";
94 };
95
96 led@4 {
97 label = "evmsk:green:heartbeat";
e94233c2 98 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
29b0b843
AC		 99 linux,default-trigger = "heartbeat";
100 default-state = "off";
101 };
102 };
00834b78
AC		 103
104 gpio_buttons: gpio_buttons@0 {
105 compatible = "gpio-keys";
106 #address-cells = <1>;
107 #size-cells = <0>;
108
109 switch@1 {
110 label = "button0";
111 linux,code = <0x100>;
e94233c2 112 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
00834b78
AC		 113 };
114
115 switch@2 {
116 label = "button1";
117 linux,code = <0x101>;
e94233c2 118 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
00834b78
AC		 119 };
120
121 switch@3 {
122 label = "button2";
123 linux,code = <0x102>;
e94233c2 124 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
00834b78
AC		 125 gpio-key,wakeup;
126 };
127
128 switch@4 {
129 label = "button3";
130 linux,code = <0x103>;
e94233c2 131 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
00834b78
AC		 132 };
133 };
1632fbde
PA		 134
135 backlight {
136 compatible = "pwm-backlight";
eb9bdef1 137 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
1632fbde
PA		 138 brightness-levels = <0 58 61 66 75 90 125 170 255>;
139 default-brightness-level = <8>;
140 };
b452985b
PU		 141
142 sound {
143 compatible = "ti,da830-evm-audio";
144 ti,model = "AM335x-EVMSK";
145 ti,audio-codec = <&tlv320aic3106>;
146 ti,mcasp-controller = <&mcasp1>;
d2c28923 147 ti,codec-clock-rate = <24000000>;
b452985b
PU		 148 ti,audio-routing =
149 "Headphone Jack", "HPLOUT",
150 "Headphone Jack", "HPROUT";
151 };
571ccb28
AC		 152};
153
82d75afc
JMC		 154&am33xx_pinmux {
155 pinctrl-names = "default";
156 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
157
158 user_leds_s0: user_leds_s0 {
159 pinctrl-single,pins = <
160 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
161 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
162 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
163 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
164 >;
165 };
166
167 gpio_keys_s0: gpio_keys_s0 {
168 pinctrl-single,pins = <
169 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
170 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
171 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
172 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
173 >;
174 };
175
176 i2c0_pins: pinmux_i2c0_pins {
177 pinctrl-single,pins = <
178 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
179 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
180 >;
181 };
182
183 uart0_pins: pinmux_uart0_pins {
184 pinctrl-single,pins = <
185 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
186 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
187 >;
188 };
189
190 clkout2_pin: pinmux_clkout2_pin {
191 pinctrl-single,pins = <
192 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
193 >;
194 };
195
196 ecap2_pins: backlight_pins {
197 pinctrl-single,pins = <
198 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
199 >;
200 };
201
202 cpsw_default: cpsw_default {
203 pinctrl-single,pins = <
204 /* Slave 1 */
205 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
206 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
207 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
208 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
209 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
210 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
211 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
212 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
213 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
214 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
215 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
216 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
217
218 /* Slave 2 */
219 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
220 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
221 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
222 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
223 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
224 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
225 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
226 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
227 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
228 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
229 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
230 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
231 >;
232 };
233
234 cpsw_sleep: cpsw_sleep {
235 pinctrl-single,pins = <
236 /* Slave 1 reset value */
237 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
238 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
239 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
240 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
241 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
242 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
243 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
244 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
245 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
246 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
247 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
248 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
249
250 /* Slave 2 reset value*/
251 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
252 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
253 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
254 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
255 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
256 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
257 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
258 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
259 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
260 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
261 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
262 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
263 >;
264 };
265
266 davinci_mdio_default: davinci_mdio_default {
267 pinctrl-single,pins = <
268 /* MDIO */
269 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
270 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
271 >;
272 };
273
274 davinci_mdio_sleep: davinci_mdio_sleep {
275 pinctrl-single,pins = <
276 /* MDIO reset value */
277 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
278 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
279 >;
280 };
b452985b 281
29ea5efb
PU		 282 mmc1_pins: pinmux_mmc1_pins {
283 pinctrl-single,pins = <
284 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
285 >;
286 };
287
b452985b
PU		 288 mcasp1_pins: mcasp1_pins {
289 pinctrl-single,pins = <
290 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
291 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
292 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
293 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
294 >;
295 };
90f4f01b
IK		 296
297 mmc2_pins: pinmux_mmc2_pins {
298 pinctrl-single,pins = <
299 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
300 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
301 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
302 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
303 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
304 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
305 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
306 >;
307 };
308
309 wl12xx_gpio: pinmux_wl12xx_gpio {
310 pinctrl-single,pins = <
311 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
312 >;
313 };
82d75afc
JMC		 314};
315
e0efaafb
JMC		 316&uart0 {
317 pinctrl-names = "default";
318 pinctrl-0 = <&uart0_pins>;
319
320 status = "okay";
321};
322
323&i2c0 {
324 pinctrl-names = "default";
325 pinctrl-0 = <&i2c0_pins>;
326
327 status = "okay";
328 clock-frequency = <400000>;
329
330 tps: tps@2d {
331 reg = <0x2d>;
332 };
333
334 lis331dlh: lis331dlh@18 {
335 compatible = "st,lis331dlh", "st,lis3lv02d";
336 reg = <0x18>;
337 Vdd-supply = <&lis3_reg>;
338 Vdd_IO-supply = <&lis3_reg>;
339
340 st,click-single-x;
341 st,click-single-y;
342 st,click-single-z;
343 st,click-thresh-x = <10>;
344 st,click-thresh-y = <10>;
345 st,click-thresh-z = <10>;
346 st,irq1-click;
347 st,irq2-click;
348 st,wakeup-x-lo;
349 st,wakeup-x-hi;
350 st,wakeup-y-lo;
351 st,wakeup-y-hi;
352 st,wakeup-z-lo;
353 st,wakeup-z-hi;
354 st,min-limit-x = <120>;
355 st,min-limit-y = <120>;
356 st,min-limit-z = <140>;
357 st,max-limit-x = <550>;
358 st,max-limit-y = <550>;
359 st,max-limit-z = <750>;
360 };
b452985b
PU		 361
362 tlv320aic3106: tlv320aic3106@1b {
363 compatible = "ti,tlv320aic3106";
364 reg = <0x1b>;
365 status = "okay";
366
367 /* Regulators */
368 AVDD-supply = <&vaux2_reg>;
369 IOVDD-supply = <&vaux2_reg>;
370 DRVDD-supply = <&vaux2_reg>;
371 DVDD-supply = <&vbat>;
372 };
e0efaafb
JMC		 373};
374
375&usb {
376 status = "okay";
0f686d20 377};
e0efaafb 378
0f686d20
GM		 379&usb_ctrl_mod {
380 status = "okay";
381};
e0efaafb 382
0f686d20
GM		 383&usb0_phy {
384 status = "okay";
385};
e0efaafb 386
0f686d20
GM		 387&usb1_phy {
388 status = "okay";
389};
eda1a4bf 390
0f686d20
GM		 391&usb0 {
392 status = "okay";
393};
eda1a4bf 394
0f686d20
GM		 395&usb1 {
396 status = "okay";
397 dr_mode = "host";
398};
cae2a9e3 399
0f686d20
GM		 400&cppi41dma {
401 status = "okay";
e0efaafb
JMC		 402};
403
404&epwmss2 {
405 status = "okay";
406
407 ecap2: ecap@48304100 {
408 status = "okay";
409 pinctrl-names = "default";
410 pinctrl-0 = <&ecap2_pins>;
411 };
412};
413
eb33ef66 414#include "tps65910.dtsi"
571ccb28
AC		 415
416&tps {
417 vcc1-supply = <&vbat>;
418 vcc2-supply = <&vbat>;
419 vcc3-supply = <&vbat>;
420 vcc4-supply = <&vbat>;
421 vcc5-supply = <&vbat>;
422 vcc6-supply = <&vbat>;
423 vcc7-supply = <&vbat>;
424 vccio-supply = <&vbat>;
425
426 regulators {
427 vrtc_reg: regulator@0 {
428 regulator-always-on;
429 };
430
431 vio_reg: regulator@1 {
432 regulator-always-on;
433 };
434
435 vdd1_reg: regulator@2 {
436 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
437 regulator-name = "vdd_mpu";
438 regulator-min-microvolt = <912500>;
439 regulator-max-microvolt = <1312500>;
440 regulator-boot-on;
441 regulator-always-on;
442 };
443
444 vdd2_reg: regulator@3 {
445 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
446 regulator-name = "vdd_core";
447 regulator-min-microvolt = <912500>;
448 regulator-max-microvolt = <1150000>;
449 regulator-boot-on;
450 regulator-always-on;
451 };
452
453 vdd3_reg: regulator@4 {
454 regulator-always-on;
455 };
456
457 vdig1_reg: regulator@5 {
458 regulator-always-on;
459 };
460
461 vdig2_reg: regulator@6 {
462 regulator-always-on;
463 };
464
465 vpll_reg: regulator@7 {
466 regulator-always-on;
467 };
468
469 vdac_reg: regulator@8 {
470 regulator-always-on;
471 };
472
473 vaux1_reg: regulator@9 {
474 regulator-always-on;
475 };
476
477 vaux2_reg: regulator@10 {
478 regulator-always-on;
479 };
480
481 vaux33_reg: regulator@11 {
482 regulator-always-on;
483 };
484
485 vmmc_reg: regulator@12 {
55b4452b
MP		 486 regulator-min-microvolt = <1800000>;
487 regulator-max-microvolt = <3300000>;
571ccb28
AC		 488 regulator-always-on;
489 };
490 };
491};
94a924ca
M		 492
493&mac {
494 pinctrl-names = "default", "sleep";
495 pinctrl-0 = <&cpsw_default>;
496 pinctrl-1 = <&cpsw_sleep>;
18c49af3 497 dual_emac = <1>;
16c75a13 498 status = "okay";
94a924ca
M		 499};
500
501&davinci_mdio {
502 pinctrl-names = "default", "sleep";
503 pinctrl-0 = <&davinci_mdio_default>;
504 pinctrl-1 = <&davinci_mdio_sleep>;
16c75a13 505 status = "okay";
94a924ca 506};
496322bc 507
f6655d69
M		 508&cpsw_emac0 {
509 phy_id = <&davinci_mdio>, <0>;
6d75afe2 510 phy-mode = "rgmii-txid";
18c49af3 511 dual_emac_res_vlan = <1>;
f6655d69
M		 512};
513
514&cpsw_emac1 {
515 phy_id = <&davinci_mdio>, <1>;
6d75afe2 516 phy-mode = "rgmii-txid";
18c49af3 517 dual_emac_res_vlan = <2>;
f6655d69 518};
55b4452b
MP		 519
520&mmc1 {
521 status = "okay";
522 vmmc-supply = <&vmmc_reg>;
0d8d40fc 523 bus-width = <4>;
29ea5efb
PU		 524 pinctrl-names = "default";
525 pinctrl-0 = <&mmc1_pins>;
526 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
55b4452b 527};
f8302e1e
MG		 528
529&sham {
530 status = "okay";
531};
99919e5e
MG		 532
533&aes {
534 status = "okay";
535};
6046adb6
RN		 536
537&gpio0 {
538 ti,no-reset-on-init;
539};
b452985b 540
90f4f01b
IK		 541&mmc2 {
542 status = "okay";
543 vmmc-supply = <&wl12xx_vmmc>;
544 ti,non-removable;
545 bus-width = <4>;
546 cap-power-off-card;
547 pinctrl-names = "default";
548 pinctrl-0 = <&mmc2_pins>;
549};
550
b452985b
PU		 551&mcasp1 {
552 pinctrl-names = "default";
553 pinctrl-0 = <&mcasp1_pins>;
554
555 status = "okay";
556
557 op-mode = <0>; /* MCASP_IIS_MODE */
558 tdm-slots = <2>;
559 /* 4 serializers */
560 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
561 0 0 1 2
562 >;
563 tx-num-evt = <1>;
564 rx-num-evt = <1>;
565};
4937e2a6 566
2c027b7c
FB		 567&tscadc {
568 status = "okay";
569 tsc {
570 ti,wires = <4>;
571 ti,x-plate-resistance = <200>;
572 ti,coordinate-readouts = <5>;
573 ti,wire-config = <0x00 0x11 0x22 0x33>;
574 };
575};
Linux 6.x block layer and io_uring tree(s)