[linux-2.6-block.git] / arch / arm / boot / dts / am335x-evm.dts

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"

/ {
	model = "TI AM335x EVM";
	compatible = "ti,am335x-evm", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	am33xx_pinmux: pinmux@44e10800 {
		pinctrl-names = "default";
		pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;

		matrix_keypad_s0: matrix_keypad_s0 {
			pinctrl-single,pins = <
				0x54 0x7	/* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
				0x58 0x7	/* gpmc_a6.gpio1_22, OUTPUT | MODE7 */
				0x64 0x27	/* gpmc_a9.gpio1_25, INPUT | MODE7 */
				0x68 0x27	/* gpmc_a10.gpio1_26, INPUT | MODE7 */
				0x6c 0x27	/* gpmc_a11.gpio1_27, INPUT | MODE7 */
			>;
		};

		volume_keys_s0: volume_keys_s0 {
			pinctrl-single,pins = <
				0x150 0x27	/* spi0_sclk.gpio0_2, INPUT | MODE7 */
				0x154 0x27	/* spi0_d0.gpio0_3, INPUT | MODE7 */
			>;
		};

		i2c0_pins: pinmux_i2c0_pins {
			pinctrl-single,pins = <
				0x188 0x30	/* i2c0_sda.i2c0_sda PULLUP | INPUTENABLE | MODE0 */
				0x18c 0x30	/* i2c0_scl.i2c0_scl PULLUP | INPUTENABLE | MODE0 */
			>;
		};

		i2c1_pins: pinmux_i2c1_pins {
			pinctrl-single,pins = <
				0x158 0x32	/* spi0_d1.i2c1_sda PULLUP | INPUTENABLE | MODE2 */
				0x15c 0x32	/* spi0_cs0.i2c1_scl PULLUP | INPUTENABLE | MODE2 */
			>;
		};

		uart0_pins: pinmux_uart0_pins {
			pinctrl-single,pins = <
				0x170 0x30	/* uart0_rxd.uart0_rxd PULLUP | INPUTENABLE | MODE0 */
				0x174 0x00	/* uart0_txd.uart0_txd PULLDOWN | MODE0 */
			>;
		};

		clkout2_pin: pinmux_clkout2_pin {
			pinctrl-single,pins = <
				0x1b4 0x03	/* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
			>;
		};

		nandflash_pins_s0: nandflash_pins_s0 {
			pinctrl-single,pins = <
				0x0 0x30	/* gpmc_ad0.gpmc_ad0, INPUT | PULLUP | MODE0 */
				0x4 0x30	/* gpmc_ad1.gpmc_ad1, INPUT | PULLUP | MODE0 */
				0x8 0x30	/* gpmc_ad2.gpmc_ad2, INPUT | PULLUP | MODE0 */
				0xc 0x30	/* gpmc_ad3.gpmc_ad3, INPUT | PULLUP | MODE0 */
				0x10 0x30	/* gpmc_ad4.gpmc_ad4, INPUT | PULLUP | MODE0 */
				0x14 0x30	/* gpmc_ad5.gpmc_ad5, INPUT | PULLUP | MODE0 */
				0x18 0x30	/* gpmc_ad6.gpmc_ad6, INPUT | PULLUP | MODE0 */
				0x1c 0x30	/* gpmc_ad7.gpmc_ad7, INPUT | PULLUP | MODE0 */
				0x70 0x30	/* gpmc_wait0.gpmc_wait0, INPUT | PULLUP | MODE0 */
				0x74 0x37	/* gpmc_wpn.gpio0_30, INPUT | PULLUP | MODE7 */
				0x7c 0x8	/* gpmc_csn0.gpmc_csn0,  PULL DISA */
				0x90 0x8	/* gpmc_advn_ale.gpmc_advn_ale, PULL DISA */
				0x94 0x8	/* gpmc_oen_ren.gpmc_oen_ren, PULL DISA */
				0x98 0x8	/* gpmc_wen.gpmc_wen, PULL DISA */
				0x9c 0x8	/* gpmc_be0n_cle.gpmc_be0n_cle, PULL DISA */
			>;
		};
	};

	ocp {
		uart0: serial@44e09000 {
			pinctrl-names = "default";
			pinctrl-0 = <&uart0_pins>;

			status = "okay";
		};

		i2c0: i2c@44e0b000 {
			pinctrl-names = "default";
			pinctrl-0 = <&i2c0_pins>;

			status = "okay";
			clock-frequency = <400000>;

			tps: tps@2d {
				reg = <0x2d>;
			};
		};

		i2c1: i2c@4802a000 {
			pinctrl-names = "default";
			pinctrl-0 = <&i2c1_pins>;

			status = "okay";
			clock-frequency = <100000>;

			lis331dlh: lis331dlh@18 {
				compatible = "st,lis331dlh", "st,lis3lv02d";
				reg = <0x18>;
				Vdd-supply = <&lis3_reg>;
				Vdd_IO-supply = <&lis3_reg>;

				st,click-single-x;
				st,click-single-y;
				st,click-single-z;
				st,click-thresh-x = <10>;
				st,click-thresh-y = <10>;
				st,click-thresh-z = <10>;
				st,irq1-click;
				st,irq2-click;
				st,wakeup-x-lo;
				st,wakeup-x-hi;
				st,wakeup-y-lo;
				st,wakeup-y-hi;
				st,wakeup-z-lo;
				st,wakeup-z-hi;
				st,min-limit-x = <120>;
				st,min-limit-y = <120>;
				st,min-limit-z = <140>;
				st,max-limit-x = <550>;
				st,max-limit-y = <550>;
				st,max-limit-z = <750>;
			};

			tsl2550: tsl2550@39 {
				compatible = "taos,tsl2550";
				reg = <0x39>;
			};

			tmp275: tmp275@48 {
				compatible = "ti,tmp275";
				reg = <0x48>;
			};
		};

		elm: elm@48080000 {
			status = "okay";
		};

		gpmc: gpmc@50000000 {
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <&nandflash_pins_s0>;
			ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
			nand@0,0 {
				reg = <0 0 0>; /* CS0, offset 0 */
				nand-bus-width = <8>;
				ti,nand-ecc-opt = "bch8";
				gpmc,device-nand = "true";
				gpmc,device-width = <1>;
				gpmc,sync-clk-ps = <0>;
				gpmc,cs-on-ns = <0>;
				gpmc,cs-rd-off-ns = <44>;
				gpmc,cs-wr-off-ns = <44>;
				gpmc,adv-on-ns = <6>;
				gpmc,adv-rd-off-ns = <34>;
				gpmc,adv-wr-off-ns = <44>;
				gpmc,we-on-ns = <0>;
				gpmc,we-off-ns = <40>;
				gpmc,oe-on-ns = <0>;
				gpmc,oe-off-ns = <54>;
				gpmc,access-ns = <64>;
				gpmc,rd-cycle-ns = <82>;
				gpmc,wr-cycle-ns = <82>;
				gpmc,wait-on-read = "true";
				gpmc,wait-on-write = "true";
				gpmc,bus-turnaround-ns = <0>;
				gpmc,cycle2cycle-delay-ns = <0>;
				gpmc,clk-activation-ns = <0>;
				gpmc,wait-monitoring-ns = <0>;
				gpmc,wr-access-ns = <40>;
				gpmc,wr-data-mux-bus-ns = <0>;

				#address-cells = <1>;
				#size-cells = <1>;
				elm_id = <&elm>;

				/* MTD partition table */
				partition@0 {
					label = "SPL1";
					reg = <0x00000000 0x000020000>;
				};

				partition@1 {
					label = "SPL2";
					reg = <0x00020000 0x00020000>;
				};

				partition@2 {
					label = "SPL3";
					reg = <0x00040000 0x00020000>;
				};

				partition@3 {
					label = "SPL4";
					reg = <0x00060000 0x00020000>;
				};

				partition@4 {
					label = "U-boot";
					reg = <0x00080000 0x001e0000>;
				};

				partition@5 {
					label = "environment";
					reg = <0x00260000 0x00020000>;
				};

				partition@6 {
					label = "Kernel";
					reg = <0x00280000 0x00500000>;
				};

				partition@7 {
					label = "File-System";
					reg = <0x00780000 0x0F880000>;
				};
			};
		};
	};

	vbat: fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};

	matrix_keypad: matrix_keypad@0 {
		compatible = "gpio-matrix-keypad";
		debounce-delay-ms = <5>;
		col-scan-delay-us = <2>;

		row-gpios = <&gpio1 25 0	/* Bank1, pin25 */
			     &gpio1 26 0	/* Bank1, pin26 */
			     &gpio1 27 0>;	/* Bank1, pin27 */

		col-gpios = <&gpio1 21 0	/* Bank1, pin21 */
			     &gpio1 22 0>;	/* Bank1, pin22 */

		linux,keymap = <0x0000008b	/* MENU */
				0x0100009e	/* BACK */
				0x02000069	/* LEFT */
				0x0001006a	/* RIGHT */
				0x0101001c	/* ENTER */
				0x0201006c>;	/* DOWN */
	};

	gpio_keys: volume_keys@0 {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		autorepeat;

		switch@9 {
			label = "volume-up";
			linux,code = <115>;
			gpios = <&gpio0 2 1>;
			gpio-key,wakeup;
		};

		switch@10 {
			label = "volume-down";
			linux,code = <114>;
			gpios = <&gpio0 3 1>;
			gpio-key,wakeup;
		};
	};
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1312500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-always-on;
		};
	};
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <1>;
};
Commit	Line	Data
32bb00e0 AC	1	/*
	2	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8	/dts-v1/;
	9
eb33ef66	10	#include "am33xx.dtsi"
32bb00e0 AC	11
	12	/ {
	13	model = "TI AM335x EVM";
	14	compatible = "ti,am335x-evm", "ti,am33xx";
	15
efeedcf2 AC	16	cpus {
	17	cpu@0 {
	18	cpu0-supply = <&vdd1_reg>;
	19	};
	20	};
	21
32bb00e0 AC	22	memory {
	23	device_type = "memory";
	24	reg = <0x80000000 0x10000000>; /* 256 MB */
	25	};
53d91034	26
5d9b66f2 AC	27	am33xx_pinmux: pinmux@44e10800 {
5d9b66f2 AC	28	pinctrl-names = "default";
4d927570	29	pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
5d9b66f2 AC	30
	31	matrix_keypad_s0: matrix_keypad_s0 {
	32	pinctrl-single,pins = <
	33	0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT \| MODE7 */
	34	0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT \| MODE7 */
	35	0x64 0x27 /* gpmc_a9.gpio1_25, INPUT \| MODE7 */
	36	0x68 0x27 /* gpmc_a10.gpio1_26, INPUT \| MODE7 */
	37	0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT \| MODE7 */
	38	>;
	39	};
404aa0d7 AC	40
	41	volume_keys_s0: volume_keys_s0 {
	42	pinctrl-single,pins = <
	43	0x150 0x27 /* spi0_sclk.gpio0_2, INPUT \| MODE7 */
	44	0x154 0x27 /* spi0_d0.gpio0_3, INPUT \| MODE7 */
	45	>;
	46	};
3f866445 VH	47
	48	i2c0_pins: pinmux_i2c0_pins {
	49	pinctrl-single,pins = <
	50	0x188 0x30 /* i2c0_sda.i2c0_sda PULLUP \| INPUTENABLE \| MODE0 */
	51	0x18c 0x30 /* i2c0_scl.i2c0_scl PULLUP \| INPUTENABLE \| MODE0 */
	52	>;
	53	};
	54
	55	i2c1_pins: pinmux_i2c1_pins {
	56	pinctrl-single,pins = <
	57	0x158 0x32 /* spi0_d1.i2c1_sda PULLUP \| INPUTENABLE \| MODE2 */
	58	0x15c 0x32 /* spi0_cs0.i2c1_scl PULLUP \| INPUTENABLE \| MODE2 */
	59	>;
	60	};
9f2fbe17 VH	61
	62	uart0_pins: pinmux_uart0_pins {
	63	pinctrl-single,pins = <
	64	0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP \| INPUTENABLE \| MODE0 */
	65	0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN \| MODE0 */
	66	>;
	67	};
4d927570 VH	68
	69	clkout2_pin: pinmux_clkout2_pin {
	70	pinctrl-single,pins = <
	71	0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 \| AM33XX_PIN_OUTPUT */
	72	>;
	73	};
fdc6a2dd PA	74
	75	nandflash_pins_s0: nandflash_pins_s0 {
	76	pinctrl-single,pins = <
	77	0x0 0x30 /* gpmc_ad0.gpmc_ad0, INPUT \| PULLUP \| MODE0 */
	78	0x4 0x30 /* gpmc_ad1.gpmc_ad1, INPUT \| PULLUP \| MODE0 */
	79	0x8 0x30 /* gpmc_ad2.gpmc_ad2, INPUT \| PULLUP \| MODE0 */
	80	0xc 0x30 /* gpmc_ad3.gpmc_ad3, INPUT \| PULLUP \| MODE0 */
	81	0x10 0x30 /* gpmc_ad4.gpmc_ad4, INPUT \| PULLUP \| MODE0 */
	82	0x14 0x30 /* gpmc_ad5.gpmc_ad5, INPUT \| PULLUP \| MODE0 */
	83	0x18 0x30 /* gpmc_ad6.gpmc_ad6, INPUT \| PULLUP \| MODE0 */
	84	0x1c 0x30 /* gpmc_ad7.gpmc_ad7, INPUT \| PULLUP \| MODE0 */
	85	0x70 0x30 /* gpmc_wait0.gpmc_wait0, INPUT \| PULLUP \| MODE0 */
	86	0x74 0x37 /* gpmc_wpn.gpio0_30, INPUT \| PULLUP \| MODE7 */
	87	0x7c 0x8 /* gpmc_csn0.gpmc_csn0, PULL DISA */
	88	0x90 0x8 /* gpmc_advn_ale.gpmc_advn_ale, PULL DISA */
	89	0x94 0x8 /* gpmc_oen_ren.gpmc_oen_ren, PULL DISA */
	90	0x98 0x8 /* gpmc_wen.gpmc_wen, PULL DISA */
	91	0x9c 0x8 /* gpmc_be0n_cle.gpmc_be0n_cle, PULL DISA */
	92	>;
	93	};
5d9b66f2 AC	94	};
5d9b66f2 AC	95
53d91034	96	ocp {
dde3b0d6	97	uart0: serial@44e09000 {
9f2fbe17 VH	98	pinctrl-names = "default";
	99	pinctrl-0 = <&uart0_pins>;
	100
53d91034 VH	101	status = "okay";
53d91034 VH	102	};
1b2a9702	103
b918e2c0	104	i2c0: i2c@44e0b000 {
3f866445 VH	105	pinctrl-names = "default";
	106	pinctrl-0 = <&i2c0_pins>;
	107
1b2a9702 AC	108	status = "okay";
	109	clock-frequency = <400000>;
	110
5d83cb86 VH	111	tps: tps@2d {
5d83cb86 VH	112	reg = <0x2d>;
1b2a9702 AC	113	};
1b2a9702 AC	114	};
492dd024	115
b918e2c0	116	i2c1: i2c@4802a000 {
3f866445 VH	117	pinctrl-names = "default";
	118	pinctrl-0 = <&i2c1_pins>;
	119
492dd024	120	status = "okay";
cd5cfac2	121	clock-frequency = <100000>;
492dd024 AC	122
	123	lis331dlh: lis331dlh@18 {
	124	compatible = "st,lis331dlh", "st,lis3lv02d";
	125	reg = <0x18>;
	126	Vdd-supply = <&lis3_reg>;
	127	Vdd_IO-supply = <&lis3_reg>;
	128
	129	st,click-single-x;
	130	st,click-single-y;
	131	st,click-single-z;
	132	st,click-thresh-x = <10>;
	133	st,click-thresh-y = <10>;
	134	st,click-thresh-z = <10>;
	135	st,irq1-click;
	136	st,irq2-click;
	137	st,wakeup-x-lo;
	138	st,wakeup-x-hi;
	139	st,wakeup-y-lo;
	140	st,wakeup-y-hi;
	141	st,wakeup-z-lo;
	142	st,wakeup-z-hi;
	143	st,min-limit-x = <120>;
	144	st,min-limit-y = <120>;
	145	st,min-limit-z = <140>;
	146	st,max-limit-x = <550>;
	147	st,max-limit-y = <550>;
	148	st,max-limit-z = <750>;
	149	};
bf078553	150
cd5cfac2 AC	151	tsl2550: tsl2550@39 {
	152	compatible = "taos,tsl2550";
	153	reg = <0x39>;
	154	};
	155
bf078553 AC	156	tmp275: tmp275@48 {
	157	compatible = "ti,tmp275";
	158	reg = <0x48>;
	159	};
492dd024	160	};
fdc6a2dd PA	161
	162	elm: elm@48080000 {
	163	status = "okay";
	164	};
	165
	166	gpmc: gpmc@50000000 {
	167	status = "okay";
	168	pinctrl-names = "default";
	169	pinctrl-0 = <&nandflash_pins_s0>;
	170	ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
	171	nand@0,0 {
	172	reg = <0 0 0>; /* CS0, offset 0 */
	173	nand-bus-width = <8>;
	174	ti,nand-ecc-opt = "bch8";
	175	gpmc,device-nand = "true";
	176	gpmc,device-width = <1>;
	177	gpmc,sync-clk-ps = <0>;
	178	gpmc,cs-on-ns = <0>;
	179	gpmc,cs-rd-off-ns = <44>;
	180	gpmc,cs-wr-off-ns = <44>;
	181	gpmc,adv-on-ns = <6>;
	182	gpmc,adv-rd-off-ns = <34>;
	183	gpmc,adv-wr-off-ns = <44>;
	184	gpmc,we-on-ns = <0>;
	185	gpmc,we-off-ns = <40>;
	186	gpmc,oe-on-ns = <0>;
	187	gpmc,oe-off-ns = <54>;
	188	gpmc,access-ns = <64>;
	189	gpmc,rd-cycle-ns = <82>;
	190	gpmc,wr-cycle-ns = <82>;
	191	gpmc,wait-on-read = "true";
	192	gpmc,wait-on-write = "true";
	193	gpmc,bus-turnaround-ns = <0>;
	194	gpmc,cycle2cycle-delay-ns = <0>;
	195	gpmc,clk-activation-ns = <0>;
	196	gpmc,wait-monitoring-ns = <0>;
	197	gpmc,wr-access-ns = <40>;
	198	gpmc,wr-data-mux-bus-ns = <0>;
	199
	200	#address-cells = <1>;
	201	#size-cells = <1>;
	202	elm_id = <&elm>;
	203
	204	/* MTD partition table */
	205	partition@0 {
	206	label = "SPL1";
	207	reg = <0x00000000 0x000020000>;
	208	};
	209
	210	partition@1 {
	211	label = "SPL2";
	212	reg = <0x00020000 0x00020000>;
	213	};
	214
	215	partition@2 {
	216	label = "SPL3";
	217	reg = <0x00040000 0x00020000>;
	218	};
	219
	220	partition@3 {
	221	label = "SPL4";
	222	reg = <0x00060000 0x00020000>;
	223	};
	224
225	partition@4 {
226	label = "U-boot";
227	reg = <0x00080000 0x001e0000>;
228	};
229
230	partition@5 {
231	label = "environment";
232	reg = <0x00260000 0x00020000>;
233	};
234
235	partition@6 {
236	label = "Kernel";
237	reg = <0x00280000 0x00500000>;
238	};
239
240	partition@7 {
241	label = "File-System";
242	reg = <0x00780000 0x0F880000>;
243	};
244	};
245	};
1b2a9702 AC	246	};
	247
	248	vbat: fixedregulator@0 {
	249	compatible = "regulator-fixed";
	250	regulator-name = "vbat";
	251	regulator-min-microvolt = <5000000>;
	252	regulator-max-microvolt = <5000000>;
	253	regulator-boot-on;
	254	};
492dd024 AC	255
	256	lis3_reg: fixedregulator@1 {
	257	compatible = "regulator-fixed";
	258	regulator-name = "lis3_reg";
	259	regulator-boot-on;
	260	};
2ca1d317 AC	261
	262	matrix_keypad: matrix_keypad@0 {
	263	compatible = "gpio-matrix-keypad";
	264	debounce-delay-ms = <5>;
	265	col-scan-delay-us = <2>;
	266
b918e2c0 AC	267	row-gpios = <&gpio1 25 0 /* Bank1, pin25 */
	268	&gpio1 26 0 /* Bank1, pin26 */
	269	&gpio1 27 0>; /* Bank1, pin27 */
2ca1d317	270
b918e2c0 AC	271	col-gpios = <&gpio1 21 0 /* Bank1, pin21 */
b918e2c0 AC	272	&gpio1 22 0>; /* Bank1, pin22 */
2ca1d317 AC	273
	274	linux,keymap = <0x0000008b /* MENU */
	275	0x0100009e /* BACK */
	276	0x02000069 /* LEFT */
	277	0x0001006a /* RIGHT */
	278	0x0101001c /* ENTER */
	279	0x0201006c>; /* DOWN */
	280	};
822c9936 AC	281
	282	gpio_keys: volume_keys@0 {
	283	compatible = "gpio-keys";
	284	#address-cells = <1>;
	285	#size-cells = <0>;
	286	autorepeat;
	287
	288	switch@9 {
	289	label = "volume-up";
	290	linux,code = <115>;
b918e2c0	291	gpios = <&gpio0 2 1>;
822c9936 AC	292	gpio-key,wakeup;
	293	};
	294
	295	switch@10 {
	296	label = "volume-down";
	297	linux,code = <114>;
b918e2c0	298	gpios = <&gpio0 3 1>;
822c9936 AC	299	gpio-key,wakeup;
	300	};
	301	};
1b2a9702 AC	302	};
1b2a9702 AC	303
eb33ef66	304	#include "tps65910.dtsi"
1b2a9702 AC	305
	306	&tps {
	307	vcc1-supply = <&vbat>;
	308	vcc2-supply = <&vbat>;
	309	vcc3-supply = <&vbat>;
	310	vcc4-supply = <&vbat>;
	311	vcc5-supply = <&vbat>;
	312	vcc6-supply = <&vbat>;
	313	vcc7-supply = <&vbat>;
	314	vccio-supply = <&vbat>;
	315
	316	regulators {
	317	vrtc_reg: regulator@0 {
	318	regulator-always-on;
	319	};
	320
	321	vio_reg: regulator@1 {
	322	regulator-always-on;
	323	};
	324
	325	vdd1_reg: regulator@2 {
	326	/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
	327	regulator-name = "vdd_mpu";
	328	regulator-min-microvolt = <912500>;
	329	regulator-max-microvolt = <1312500>;
	330	regulator-boot-on;
	331	regulator-always-on;
	332	};
	333
	334	vdd2_reg: regulator@3 {
	335	/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
	336	regulator-name = "vdd_core";
	337	regulator-min-microvolt = <912500>;
	338	regulator-max-microvolt = <1150000>;
	339	regulator-boot-on;
	340	regulator-always-on;
	341	};
	342
	343	vdd3_reg: regulator@4 {
	344	regulator-always-on;
	345	};
	346
	347	vdig1_reg: regulator@5 {
	348	regulator-always-on;
	349	};
	350
	351	vdig2_reg: regulator@6 {
	352	regulator-always-on;
	353	};
	354
	355	vpll_reg: regulator@7 {
	356	regulator-always-on;
	357	};
	358
	359	vdac_reg: regulator@8 {
	360	regulator-always-on;
	361	};
	362
	363	vaux1_reg: regulator@9 {
	364	regulator-always-on;
	365	};
	366
	367	vaux2_reg: regulator@10 {
	368	regulator-always-on;
369	};
370
371	vaux33_reg: regulator@11 {
372	regulator-always-on;
373	};
374
375	vmmc_reg: regulator@12 {
376	regulator-always-on;
377	};
53d91034	378	};
32bb00e0	379	};
1a39a65c M	380
	381	&cpsw_emac0 {
	382	phy_id = <&davinci_mdio>, <0>;
	383	};
	384
	385	&cpsw_emac1 {
	386	phy_id = <&davinci_mdio>, <1>;
	387	};