ARM: dts: AM33XX: mcasp: Add location for data port registers to reg-property
[linux-2.6-block.git] / arch / arm / boot / dts / am335x-evm.dts
CommitLineData
32bb00e0
AC
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
eb33ef66 10#include "am33xx.dtsi"
32bb00e0
AC
11
12/ {
13 model = "TI AM335x EVM";
14 compatible = "ti,am335x-evm", "ti,am33xx";
15
efeedcf2
AC
16 cpus {
17 cpu@0 {
18 cpu0-supply = <&vdd1_reg>;
19 };
20 };
21
32bb00e0
AC
22 memory {
23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 };
53d91034 26
1b2a9702
AC
27 vbat: fixedregulator@0 {
28 compatible = "regulator-fixed";
29 regulator-name = "vbat";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
32 regulator-boot-on;
33 };
492dd024
AC
34
35 lis3_reg: fixedregulator@1 {
36 compatible = "regulator-fixed";
37 regulator-name = "lis3_reg";
38 regulator-boot-on;
39 };
2ca1d317
AC
40
41 matrix_keypad: matrix_keypad@0 {
42 compatible = "gpio-matrix-keypad";
43 debounce-delay-ms = <5>;
44 col-scan-delay-us = <2>;
45
e94233c2
FV
46 row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
47 &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
48 &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
2ca1d317 49
e94233c2
FV
50 col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
51 &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
2ca1d317
AC
52
53 linux,keymap = <0x0000008b /* MENU */
54 0x0100009e /* BACK */
55 0x02000069 /* LEFT */
56 0x0001006a /* RIGHT */
57 0x0101001c /* ENTER */
58 0x0201006c>; /* DOWN */
59 };
822c9936
AC
60
61 gpio_keys: volume_keys@0 {
62 compatible = "gpio-keys";
63 #address-cells = <1>;
64 #size-cells = <0>;
65 autorepeat;
66
67 switch@9 {
68 label = "volume-up";
69 linux,code = <115>;
e94233c2 70 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
822c9936
AC
71 gpio-key,wakeup;
72 };
73
74 switch@10 {
75 label = "volume-down";
76 linux,code = <114>;
e94233c2 77 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
822c9936
AC
78 gpio-key,wakeup;
79 };
80 };
6993fd01
PA
81
82 backlight {
83 compatible = "pwm-backlight";
84 pwms = <&ecap0 0 50000 0>;
85 brightness-levels = <0 51 53 56 62 75 101 152 255>;
86 default-brightness-level = <8>;
87 };
d6cfc1e2
BP
88
89 panel {
90 compatible = "ti,tilcdc,panel";
91 status = "okay";
92 pinctrl-names = "default";
93 pinctrl-0 = <&lcd_pins_s0>;
94 panel-info {
95 ac-bias = <255>;
96 ac-bias-intrpt = <0>;
97 dma-burst-sz = <16>;
98 bpp = <32>;
99 fdd = <0x80>;
100 sync-edge = <0>;
101 sync-ctrl = <1>;
102 raster-order = <0>;
103 fifo-th = <0>;
104 };
105
106 display-timings {
107 800x480p62 {
108 clock-frequency = <30000000>;
109 hactive = <800>;
110 vactive = <480>;
111 hfront-porch = <39>;
112 hback-porch = <39>;
113 hsync-len = <47>;
114 vback-porch = <29>;
115 vfront-porch = <13>;
116 vsync-len = <2>;
117 hsync-active = <1>;
118 vsync-active = <1>;
119 };
120 };
121 };
1b2a9702
AC
122};
123
82d75afc
JMC
124&am33xx_pinmux {
125 pinctrl-names = "default";
126 pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
127
128 matrix_keypad_s0: matrix_keypad_s0 {
129 pinctrl-single,pins = <
130 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
131 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
132 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
133 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
134 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
135 >;
136 };
137
138 volume_keys_s0: volume_keys_s0 {
139 pinctrl-single,pins = <
140 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
141 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
142 >;
143 };
144
145 i2c0_pins: pinmux_i2c0_pins {
146 pinctrl-single,pins = <
147 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
148 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
149 >;
150 };
151
152 i2c1_pins: pinmux_i2c1_pins {
153 pinctrl-single,pins = <
154 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
155 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
156 >;
157 };
158
159 uart0_pins: pinmux_uart0_pins {
160 pinctrl-single,pins = <
161 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
162 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
163 >;
164 };
165
166 clkout2_pin: pinmux_clkout2_pin {
167 pinctrl-single,pins = <
168 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
169 >;
170 };
171
172 nandflash_pins_s0: nandflash_pins_s0 {
173 pinctrl-single,pins = <
174 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
175 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
176 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
177 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
178 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
179 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
180 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
181 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
182 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
183 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
184 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
185 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
186 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
187 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
188 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
189 >;
190 };
191
192 ecap0_pins: backlight_pins {
193 pinctrl-single,pins = <
194 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
195 >;
196 };
197
198 cpsw_default: cpsw_default {
199 pinctrl-single,pins = <
200 /* Slave 1 */
201 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
202 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
203 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
204 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
205 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
206 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
207 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
208 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
209 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
210 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
211 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
212 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
213 >;
214 };
215
216 cpsw_sleep: cpsw_sleep {
217 pinctrl-single,pins = <
218 /* Slave 1 reset value */
219 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
220 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
221 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
222 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
223 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
224 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
225 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
226 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
227 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
228 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
229 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
230 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
231 >;
232 };
233
234 davinci_mdio_default: davinci_mdio_default {
235 pinctrl-single,pins = <
236 /* MDIO */
237 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
238 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
239 >;
240 };
241
242 davinci_mdio_sleep: davinci_mdio_sleep {
243 pinctrl-single,pins = <
244 /* MDIO reset value */
245 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
246 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
247 >;
248 };
d6cfc1e2
BP
249
250 lcd_pins_s0: lcd_pins_s0 {
251 pinctrl-single,pins = <
252 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
253 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
254 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */
255 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */
256 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */
257 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */
258 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */
259 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */
260 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
261 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
262 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
263 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
264 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
265 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
266 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
267 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
268 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
269 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
270 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
271 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
272 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
273 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
274 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
275 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
276 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
277 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
278 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
279 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
280 >;
281 };
82d75afc
JMC
282};
283
e0efaafb
JMC
284&uart0 {
285 pinctrl-names = "default";
286 pinctrl-0 = <&uart0_pins>;
287
288 status = "okay";
289};
290
291&i2c0 {
292 pinctrl-names = "default";
293 pinctrl-0 = <&i2c0_pins>;
294
295 status = "okay";
296 clock-frequency = <400000>;
297
298 tps: tps@2d {
299 reg = <0x2d>;
300 };
301};
302
303&usb {
304 status = "okay";
305
306 control@44e10000 {
307 status = "okay";
308 };
309
310 usb-phy@47401300 {
311 status = "okay";
312 };
313
314 usb-phy@47401b00 {
315 status = "okay";
316 };
317
318 usb@47401000 {
319 status = "okay";
320 };
321
322 usb@47401800 {
323 status = "okay";
324 dr_mode = "host";
325 };
326
327 dma-controller@07402000 {
328 status = "okay";
329 };
330};
331
332&i2c1 {
333 pinctrl-names = "default";
334 pinctrl-0 = <&i2c1_pins>;
335
336 status = "okay";
337 clock-frequency = <100000>;
338
339 lis331dlh: lis331dlh@18 {
340 compatible = "st,lis331dlh", "st,lis3lv02d";
341 reg = <0x18>;
342 Vdd-supply = <&lis3_reg>;
343 Vdd_IO-supply = <&lis3_reg>;
344
345 st,click-single-x;
346 st,click-single-y;
347 st,click-single-z;
348 st,click-thresh-x = <10>;
349 st,click-thresh-y = <10>;
350 st,click-thresh-z = <10>;
351 st,irq1-click;
352 st,irq2-click;
353 st,wakeup-x-lo;
354 st,wakeup-x-hi;
355 st,wakeup-y-lo;
356 st,wakeup-y-hi;
357 st,wakeup-z-lo;
358 st,wakeup-z-hi;
359 st,min-limit-x = <120>;
360 st,min-limit-y = <120>;
361 st,min-limit-z = <140>;
362 st,max-limit-x = <550>;
363 st,max-limit-y = <550>;
364 st,max-limit-z = <750>;
365 };
366
367 tsl2550: tsl2550@39 {
368 compatible = "taos,tsl2550";
369 reg = <0x39>;
370 };
371
372 tmp275: tmp275@48 {
373 compatible = "ti,tmp275";
374 reg = <0x48>;
375 };
376};
377
d6cfc1e2
BP
378&lcdc {
379 status = "okay";
380};
381
e0efaafb
JMC
382&elm {
383 status = "okay";
384};
385
386&epwmss0 {
387 status = "okay";
388
389 ecap0: ecap@48300100 {
390 status = "okay";
391 pinctrl-names = "default";
392 pinctrl-0 = <&ecap0_pins>;
393 };
394};
395
396&gpmc {
397 status = "okay";
398 pinctrl-names = "default";
399 pinctrl-0 = <&nandflash_pins_s0>;
400 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
401 nand@0,0 {
402 reg = <0 0 0>; /* CS0, offset 0 */
403 nand-bus-width = <8>;
404 ti,nand-ecc-opt = "bch8";
405 gpmc,device-nand = "true";
406 gpmc,device-width = <1>;
407 gpmc,sync-clk-ps = <0>;
408 gpmc,cs-on-ns = <0>;
409 gpmc,cs-rd-off-ns = <44>;
410 gpmc,cs-wr-off-ns = <44>;
411 gpmc,adv-on-ns = <6>;
412 gpmc,adv-rd-off-ns = <34>;
413 gpmc,adv-wr-off-ns = <44>;
414 gpmc,we-on-ns = <0>;
415 gpmc,we-off-ns = <40>;
416 gpmc,oe-on-ns = <0>;
417 gpmc,oe-off-ns = <54>;
418 gpmc,access-ns = <64>;
419 gpmc,rd-cycle-ns = <82>;
420 gpmc,wr-cycle-ns = <82>;
421 gpmc,wait-on-read = "true";
422 gpmc,wait-on-write = "true";
423 gpmc,bus-turnaround-ns = <0>;
424 gpmc,cycle2cycle-delay-ns = <0>;
425 gpmc,clk-activation-ns = <0>;
426 gpmc,wait-monitoring-ns = <0>;
427 gpmc,wr-access-ns = <40>;
428 gpmc,wr-data-mux-bus-ns = <0>;
429
430 #address-cells = <1>;
431 #size-cells = <1>;
432 elm_id = <&elm>;
433
434 /* MTD partition table */
435 partition@0 {
436 label = "SPL1";
437 reg = <0x00000000 0x000020000>;
438 };
439
440 partition@1 {
441 label = "SPL2";
442 reg = <0x00020000 0x00020000>;
443 };
444
445 partition@2 {
446 label = "SPL3";
447 reg = <0x00040000 0x00020000>;
448 };
449
450 partition@3 {
451 label = "SPL4";
452 reg = <0x00060000 0x00020000>;
453 };
454
455 partition@4 {
456 label = "U-boot";
457 reg = <0x00080000 0x001e0000>;
458 };
459
460 partition@5 {
461 label = "environment";
462 reg = <0x00260000 0x00020000>;
463 };
464
465 partition@6 {
466 label = "Kernel";
467 reg = <0x00280000 0x00500000>;
468 };
469
470 partition@7 {
471 label = "File-System";
472 reg = <0x00780000 0x0F880000>;
473 };
474 };
475};
476
eb33ef66 477#include "tps65910.dtsi"
1b2a9702
AC
478
479&tps {
480 vcc1-supply = <&vbat>;
481 vcc2-supply = <&vbat>;
482 vcc3-supply = <&vbat>;
483 vcc4-supply = <&vbat>;
484 vcc5-supply = <&vbat>;
485 vcc6-supply = <&vbat>;
486 vcc7-supply = <&vbat>;
487 vccio-supply = <&vbat>;
488
489 regulators {
490 vrtc_reg: regulator@0 {
491 regulator-always-on;
492 };
493
494 vio_reg: regulator@1 {
495 regulator-always-on;
496 };
497
498 vdd1_reg: regulator@2 {
499 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
500 regulator-name = "vdd_mpu";
501 regulator-min-microvolt = <912500>;
502 regulator-max-microvolt = <1312500>;
503 regulator-boot-on;
504 regulator-always-on;
505 };
506
507 vdd2_reg: regulator@3 {
508 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
509 regulator-name = "vdd_core";
510 regulator-min-microvolt = <912500>;
511 regulator-max-microvolt = <1150000>;
512 regulator-boot-on;
513 regulator-always-on;
514 };
515
516 vdd3_reg: regulator@4 {
517 regulator-always-on;
518 };
519
520 vdig1_reg: regulator@5 {
521 regulator-always-on;
522 };
523
524 vdig2_reg: regulator@6 {
525 regulator-always-on;
526 };
527
528 vpll_reg: regulator@7 {
529 regulator-always-on;
530 };
531
532 vdac_reg: regulator@8 {
533 regulator-always-on;
534 };
535
536 vaux1_reg: regulator@9 {
537 regulator-always-on;
538 };
539
540 vaux2_reg: regulator@10 {
541 regulator-always-on;
542 };
543
544 vaux33_reg: regulator@11 {
545 regulator-always-on;
546 };
547
548 vmmc_reg: regulator@12 {
55b4452b
MP
549 regulator-min-microvolt = <1800000>;
550 regulator-max-microvolt = <3300000>;
1b2a9702
AC
551 regulator-always-on;
552 };
53d91034 553 };
32bb00e0 554};
1a39a65c 555
50c7d2bd
M
556&mac {
557 pinctrl-names = "default", "sleep";
558 pinctrl-0 = <&cpsw_default>;
559 pinctrl-1 = <&cpsw_sleep>;
560};
561
562&davinci_mdio {
563 pinctrl-names = "default", "sleep";
564 pinctrl-0 = <&davinci_mdio_default>;
565 pinctrl-1 = <&davinci_mdio_sleep>;
566};
567
1a39a65c
M
568&cpsw_emac0 {
569 phy_id = <&davinci_mdio>, <0>;
6d75afe2 570 phy-mode = "rgmii-txid";
1a39a65c
M
571};
572
573&cpsw_emac1 {
574 phy_id = <&davinci_mdio>, <1>;
6d75afe2 575 phy-mode = "rgmii-txid";
1a39a65c 576};
a82279dd
PR
577
578&tscadc {
579 status = "okay";
580 tsc {
581 ti,wires = <4>;
582 ti,x-plate-resistance = <200>;
583 ti,coordiante-readouts = <5>;
584 ti,wire-config = <0x00 0x11 0x22 0x33>;
585 };
586
587 adc {
18926ede 588 ti,adc-channels = <4 5 6 7>;
a82279dd
PR
589 };
590};
55b4452b
MP
591
592&mmc1 {
593 status = "okay";
594 vmmc-supply = <&vmmc_reg>;
0d8d40fc 595 bus-width = <4>;
55b4452b 596};
f8302e1e
MG
597
598&sham {
599 status = "okay";
600};
99919e5e
MG
601
602&aes {
603 status = "okay";
604};