Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | # |
2 | # For a description of the syntax of this configuration file, | |
3 | # see Documentation/kbuild/kconfig-language.txt. | |
4 | # | |
5 | ||
6 | mainmenu "Linux Kernel Configuration" | |
7 | ||
8 | config ARM | |
9 | bool | |
10 | default y | |
e17c6d56 | 11 | select HAVE_AOUT |
2064c946 | 12 | select HAVE_IDE |
2778f620 | 13 | select HAVE_MEMBLOCK |
12b824fb | 14 | select RTC_LIB |
75e7153a | 15 | select SYS_SUPPORTS_APM_EMULATION |
24b44a66 | 16 | select GENERIC_ATOMIC64 if (!CPU_32v6K) |
fe166148 | 17 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
5cbad0eb | 18 | select HAVE_ARCH_KGDB |
3f550096 | 19 | select HAVE_KPROBES if (!XIP_KERNEL) |
9edddaa2 | 20 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
606576ce | 21 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
1fe53268 | 22 | select HAVE_GENERIC_DMA_COHERENT |
e7db7b42 AT |
23 | select HAVE_KERNEL_GZIP |
24 | select HAVE_KERNEL_LZO | |
6e8699f7 | 25 | select HAVE_KERNEL_LZMA |
7ada189f JI |
26 | select HAVE_PERF_EVENTS |
27 | select PERF_USE_VMALLOC | |
e513f8bf | 28 | select HAVE_REGS_AND_STACK_ACCESS_API |
1da177e4 LT |
29 | help |
30 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 31 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 32 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 33 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
34 | Europe. There is an ARM Linux project with a web page at |
35 | <http://www.arm.linux.org.uk/>. | |
36 | ||
1a189b97 RK |
37 | config HAVE_PWM |
38 | bool | |
39 | ||
75e7153a RB |
40 | config SYS_SUPPORTS_APM_EMULATION |
41 | bool | |
42 | ||
0a938b97 DB |
43 | config GENERIC_GPIO |
44 | bool | |
0a938b97 | 45 | |
5cfc8ee0 JS |
46 | config ARCH_USES_GETTIMEOFFSET |
47 | bool | |
48 | default n | |
746140c7 | 49 | |
0567a0c0 KH |
50 | config GENERIC_CLOCKEVENTS |
51 | bool | |
0567a0c0 | 52 | |
a8655e83 CM |
53 | config GENERIC_CLOCKEVENTS_BROADCAST |
54 | bool | |
55 | depends on GENERIC_CLOCKEVENTS | |
5388a6b2 | 56 | default y if SMP |
a8655e83 | 57 | |
bc581770 LW |
58 | config HAVE_TCM |
59 | bool | |
60 | select GENERIC_ALLOCATOR | |
61 | ||
e119bfff RK |
62 | config HAVE_PROC_CPU |
63 | bool | |
64 | ||
5ea81769 AV |
65 | config NO_IOPORT |
66 | bool | |
5ea81769 | 67 | |
1da177e4 LT |
68 | config EISA |
69 | bool | |
70 | ---help--- | |
71 | The Extended Industry Standard Architecture (EISA) bus was | |
72 | developed as an open alternative to the IBM MicroChannel bus. | |
73 | ||
74 | The EISA bus provided some of the features of the IBM MicroChannel | |
75 | bus while maintaining backward compatibility with cards made for | |
76 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
77 | 1995 when it was made obsolete by the PCI bus. | |
78 | ||
79 | Say Y here if you are building a kernel for an EISA-based machine. | |
80 | ||
81 | Otherwise, say N. | |
82 | ||
83 | config SBUS | |
84 | bool | |
85 | ||
86 | config MCA | |
87 | bool | |
88 | help | |
89 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
90 | laptops. It is a bus system similar to PCI or ISA. See | |
91 | <file:Documentation/mca.txt> (and especially the web page given | |
92 | there) before attempting to build an MCA bus kernel. | |
93 | ||
4a2581a0 TG |
94 | config GENERIC_HARDIRQS |
95 | bool | |
96 | default y | |
97 | ||
f16fb1ec RK |
98 | config STACKTRACE_SUPPORT |
99 | bool | |
100 | default y | |
101 | ||
f76e9154 NP |
102 | config HAVE_LATENCYTOP_SUPPORT |
103 | bool | |
104 | depends on !SMP | |
105 | default y | |
106 | ||
f16fb1ec RK |
107 | config LOCKDEP_SUPPORT |
108 | bool | |
109 | default y | |
110 | ||
7ad1bcb2 RK |
111 | config TRACE_IRQFLAGS_SUPPORT |
112 | bool | |
113 | default y | |
114 | ||
4a2581a0 TG |
115 | config HARDIRQS_SW_RESEND |
116 | bool | |
117 | default y | |
118 | ||
119 | config GENERIC_IRQ_PROBE | |
120 | bool | |
121 | default y | |
122 | ||
95c354fe NP |
123 | config GENERIC_LOCKBREAK |
124 | bool | |
125 | default y | |
126 | depends on SMP && PREEMPT | |
127 | ||
1da177e4 LT |
128 | config RWSEM_GENERIC_SPINLOCK |
129 | bool | |
130 | default y | |
131 | ||
132 | config RWSEM_XCHGADD_ALGORITHM | |
133 | bool | |
134 | ||
f0d1b0b3 DH |
135 | config ARCH_HAS_ILOG2_U32 |
136 | bool | |
f0d1b0b3 DH |
137 | |
138 | config ARCH_HAS_ILOG2_U64 | |
139 | bool | |
f0d1b0b3 | 140 | |
89c52ed4 BD |
141 | config ARCH_HAS_CPUFREQ |
142 | bool | |
143 | help | |
144 | Internal node to signify that the ARCH has CPUFREQ support | |
145 | and that the relevant menu configurations are displayed for | |
146 | it. | |
147 | ||
b89c3b16 AM |
148 | config GENERIC_HWEIGHT |
149 | bool | |
150 | default y | |
151 | ||
1da177e4 LT |
152 | config GENERIC_CALIBRATE_DELAY |
153 | bool | |
154 | default y | |
155 | ||
a08b6b79 Z |
156 | config ARCH_MAY_HAVE_PC_FDC |
157 | bool | |
158 | ||
5ac6da66 CL |
159 | config ZONE_DMA |
160 | bool | |
5ac6da66 | 161 | |
ccd7ab7f FT |
162 | config NEED_DMA_MAP_STATE |
163 | def_bool y | |
164 | ||
1da177e4 LT |
165 | config GENERIC_ISA_DMA |
166 | bool | |
167 | ||
1da177e4 LT |
168 | config FIQ |
169 | bool | |
170 | ||
034d2f5a AV |
171 | config ARCH_MTD_XIP |
172 | bool | |
173 | ||
60a752ef | 174 | config GENERIC_HARDIRQS_NO__DO_IRQ |
60a752ef PZ |
175 | def_bool y |
176 | ||
d6d502fa KK |
177 | config ARM_L1_CACHE_SHIFT_6 |
178 | bool | |
179 | help | |
180 | Setting ARM L1 cache line size to 64 Bytes. | |
181 | ||
c760fc19 HC |
182 | config VECTORS_BASE |
183 | hex | |
6afd6fae | 184 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
185 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
186 | default 0x00000000 | |
187 | help | |
188 | The base address of exception vectors. | |
189 | ||
1da177e4 LT |
190 | source "init/Kconfig" |
191 | ||
dc52ddc0 MH |
192 | source "kernel/Kconfig.freezer" |
193 | ||
1da177e4 LT |
194 | menu "System Type" |
195 | ||
3c427975 HC |
196 | config MMU |
197 | bool "MMU-based Paged Memory Management Support" | |
198 | default y | |
199 | help | |
200 | Select if you want MMU-based virtualised addressing space | |
201 | support by paged memory management. If unsure, say 'Y'. | |
202 | ||
ccf50e23 RK |
203 | # |
204 | # The "ARM system type" choice list is ordered alphabetically by option | |
205 | # text. Please add new entries in the option alphabetic order. | |
206 | # | |
1da177e4 LT |
207 | choice |
208 | prompt "ARM system type" | |
6a0e2430 | 209 | default ARCH_VERSATILE |
1da177e4 | 210 | |
4af6fee1 DS |
211 | config ARCH_AAEC2000 |
212 | bool "Agilent AAEC-2000 based" | |
c750815e | 213 | select CPU_ARM920T |
4af6fee1 | 214 | select ARM_AMBA |
9483a578 | 215 | select HAVE_CLK |
5cfc8ee0 | 216 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
217 | help |
218 | This enables support for systems based on the Agilent AAEC-2000 | |
219 | ||
220 | config ARCH_INTEGRATOR | |
221 | bool "ARM Ltd. Integrator family" | |
222 | select ARM_AMBA | |
89c52ed4 | 223 | select ARCH_HAS_CPUFREQ |
d72fbdf0 | 224 | select COMMON_CLKDEV |
c5a0adb5 | 225 | select ICST |
13edd86d | 226 | select GENERIC_CLOCKEVENTS |
f4b8b319 | 227 | select PLAT_VERSATILE |
4af6fee1 DS |
228 | help |
229 | Support for ARM's Integrator platform. | |
230 | ||
231 | config ARCH_REALVIEW | |
232 | bool "ARM Ltd. RealView family" | |
233 | select ARM_AMBA | |
cf30fb4a | 234 | select COMMON_CLKDEV |
c5a0adb5 | 235 | select ICST |
ae30ceac | 236 | select GENERIC_CLOCKEVENTS |
eb7fffa3 | 237 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 238 | select PLAT_VERSATILE |
e3887714 | 239 | select ARM_TIMER_SP804 |
b56ba8aa | 240 | select GPIO_PL061 if GPIOLIB |
4af6fee1 DS |
241 | help |
242 | This enables support for ARM Ltd RealView boards. | |
243 | ||
244 | config ARCH_VERSATILE | |
245 | bool "ARM Ltd. Versatile family" | |
246 | select ARM_AMBA | |
247 | select ARM_VIC | |
71a06da0 | 248 | select COMMON_CLKDEV |
c5a0adb5 | 249 | select ICST |
89df1272 | 250 | select GENERIC_CLOCKEVENTS |
bbeddc43 | 251 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 252 | select PLAT_VERSATILE |
e3887714 | 253 | select ARM_TIMER_SP804 |
4af6fee1 DS |
254 | help |
255 | This enables support for ARM Ltd Versatile board. | |
256 | ||
ceade897 RK |
257 | config ARCH_VEXPRESS |
258 | bool "ARM Ltd. Versatile Express family" | |
259 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
260 | select ARM_AMBA | |
261 | select ARM_TIMER_SP804 | |
262 | select COMMON_CLKDEV | |
263 | select GENERIC_CLOCKEVENTS | |
ceade897 RK |
264 | select HAVE_CLK |
265 | select ICST | |
266 | select PLAT_VERSATILE | |
267 | help | |
268 | This enables support for the ARM Ltd Versatile Express boards. | |
269 | ||
8fc5ffa0 AV |
270 | config ARCH_AT91 |
271 | bool "Atmel AT91" | |
f373e8c0 | 272 | select ARCH_REQUIRE_GPIOLIB |
93686ae8 | 273 | select HAVE_CLK |
4af6fee1 | 274 | help |
2b3b3516 AV |
275 | This enables support for systems based on the Atmel AT91RM9200, |
276 | AT91SAM9 and AT91CAP9 processors. | |
4af6fee1 | 277 | |
ccf50e23 RK |
278 | config ARCH_BCMRING |
279 | bool "Broadcom BCMRING" | |
280 | depends on MMU | |
281 | select CPU_V6 | |
282 | select ARM_AMBA | |
283 | select COMMON_CLKDEV | |
ccf50e23 RK |
284 | select GENERIC_CLOCKEVENTS |
285 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
286 | help | |
287 | Support for Broadcom's BCMRing platform. | |
288 | ||
1da177e4 | 289 | config ARCH_CLPS711X |
4af6fee1 | 290 | bool "Cirrus Logic CLPS711x/EP721x-based" |
c750815e | 291 | select CPU_ARM720T |
5cfc8ee0 | 292 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
293 | help |
294 | Support for Cirrus Logic 711x/721x based boards. | |
1da177e4 | 295 | |
d94f944e AV |
296 | config ARCH_CNS3XXX |
297 | bool "Cavium Networks CNS3XXX family" | |
298 | select CPU_V6 | |
d94f944e AV |
299 | select GENERIC_CLOCKEVENTS |
300 | select ARM_GIC | |
5f32f7a0 | 301 | select PCI_DOMAINS if PCI |
d94f944e AV |
302 | help |
303 | Support for Cavium Networks CNS3XXX platform. | |
304 | ||
788c9700 RK |
305 | config ARCH_GEMINI |
306 | bool "Cortina Systems Gemini" | |
307 | select CPU_FA526 | |
788c9700 | 308 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 309 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
310 | help |
311 | Support for the Cortina Systems Gemini family SoCs | |
312 | ||
1da177e4 LT |
313 | config ARCH_EBSA110 |
314 | bool "EBSA-110" | |
c750815e | 315 | select CPU_SA110 |
f7e68bbf | 316 | select ISA |
c5eb2a2b | 317 | select NO_IOPORT |
5cfc8ee0 | 318 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
319 | help |
320 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 321 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
322 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
323 | parallel port. | |
324 | ||
e7736d47 LB |
325 | config ARCH_EP93XX |
326 | bool "EP93xx-based" | |
c750815e | 327 | select CPU_ARM920T |
e7736d47 LB |
328 | select ARM_AMBA |
329 | select ARM_VIC | |
ae696fd5 | 330 | select COMMON_CLKDEV |
7444a72e | 331 | select ARCH_REQUIRE_GPIOLIB |
eb33575c | 332 | select ARCH_HAS_HOLES_MEMORYMODEL |
5cfc8ee0 | 333 | select ARCH_USES_GETTIMEOFFSET |
e7736d47 LB |
334 | help |
335 | This enables support for the Cirrus EP93xx series of CPUs. | |
336 | ||
1da177e4 LT |
337 | config ARCH_FOOTBRIDGE |
338 | bool "FootBridge" | |
c750815e | 339 | select CPU_SA110 |
1da177e4 | 340 | select FOOTBRIDGE |
5cfc8ee0 | 341 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
342 | help |
343 | Support for systems based on the DC21285 companion chip | |
344 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 345 | |
788c9700 RK |
346 | config ARCH_MXC |
347 | bool "Freescale MXC/iMX-based" | |
788c9700 | 348 | select GENERIC_CLOCKEVENTS |
788c9700 | 349 | select ARCH_REQUIRE_GPIOLIB |
03e09cd8 | 350 | select COMMON_CLKDEV |
788c9700 RK |
351 | help |
352 | Support for Freescale MXC/iMX-based family of processors | |
353 | ||
7bd0f2f5 | 354 | config ARCH_STMP3XXX |
355 | bool "Freescale STMP3xxx" | |
356 | select CPU_ARM926T | |
7bd0f2f5 | 357 | select COMMON_CLKDEV |
358 | select ARCH_REQUIRE_GPIOLIB | |
7bd0f2f5 | 359 | select GENERIC_CLOCKEVENTS |
7bd0f2f5 | 360 | select USB_ARCH_HAS_EHCI |
361 | help | |
362 | Support for systems based on the Freescale 3xxx CPUs. | |
363 | ||
4af6fee1 DS |
364 | config ARCH_NETX |
365 | bool "Hilscher NetX based" | |
c750815e | 366 | select CPU_ARM926T |
4af6fee1 | 367 | select ARM_VIC |
2fcfe6b8 | 368 | select GENERIC_CLOCKEVENTS |
f999b8bd | 369 | help |
4af6fee1 DS |
370 | This enables support for systems based on the Hilscher NetX Soc |
371 | ||
372 | config ARCH_H720X | |
373 | bool "Hynix HMS720x-based" | |
c750815e | 374 | select CPU_ARM720T |
4af6fee1 | 375 | select ISA_DMA_API |
5cfc8ee0 | 376 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
377 | help |
378 | This enables support for systems based on the Hynix HMS720x | |
379 | ||
3b938be6 RK |
380 | config ARCH_IOP13XX |
381 | bool "IOP13xx-based" | |
382 | depends on MMU | |
c750815e | 383 | select CPU_XSC3 |
3b938be6 RK |
384 | select PLAT_IOP |
385 | select PCI | |
386 | select ARCH_SUPPORTS_MSI | |
8d5796d2 | 387 | select VMSPLIT_1G |
3b938be6 RK |
388 | help |
389 | Support for Intel's IOP13XX (XScale) family of processors. | |
390 | ||
3f7e5815 LB |
391 | config ARCH_IOP32X |
392 | bool "IOP32x-based" | |
a4f7e763 | 393 | depends on MMU |
c750815e | 394 | select CPU_XSCALE |
7ae1f7ec | 395 | select PLAT_IOP |
f7e68bbf | 396 | select PCI |
bb2b180c | 397 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd | 398 | help |
3f7e5815 LB |
399 | Support for Intel's 80219 and IOP32X (XScale) family of |
400 | processors. | |
401 | ||
402 | config ARCH_IOP33X | |
403 | bool "IOP33x-based" | |
404 | depends on MMU | |
c750815e | 405 | select CPU_XSCALE |
7ae1f7ec | 406 | select PLAT_IOP |
3f7e5815 | 407 | select PCI |
bb2b180c | 408 | select ARCH_REQUIRE_GPIOLIB |
3f7e5815 LB |
409 | help |
410 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 411 | |
3b938be6 RK |
412 | config ARCH_IXP23XX |
413 | bool "IXP23XX-based" | |
a4f7e763 | 414 | depends on MMU |
c750815e | 415 | select CPU_XSC3 |
3b938be6 | 416 | select PCI |
5cfc8ee0 | 417 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd | 418 | help |
3b938be6 | 419 | Support for Intel's IXP23xx (XScale) family of processors. |
1da177e4 LT |
420 | |
421 | config ARCH_IXP2000 | |
422 | bool "IXP2400/2800-based" | |
a4f7e763 | 423 | depends on MMU |
c750815e | 424 | select CPU_XSCALE |
f7e68bbf | 425 | select PCI |
5cfc8ee0 | 426 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
427 | help |
428 | Support for Intel's IXP2400/2800 (XScale) family of processors. | |
1da177e4 | 429 | |
3b938be6 RK |
430 | config ARCH_IXP4XX |
431 | bool "IXP4xx-based" | |
a4f7e763 | 432 | depends on MMU |
c750815e | 433 | select CPU_XSCALE |
8858e9af | 434 | select GENERIC_GPIO |
3b938be6 | 435 | select GENERIC_CLOCKEVENTS |
485bdde7 | 436 | select DMABOUNCE if PCI |
c4713074 | 437 | help |
3b938be6 | 438 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 439 | |
edabd38e SB |
440 | config ARCH_DOVE |
441 | bool "Marvell Dove" | |
442 | select PCI | |
edabd38e | 443 | select ARCH_REQUIRE_GPIOLIB |
edabd38e SB |
444 | select GENERIC_CLOCKEVENTS |
445 | select PLAT_ORION | |
446 | help | |
447 | Support for the Marvell Dove SoC 88AP510 | |
448 | ||
651c74c7 SB |
449 | config ARCH_KIRKWOOD |
450 | bool "Marvell Kirkwood" | |
c750815e | 451 | select CPU_FEROCEON |
651c74c7 | 452 | select PCI |
a8865655 | 453 | select ARCH_REQUIRE_GPIOLIB |
651c74c7 SB |
454 | select GENERIC_CLOCKEVENTS |
455 | select PLAT_ORION | |
456 | help | |
457 | Support for the following Marvell Kirkwood series SoCs: | |
458 | 88F6180, 88F6192 and 88F6281. | |
459 | ||
777f9beb LB |
460 | config ARCH_LOKI |
461 | bool "Marvell Loki (88RC8480)" | |
c750815e | 462 | select CPU_FEROCEON |
777f9beb LB |
463 | select GENERIC_CLOCKEVENTS |
464 | select PLAT_ORION | |
465 | help | |
466 | Support for the Marvell Loki (88RC8480) SoC. | |
467 | ||
40805949 KW |
468 | config ARCH_LPC32XX |
469 | bool "NXP LPC32XX" | |
470 | select CPU_ARM926T | |
471 | select ARCH_REQUIRE_GPIOLIB | |
472 | select HAVE_IDE | |
473 | select ARM_AMBA | |
474 | select USB_ARCH_HAS_OHCI | |
475 | select COMMON_CLKDEV | |
476 | select GENERIC_TIME | |
477 | select GENERIC_CLOCKEVENTS | |
478 | help | |
479 | Support for the NXP LPC32XX family of processors | |
480 | ||
794d15b2 SS |
481 | config ARCH_MV78XX0 |
482 | bool "Marvell MV78xx0" | |
c750815e | 483 | select CPU_FEROCEON |
794d15b2 | 484 | select PCI |
a8865655 | 485 | select ARCH_REQUIRE_GPIOLIB |
794d15b2 SS |
486 | select GENERIC_CLOCKEVENTS |
487 | select PLAT_ORION | |
488 | help | |
489 | Support for the following Marvell MV78xx0 series SoCs: | |
490 | MV781x0, MV782x0. | |
491 | ||
9dd0b194 | 492 | config ARCH_ORION5X |
585cf175 TP |
493 | bool "Marvell Orion" |
494 | depends on MMU | |
c750815e | 495 | select CPU_FEROCEON |
038ee083 | 496 | select PCI |
a8865655 | 497 | select ARCH_REQUIRE_GPIOLIB |
51cbff1d | 498 | select GENERIC_CLOCKEVENTS |
69b02f6a | 499 | select PLAT_ORION |
585cf175 | 500 | help |
9dd0b194 | 501 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 502 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 503 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 504 | |
788c9700 | 505 | config ARCH_MMP |
2f7e8fae | 506 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 507 | depends on MMU |
788c9700 | 508 | select ARCH_REQUIRE_GPIOLIB |
788c9700 | 509 | select COMMON_CLKDEV |
788c9700 RK |
510 | select GENERIC_CLOCKEVENTS |
511 | select TICK_ONESHOT | |
512 | select PLAT_PXA | |
513 | help | |
2f7e8fae | 514 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
515 | |
516 | config ARCH_KS8695 | |
517 | bool "Micrel/Kendin KS8695" | |
518 | select CPU_ARM922T | |
98830bc9 | 519 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 520 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
521 | help |
522 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
523 | System-on-Chip devices. | |
524 | ||
525 | config ARCH_NS9XXX | |
526 | bool "NetSilicon NS9xxx" | |
527 | select CPU_ARM926T | |
528 | select GENERIC_GPIO | |
788c9700 RK |
529 | select GENERIC_CLOCKEVENTS |
530 | select HAVE_CLK | |
531 | help | |
532 | Say Y here if you intend to run this kernel on a NetSilicon NS9xxx | |
533 | System. | |
534 | ||
535 | <http://www.digi.com/products/microprocessors/index.jsp> | |
536 | ||
537 | config ARCH_W90X900 | |
538 | bool "Nuvoton W90X900 CPU" | |
539 | select CPU_ARM926T | |
c52d3d68 | 540 | select ARCH_REQUIRE_GPIOLIB |
0e4a34bb | 541 | select COMMON_CLKDEV |
58b5369e | 542 | select GENERIC_CLOCKEVENTS |
788c9700 | 543 | help |
a8bc4ead | 544 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
545 | At present, the w90x900 has been renamed nuc900, regarding | |
546 | the ARM series product line, you can login the following | |
547 | link address to know more. | |
548 | ||
549 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
550 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 551 | |
a62e9030 | 552 | config ARCH_NUC93X |
553 | bool "Nuvoton NUC93X CPU" | |
554 | select CPU_ARM926T | |
a62e9030 | 555 | select COMMON_CLKDEV |
556 | help | |
557 | Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
558 | low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
559 | ||
c5f80065 EG |
560 | config ARCH_TEGRA |
561 | bool "NVIDIA Tegra" | |
562 | select GENERIC_TIME | |
563 | select GENERIC_CLOCKEVENTS | |
564 | select GENERIC_GPIO | |
565 | select HAVE_CLK | |
d8611961 | 566 | select COMMON_CLKDEV |
c5f80065 EG |
567 | select ARCH_HAS_BARRIERS if CACHE_L2X0 |
568 | help | |
569 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
570 | Tegra 6xx and Tegra 2 series). | |
571 | ||
4af6fee1 DS |
572 | config ARCH_PNX4008 |
573 | bool "Philips Nexperia PNX4008 Mobile" | |
c750815e | 574 | select CPU_ARM926T |
6985a5ad | 575 | select COMMON_CLKDEV |
5cfc8ee0 | 576 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
577 | help |
578 | This enables support for Philips PNX4008 mobile platform. | |
579 | ||
1da177e4 | 580 | config ARCH_PXA |
2c8086a5 | 581 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 582 | depends on MMU |
034d2f5a | 583 | select ARCH_MTD_XIP |
89c52ed4 | 584 | select ARCH_HAS_CPUFREQ |
8c3abc7d | 585 | select COMMON_CLKDEV |
7444a72e | 586 | select ARCH_REQUIRE_GPIOLIB |
981d0f39 | 587 | select GENERIC_CLOCKEVENTS |
a88264c2 | 588 | select TICK_ONESHOT |
bd5ce433 | 589 | select PLAT_PXA |
f999b8bd | 590 | help |
2c8086a5 | 591 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 592 | |
788c9700 RK |
593 | config ARCH_MSM |
594 | bool "Qualcomm MSM" | |
4b536b8d | 595 | select HAVE_CLK |
49cbe786 | 596 | select GENERIC_CLOCKEVENTS |
923a081c | 597 | select ARCH_REQUIRE_GPIOLIB |
49cbe786 | 598 | help |
4b53eb4f DW |
599 | Support for Qualcomm MSM/QSD based systems. This runs on the |
600 | apps processor of the MSM/QSD and depends on a shared memory | |
601 | interface to the modem processor which runs the baseband | |
602 | stack and controls some vital subsystems | |
603 | (clock and power control, etc). | |
49cbe786 | 604 | |
c793c1b0 MD |
605 | config ARCH_SHMOBILE |
606 | bool "Renesas SH-Mobile" | |
607 | help | |
608 | Support for Renesas's SH-Mobile ARM platforms | |
609 | ||
1da177e4 LT |
610 | config ARCH_RPC |
611 | bool "RiscPC" | |
612 | select ARCH_ACORN | |
613 | select FIQ | |
614 | select TIMER_ACORN | |
a08b6b79 | 615 | select ARCH_MAY_HAVE_PC_FDC |
341eb781 | 616 | select HAVE_PATA_PLATFORM |
065909b9 | 617 | select ISA_DMA_API |
5ea81769 | 618 | select NO_IOPORT |
07f841b7 | 619 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 620 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
621 | help |
622 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
623 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
624 | ||
625 | config ARCH_SA1100 | |
626 | bool "SA1100-based" | |
c750815e | 627 | select CPU_SA1100 |
f7e68bbf | 628 | select ISA |
05944d74 | 629 | select ARCH_SPARSEMEM_ENABLE |
034d2f5a | 630 | select ARCH_MTD_XIP |
89c52ed4 | 631 | select ARCH_HAS_CPUFREQ |
1937f5b9 | 632 | select CPU_FREQ |
3e238be2 | 633 | select GENERIC_CLOCKEVENTS |
9483a578 | 634 | select HAVE_CLK |
3e238be2 | 635 | select TICK_ONESHOT |
7444a72e | 636 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd MM |
637 | help |
638 | Support for StrongARM 11x0 based boards. | |
1da177e4 LT |
639 | |
640 | config ARCH_S3C2410 | |
63b1f51b | 641 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" |
0a938b97 | 642 | select GENERIC_GPIO |
9d56c02a | 643 | select ARCH_HAS_CPUFREQ |
9483a578 | 644 | select HAVE_CLK |
5cfc8ee0 | 645 | select ARCH_USES_GETTIMEOFFSET |
4b623926 | 646 | select HAVE_S3C2410_I2C |
1da177e4 LT |
647 | help |
648 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | |
649 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | |
f6c8965a | 650 | the Samsung SMDK2410 development board (and derivatives). |
1da177e4 | 651 | |
63b1f51b BD |
652 | Note, the S3C2416 and the S3C2450 are so close that they even share |
653 | the same SoC ID code. This means that there is no seperate machine | |
654 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. | |
655 | ||
a08ab637 BD |
656 | config ARCH_S3C64XX |
657 | bool "Samsung S3C64XX" | |
89f1fa08 | 658 | select PLAT_SAMSUNG |
89f0ce72 | 659 | select CPU_V6 |
89f0ce72 | 660 | select ARM_VIC |
a08ab637 | 661 | select HAVE_CLK |
89f0ce72 | 662 | select NO_IOPORT |
5cfc8ee0 | 663 | select ARCH_USES_GETTIMEOFFSET |
89c52ed4 | 664 | select ARCH_HAS_CPUFREQ |
89f0ce72 BD |
665 | select ARCH_REQUIRE_GPIOLIB |
666 | select SAMSUNG_CLKSRC | |
667 | select SAMSUNG_IRQ_VIC_TIMER | |
668 | select SAMSUNG_IRQ_UART | |
669 | select S3C_GPIO_TRACK | |
670 | select S3C_GPIO_PULL_UPDOWN | |
671 | select S3C_GPIO_CFG_S3C24XX | |
672 | select S3C_GPIO_CFG_S3C64XX | |
673 | select S3C_DEV_NAND | |
674 | select USB_ARCH_HAS_OHCI | |
675 | select SAMSUNG_GPIOLIB_4BIT | |
4b623926 | 676 | select HAVE_S3C2410_I2C |
d8653d9f | 677 | select HAVE_S3C2410_WATCHDOG |
a08ab637 BD |
678 | help |
679 | Samsung S3C64XX series based systems | |
680 | ||
c4ffccdd KK |
681 | config ARCH_S5P6440 |
682 | bool "Samsung S5P6440" | |
683 | select CPU_V6 | |
684 | select GENERIC_GPIO | |
685 | select HAVE_CLK | |
d8653d9f | 686 | select HAVE_S3C2410_WATCHDOG |
925c68cd | 687 | select ARCH_USES_GETTIMEOFFSET |
4b623926 | 688 | select HAVE_S3C2410_I2C |
03eb2749 | 689 | select HAVE_S3C_RTC |
c4ffccdd KK |
690 | help |
691 | Samsung S5P6440 CPU based systems | |
692 | ||
550db7f1 KK |
693 | config ARCH_S5P6442 |
694 | bool "Samsung S5P6442" | |
695 | select CPU_V6 | |
696 | select GENERIC_GPIO | |
697 | select HAVE_CLK | |
925c68cd | 698 | select ARCH_USES_GETTIMEOFFSET |
d8653d9f | 699 | select HAVE_S3C2410_WATCHDOG |
550db7f1 KK |
700 | help |
701 | Samsung S5P6442 CPU based systems | |
702 | ||
acc84707 MS |
703 | config ARCH_S5PC100 |
704 | bool "Samsung S5PC100" | |
5a7652f2 BM |
705 | select GENERIC_GPIO |
706 | select HAVE_CLK | |
707 | select CPU_V7 | |
d6d502fa | 708 | select ARM_L1_CACHE_SHIFT_6 |
925c68cd | 709 | select ARCH_USES_GETTIMEOFFSET |
4b623926 | 710 | select HAVE_S3C2410_I2C |
03eb2749 | 711 | select HAVE_S3C_RTC |
d8653d9f | 712 | select HAVE_S3C2410_WATCHDOG |
5a7652f2 | 713 | help |
acc84707 | 714 | Samsung S5PC100 series based systems |
5a7652f2 | 715 | |
170f4e42 KK |
716 | config ARCH_S5PV210 |
717 | bool "Samsung S5PV210/S5PC110" | |
718 | select CPU_V7 | |
719 | select GENERIC_GPIO | |
720 | select HAVE_CLK | |
721 | select ARM_L1_CACHE_SHIFT_6 | |
925c68cd | 722 | select ARCH_USES_GETTIMEOFFSET |
4b623926 | 723 | select HAVE_S3C2410_I2C |
03eb2749 | 724 | select HAVE_S3C_RTC |
d8653d9f | 725 | select HAVE_S3C2410_WATCHDOG |
170f4e42 KK |
726 | help |
727 | Samsung S5PV210/S5PC110 series based systems | |
728 | ||
cc0e72b8 CY |
729 | config ARCH_S5PV310 |
730 | bool "Samsung S5PV310/S5PC210" | |
731 | select CPU_V7 | |
732 | select GENERIC_GPIO | |
733 | select HAVE_CLK | |
734 | select GENERIC_CLOCKEVENTS | |
735 | help | |
736 | Samsung S5PV310 series based systems | |
737 | ||
1da177e4 LT |
738 | config ARCH_SHARK |
739 | bool "Shark" | |
c750815e | 740 | select CPU_SA110 |
f7e68bbf RK |
741 | select ISA |
742 | select ISA_DMA | |
3bca103a | 743 | select ZONE_DMA |
f7e68bbf | 744 | select PCI |
5cfc8ee0 | 745 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
746 | help |
747 | Support for the StrongARM based Digital DNARD machine, also known | |
748 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 LT |
749 | |
750 | config ARCH_LH7A40X | |
751 | bool "Sharp LH7A40X" | |
c750815e | 752 | select CPU_ARM922T |
4ba3f7c5 | 753 | select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM |
5cfc8ee0 | 754 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
755 | help |
756 | Say Y here for systems based on one of the Sharp LH7A40X | |
757 | System on a Chip processors. These CPUs include an ARM922T | |
758 | core with a wide array of integrated devices for | |
759 | hand-held and low-power applications. | |
760 | ||
d98aac75 LW |
761 | config ARCH_U300 |
762 | bool "ST-Ericsson U300 Series" | |
763 | depends on MMU | |
764 | select CPU_ARM926T | |
bc581770 | 765 | select HAVE_TCM |
d98aac75 LW |
766 | select ARM_AMBA |
767 | select ARM_VIC | |
d98aac75 | 768 | select GENERIC_CLOCKEVENTS |
d98aac75 LW |
769 | select COMMON_CLKDEV |
770 | select GENERIC_GPIO | |
771 | help | |
772 | Support for ST-Ericsson U300 series mobile platforms. | |
773 | ||
ccf50e23 RK |
774 | config ARCH_U8500 |
775 | bool "ST-Ericsson U8500 Series" | |
776 | select CPU_V7 | |
777 | select ARM_AMBA | |
ccf50e23 RK |
778 | select GENERIC_CLOCKEVENTS |
779 | select COMMON_CLKDEV | |
94bdc0e2 | 780 | select ARCH_REQUIRE_GPIOLIB |
ccf50e23 RK |
781 | help |
782 | Support for ST-Ericsson's Ux500 architecture | |
783 | ||
784 | config ARCH_NOMADIK | |
785 | bool "STMicroelectronics Nomadik" | |
786 | select ARM_AMBA | |
787 | select ARM_VIC | |
788 | select CPU_ARM926T | |
ccf50e23 | 789 | select COMMON_CLKDEV |
ccf50e23 | 790 | select GENERIC_CLOCKEVENTS |
ccf50e23 RK |
791 | select ARCH_REQUIRE_GPIOLIB |
792 | help | |
793 | Support for the Nomadik platform by ST-Ericsson | |
794 | ||
7c6337e2 KH |
795 | config ARCH_DAVINCI |
796 | bool "TI DaVinci" | |
7c6337e2 | 797 | select GENERIC_CLOCKEVENTS |
dce1115b | 798 | select ARCH_REQUIRE_GPIOLIB |
3bca103a | 799 | select ZONE_DMA |
9232fcc9 | 800 | select HAVE_IDE |
c5b736d0 | 801 | select COMMON_CLKDEV |
20e9969b | 802 | select GENERIC_ALLOCATOR |
ae88e05a | 803 | select ARCH_HAS_HOLES_MEMORYMODEL |
7c6337e2 KH |
804 | help |
805 | Support for TI's DaVinci platform. | |
806 | ||
3b938be6 RK |
807 | config ARCH_OMAP |
808 | bool "TI OMAP" | |
9483a578 | 809 | select HAVE_CLK |
7444a72e | 810 | select ARCH_REQUIRE_GPIOLIB |
89c52ed4 | 811 | select ARCH_HAS_CPUFREQ |
06cad098 | 812 | select GENERIC_CLOCKEVENTS |
9af915da | 813 | select ARCH_HAS_HOLES_MEMORYMODEL |
3b938be6 RK |
814 | help |
815 | Support for TI's OMAP platform (OMAP1 and OMAP2). | |
816 | ||
cee37e50 | 817 | config PLAT_SPEAR |
818 | bool "ST SPEAr" | |
819 | select ARM_AMBA | |
820 | select ARCH_REQUIRE_GPIOLIB | |
821 | select COMMON_CLKDEV | |
822 | select GENERIC_CLOCKEVENTS | |
cee37e50 | 823 | select HAVE_CLK |
824 | help | |
825 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
826 | ||
1da177e4 LT |
827 | endchoice |
828 | ||
ccf50e23 RK |
829 | # |
830 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
831 | # Kconfigs may be included either alphabetically (according to the | |
832 | # plat- suffix) or along side the corresponding mach-* source. | |
833 | # | |
95b8f20f RK |
834 | source "arch/arm/mach-aaec2000/Kconfig" |
835 | ||
836 | source "arch/arm/mach-at91/Kconfig" | |
837 | ||
838 | source "arch/arm/mach-bcmring/Kconfig" | |
839 | ||
1da177e4 LT |
840 | source "arch/arm/mach-clps711x/Kconfig" |
841 | ||
d94f944e AV |
842 | source "arch/arm/mach-cns3xxx/Kconfig" |
843 | ||
95b8f20f RK |
844 | source "arch/arm/mach-davinci/Kconfig" |
845 | ||
846 | source "arch/arm/mach-dove/Kconfig" | |
847 | ||
e7736d47 LB |
848 | source "arch/arm/mach-ep93xx/Kconfig" |
849 | ||
1da177e4 LT |
850 | source "arch/arm/mach-footbridge/Kconfig" |
851 | ||
59d3a193 PZ |
852 | source "arch/arm/mach-gemini/Kconfig" |
853 | ||
95b8f20f RK |
854 | source "arch/arm/mach-h720x/Kconfig" |
855 | ||
1da177e4 LT |
856 | source "arch/arm/mach-integrator/Kconfig" |
857 | ||
3f7e5815 LB |
858 | source "arch/arm/mach-iop32x/Kconfig" |
859 | ||
860 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 861 | |
285f5fa7 DW |
862 | source "arch/arm/mach-iop13xx/Kconfig" |
863 | ||
1da177e4 LT |
864 | source "arch/arm/mach-ixp4xx/Kconfig" |
865 | ||
866 | source "arch/arm/mach-ixp2000/Kconfig" | |
867 | ||
c4713074 LB |
868 | source "arch/arm/mach-ixp23xx/Kconfig" |
869 | ||
95b8f20f RK |
870 | source "arch/arm/mach-kirkwood/Kconfig" |
871 | ||
872 | source "arch/arm/mach-ks8695/Kconfig" | |
873 | ||
874 | source "arch/arm/mach-lh7a40x/Kconfig" | |
875 | ||
777f9beb LB |
876 | source "arch/arm/mach-loki/Kconfig" |
877 | ||
40805949 KW |
878 | source "arch/arm/mach-lpc32xx/Kconfig" |
879 | ||
95b8f20f RK |
880 | source "arch/arm/mach-msm/Kconfig" |
881 | ||
794d15b2 SS |
882 | source "arch/arm/mach-mv78xx0/Kconfig" |
883 | ||
95b8f20f | 884 | source "arch/arm/plat-mxc/Kconfig" |
1da177e4 | 885 | |
95b8f20f | 886 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 887 | |
95b8f20f RK |
888 | source "arch/arm/mach-nomadik/Kconfig" |
889 | source "arch/arm/plat-nomadik/Kconfig" | |
890 | ||
891 | source "arch/arm/mach-ns9xxx/Kconfig" | |
1da177e4 | 892 | |
186f93ea | 893 | source "arch/arm/mach-nuc93x/Kconfig" |
1da177e4 | 894 | |
d48af15e TL |
895 | source "arch/arm/plat-omap/Kconfig" |
896 | ||
897 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 898 | |
1dbae815 TL |
899 | source "arch/arm/mach-omap2/Kconfig" |
900 | ||
9dd0b194 | 901 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 902 | |
95b8f20f RK |
903 | source "arch/arm/mach-pxa/Kconfig" |
904 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 905 | |
95b8f20f RK |
906 | source "arch/arm/mach-mmp/Kconfig" |
907 | ||
908 | source "arch/arm/mach-realview/Kconfig" | |
909 | ||
910 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 911 | |
cf383678 | 912 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 | 913 | source "arch/arm/plat-s3c24xx/Kconfig" |
c4ffccdd | 914 | source "arch/arm/plat-s5p/Kconfig" |
a21765a7 | 915 | |
cee37e50 | 916 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 BD |
917 | |
918 | if ARCH_S3C2410 | |
919 | source "arch/arm/mach-s3c2400/Kconfig" | |
1da177e4 | 920 | source "arch/arm/mach-s3c2410/Kconfig" |
a21765a7 | 921 | source "arch/arm/mach-s3c2412/Kconfig" |
f1290a49 | 922 | source "arch/arm/mach-s3c2416/Kconfig" |
a21765a7 | 923 | source "arch/arm/mach-s3c2440/Kconfig" |
e4d06e39 | 924 | source "arch/arm/mach-s3c2443/Kconfig" |
a21765a7 | 925 | endif |
1da177e4 | 926 | |
a08ab637 | 927 | if ARCH_S3C64XX |
431107ea | 928 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
929 | endif |
930 | ||
c4ffccdd KK |
931 | source "arch/arm/mach-s5p6440/Kconfig" |
932 | ||
550db7f1 | 933 | source "arch/arm/mach-s5p6442/Kconfig" |
7bd0f2f5 | 934 | |
5a7652f2 | 935 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 936 | |
170f4e42 KK |
937 | source "arch/arm/mach-s5pv210/Kconfig" |
938 | ||
cc0e72b8 CY |
939 | source "arch/arm/mach-s5pv310/Kconfig" |
940 | ||
882d01f9 | 941 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 942 | |
882d01f9 | 943 | source "arch/arm/plat-stmp3xxx/Kconfig" |
9e73c84c | 944 | |
c5f80065 EG |
945 | source "arch/arm/mach-tegra/Kconfig" |
946 | ||
95b8f20f | 947 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 948 | |
95b8f20f | 949 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
950 | |
951 | source "arch/arm/mach-versatile/Kconfig" | |
952 | ||
ceade897 RK |
953 | source "arch/arm/mach-vexpress/Kconfig" |
954 | ||
7ec80ddf | 955 | source "arch/arm/mach-w90x900/Kconfig" |
956 | ||
1da177e4 LT |
957 | # Definitions to make life easier |
958 | config ARCH_ACORN | |
959 | bool | |
960 | ||
7ae1f7ec LB |
961 | config PLAT_IOP |
962 | bool | |
469d3044 | 963 | select GENERIC_CLOCKEVENTS |
7ae1f7ec | 964 | |
69b02f6a LB |
965 | config PLAT_ORION |
966 | bool | |
967 | ||
bd5ce433 EM |
968 | config PLAT_PXA |
969 | bool | |
970 | ||
f4b8b319 RK |
971 | config PLAT_VERSATILE |
972 | bool | |
973 | ||
e3887714 RK |
974 | config ARM_TIMER_SP804 |
975 | bool | |
976 | ||
1da177e4 LT |
977 | source arch/arm/mm/Kconfig |
978 | ||
afe4b25e LB |
979 | config IWMMXT |
980 | bool "Enable iWMMXt support" | |
40305a58 EM |
981 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK |
982 | default y if PXA27x || PXA3xx || ARCH_MMP | |
afe4b25e LB |
983 | help |
984 | Enable support for iWMMXt context switching at run time if | |
985 | running on a CPU that supports it. | |
986 | ||
1da177e4 LT |
987 | # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER |
988 | config XSCALE_PMU | |
989 | bool | |
990 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER | |
991 | default y | |
992 | ||
0f4f0672 | 993 | config CPU_HAS_PMU |
8954bb0d WD |
994 | depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ |
995 | (!ARCH_OMAP3 || OMAP3_EMU) | |
0f4f0672 JI |
996 | default y |
997 | bool | |
998 | ||
3b93e7b0 HC |
999 | if !MMU |
1000 | source "arch/arm/Kconfig-nommu" | |
1001 | endif | |
1002 | ||
9cba3ccc CM |
1003 | config ARM_ERRATA_411920 |
1004 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
1005 | depends on CPU_V6 && !SMP | |
1006 | help | |
1007 | Invalidation of the Instruction Cache operation can | |
1008 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1009 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1010 | recommended workaround. | |
1011 | ||
7ce236fc CM |
1012 | config ARM_ERRATA_430973 |
1013 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1014 | depends on CPU_V7 | |
1015 | help | |
1016 | This option enables the workaround for the 430973 Cortex-A8 | |
1017 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1018 | interworking branch is replaced with another code sequence at the | |
1019 | same virtual address, whether due to self-modifying code or virtual | |
1020 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1021 | stale interworking branch prediction. This results in Cortex-A8 | |
1022 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1023 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1024 | and also flushes the branch target cache at every context switch. | |
1025 | Note that setting specific bits in the ACTLR register may not be | |
1026 | available in non-secure mode. | |
1027 | ||
855c551f CM |
1028 | config ARM_ERRATA_458693 |
1029 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1030 | depends on CPU_V7 | |
1031 | help | |
1032 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1033 | erratum. For very specific sequences of memory operations, it is | |
1034 | possible for a hazard condition intended for a cache line to instead | |
1035 | be incorrectly associated with a different cache line. This false | |
1036 | hazard might then cause a processor deadlock. The workaround enables | |
1037 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1038 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1039 | register may not be available in non-secure mode. | |
1040 | ||
0516e464 CM |
1041 | config ARM_ERRATA_460075 |
1042 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1043 | depends on CPU_V7 | |
1044 | help | |
1045 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1046 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1047 | situation in which recent store transactions to the L2 cache are lost | |
1048 | and overwritten with stale memory contents from external memory. The | |
1049 | workaround disables the write-allocate mode for the L2 cache via the | |
1050 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1051 | may not be available in non-secure mode. | |
1052 | ||
9f05027c WD |
1053 | config ARM_ERRATA_742230 |
1054 | bool "ARM errata: DMB operation may be faulty" | |
1055 | depends on CPU_V7 && SMP | |
1056 | help | |
1057 | This option enables the workaround for the 742230 Cortex-A9 | |
1058 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1059 | between two write operations may not ensure the correct visibility | |
1060 | ordering of the two writes. This workaround sets a specific bit in | |
1061 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1062 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1063 | the two writes. | |
1064 | ||
a672e99b WD |
1065 | config ARM_ERRATA_742231 |
1066 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1067 | depends on CPU_V7 && SMP | |
1068 | help | |
1069 | This option enables the workaround for the 742231 Cortex-A9 | |
1070 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1071 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1072 | accessing some data located in the same cache line, may get corrupted | |
1073 | data due to bad handling of the address hazard when the line gets | |
1074 | replaced from one of the CPUs at the same time as another CPU is | |
1075 | accessing it. This workaround sets specific bits in the diagnostic | |
1076 | register of the Cortex-A9 which reduces the linefill issuing | |
1077 | capabilities of the processor. | |
1078 | ||
9e65582a SS |
1079 | config PL310_ERRATA_588369 |
1080 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | |
1081 | depends on CACHE_L2X0 && ARCH_OMAP4 | |
1082 | help | |
1083 | The PL310 L2 cache controller implements three types of Clean & | |
1084 | Invalidate maintenance operations: by Physical Address | |
1085 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1086 | They are architecturally defined to behave as the execution of a | |
1087 | clean operation followed immediately by an invalidate operation, | |
1088 | both performing to the same memory location. This functionality | |
1089 | is not correctly implemented in PL310 as clean lines are not | |
1090 | invalidated as a result of these operations. Note that this errata | |
1091 | uses Texas Instrument's secure monitor api. | |
cdf357f1 WD |
1092 | |
1093 | config ARM_ERRATA_720789 | |
1094 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
1095 | depends on CPU_V7 && SMP | |
1096 | help | |
1097 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1098 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1099 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1100 | As a consequence of this erratum, some TLB entries which should be | |
1101 | invalidated are not, resulting in an incoherency in the system page | |
1102 | tables. The workaround changes the TLB flushing routines to invalidate | |
1103 | entries regardless of the ASID. | |
475d92fc WD |
1104 | |
1105 | config ARM_ERRATA_743622 | |
1106 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1107 | depends on CPU_V7 | |
1108 | help | |
1109 | This option enables the workaround for the 743622 Cortex-A9 | |
1110 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | |
1111 | optimisation in the Cortex-A9 Store Buffer may lead to data | |
1112 | corruption. This workaround sets a specific bit in the diagnostic | |
1113 | register of the Cortex-A9 which disables the Store Buffer | |
1114 | optimisation, preventing the defect from occurring. This has no | |
1115 | visible impact on the overall performance or power consumption of the | |
1116 | processor. | |
1117 | ||
1da177e4 LT |
1118 | endmenu |
1119 | ||
1120 | source "arch/arm/common/Kconfig" | |
1121 | ||
1da177e4 LT |
1122 | menu "Bus support" |
1123 | ||
1124 | config ARM_AMBA | |
1125 | bool | |
1126 | ||
1127 | config ISA | |
1128 | bool | |
1da177e4 LT |
1129 | help |
1130 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1131 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1132 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1133 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1134 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1135 | ||
065909b9 | 1136 | # Select ISA DMA controller support |
1da177e4 LT |
1137 | config ISA_DMA |
1138 | bool | |
065909b9 | 1139 | select ISA_DMA_API |
1da177e4 | 1140 | |
065909b9 | 1141 | # Select ISA DMA interface |
5cae841b AV |
1142 | config ISA_DMA_API |
1143 | bool | |
5cae841b | 1144 | |
1da177e4 | 1145 | config PCI |
5f32f7a0 | 1146 | bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX |
1da177e4 LT |
1147 | help |
1148 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1149 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1150 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1151 | VESA. If you have PCI, say Y, otherwise N. | |
1152 | ||
52882173 AV |
1153 | config PCI_DOMAINS |
1154 | bool | |
1155 | depends on PCI | |
1156 | ||
36e23590 MW |
1157 | config PCI_SYSCALL |
1158 | def_bool PCI | |
1159 | ||
1da177e4 LT |
1160 | # Select the host bridge type |
1161 | config PCI_HOST_VIA82C505 | |
1162 | bool | |
1163 | depends on PCI && ARCH_SHARK | |
1164 | default y | |
1165 | ||
a0113a99 MR |
1166 | config PCI_HOST_ITE8152 |
1167 | bool | |
1168 | depends on PCI && MACH_ARMCORE | |
1169 | default y | |
1170 | select DMABOUNCE | |
1171 | ||
1da177e4 LT |
1172 | source "drivers/pci/Kconfig" |
1173 | ||
1174 | source "drivers/pcmcia/Kconfig" | |
1175 | ||
1176 | endmenu | |
1177 | ||
1178 | menu "Kernel Features" | |
1179 | ||
0567a0c0 KH |
1180 | source "kernel/time/Kconfig" |
1181 | ||
1da177e4 LT |
1182 | config SMP |
1183 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | |
42578c82 | 1184 | depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ |
59ac59f6 | 1185 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\ |
0b019a41 | 1186 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) |
bc28248e | 1187 | depends on GENERIC_CLOCKEVENTS |
f6dd9fa5 | 1188 | select USE_GENERIC_SMP_HELPERS |
0b019a41 RK |
1189 | select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\ |
1190 | ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 | |
1da177e4 LT |
1191 | help |
1192 | This enables support for systems with more than one CPU. If you have | |
1193 | a system with only one CPU, like most personal computers, say N. If | |
1194 | you have a system with more than one CPU, say Y. | |
1195 | ||
1196 | If you say N here, the kernel will run on single and multiprocessor | |
1197 | machines, but will use only one CPU of a multiprocessor machine. If | |
1198 | you say Y here, the kernel will run on many, but not all, single | |
1199 | processor machines. On a single processor machine, the kernel will | |
1200 | run faster if you say N here. | |
1201 | ||
03502faa | 1202 | See also <file:Documentation/i386/IO-APIC.txt>, |
1da177e4 LT |
1203 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
1204 | <http://www.linuxdoc.org/docs.html#howto>. | |
1205 | ||
1206 | If you don't know what to do here, say N. | |
1207 | ||
a8cbcd92 RK |
1208 | config HAVE_ARM_SCU |
1209 | bool | |
1210 | depends on SMP | |
1211 | help | |
1212 | This option enables support for the ARM system coherency unit | |
1213 | ||
f32f4ce2 RK |
1214 | config HAVE_ARM_TWD |
1215 | bool | |
1216 | depends on SMP | |
1217 | help | |
1218 | This options enables support for the ARM timer and watchdog unit | |
1219 | ||
8d5796d2 LB |
1220 | choice |
1221 | prompt "Memory split" | |
1222 | default VMSPLIT_3G | |
1223 | help | |
1224 | Select the desired split between kernel and user memory. | |
1225 | ||
1226 | If you are not absolutely sure what you are doing, leave this | |
1227 | option alone! | |
1228 | ||
1229 | config VMSPLIT_3G | |
1230 | bool "3G/1G user/kernel split" | |
1231 | config VMSPLIT_2G | |
1232 | bool "2G/2G user/kernel split" | |
1233 | config VMSPLIT_1G | |
1234 | bool "1G/3G user/kernel split" | |
1235 | endchoice | |
1236 | ||
1237 | config PAGE_OFFSET | |
1238 | hex | |
1239 | default 0x40000000 if VMSPLIT_1G | |
1240 | default 0x80000000 if VMSPLIT_2G | |
1241 | default 0xC0000000 | |
1242 | ||
1da177e4 LT |
1243 | config NR_CPUS |
1244 | int "Maximum number of CPUs (2-32)" | |
1245 | range 2 32 | |
1246 | depends on SMP | |
1247 | default "4" | |
1248 | ||
a054a811 RK |
1249 | config HOTPLUG_CPU |
1250 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
1251 | depends on SMP && HOTPLUG && EXPERIMENTAL | |
1252 | help | |
1253 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1254 | can be controlled through /sys/devices/system/cpu. | |
1255 | ||
37ee16ae RK |
1256 | config LOCAL_TIMERS |
1257 | bool "Use local timer interrupts" | |
42578c82 | 1258 | depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ |
bde28b84 | 1259 | REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
0b019a41 | 1260 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) |
37ee16ae | 1261 | default y |
0b019a41 RK |
1262 | select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \ |
1263 | ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS | |
37ee16ae RK |
1264 | help |
1265 | Enable support for local timers on SMP platforms, rather then the | |
1266 | legacy IPI broadcast method. Local timers allows the system | |
1267 | accounting to be spread across the timer interval, preventing a | |
1268 | "thundering herd" at every timer tick. | |
1269 | ||
d45a398f | 1270 | source kernel/Kconfig.preempt |
1da177e4 | 1271 | |
f8065813 RK |
1272 | config HZ |
1273 | int | |
2192482e RK |
1274 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \ |
1275 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 | |
bfe65704 | 1276 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1277 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1278 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1279 | default 100 |
1280 | ||
16c79651 CM |
1281 | config THUMB2_KERNEL |
1282 | bool "Compile the kernel in Thumb-2 mode" | |
1283 | depends on CPU_V7 && EXPERIMENTAL | |
1284 | select AEABI | |
1285 | select ARM_ASM_UNIFIED | |
1286 | help | |
1287 | By enabling this option, the kernel will be compiled in | |
1288 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1289 | ARM-Thumb syntax is needed. | |
1290 | ||
1291 | If unsure, say N. | |
1292 | ||
0becb088 CM |
1293 | config ARM_ASM_UNIFIED |
1294 | bool | |
1295 | ||
704bdda0 NP |
1296 | config AEABI |
1297 | bool "Use the ARM EABI to compile the kernel" | |
1298 | help | |
1299 | This option allows for the kernel to be compiled using the latest | |
1300 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1301 | space environment that is also compiled with EABI. | |
1302 | ||
1303 | Since there are major incompatibilities between the legacy ABI and | |
1304 | EABI, especially with regard to structure member alignment, this | |
1305 | option also changes the kernel syscall calling convention to | |
1306 | disambiguate both ABIs and allow for backward compatibility support | |
1307 | (selected with CONFIG_OABI_COMPAT). | |
1308 | ||
1309 | To use this you need GCC version 4.0.0 or later. | |
1310 | ||
6c90c872 | 1311 | config OABI_COMPAT |
a73a3ff1 | 1312 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
61c484d4 | 1313 | depends on AEABI && EXPERIMENTAL |
6c90c872 NP |
1314 | default y |
1315 | help | |
1316 | This option preserves the old syscall interface along with the | |
1317 | new (ARM EABI) one. It also provides a compatibility layer to | |
1318 | intercept syscalls that have structure arguments which layout | |
1319 | in memory differs between the legacy ABI and the new ARM EABI | |
1320 | (only for non "thumb" binaries). This option adds a tiny | |
1321 | overhead to all syscalls and produces a slightly larger kernel. | |
1322 | If you know you'll be using only pure EABI user space then you | |
1323 | can say N here. If this option is not selected and you attempt | |
1324 | to execute a legacy ABI binary then the result will be | |
1325 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1326 | at all). If in doubt say Y. | |
1327 | ||
eb33575c | 1328 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1329 | bool |
e80d6a24 | 1330 | |
05944d74 RK |
1331 | config ARCH_SPARSEMEM_ENABLE |
1332 | bool | |
1333 | ||
07a2f737 RK |
1334 | config ARCH_SPARSEMEM_DEFAULT |
1335 | def_bool ARCH_SPARSEMEM_ENABLE | |
1336 | ||
05944d74 | 1337 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1338 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1339 | |
053a96ca NP |
1340 | config HIGHMEM |
1341 | bool "High Memory Support (EXPERIMENTAL)" | |
1342 | depends on MMU && EXPERIMENTAL | |
1343 | help | |
1344 | The address space of ARM processors is only 4 Gigabytes large | |
1345 | and it has to accommodate user address space, kernel address | |
1346 | space as well as some memory mapped IO. That means that, if you | |
1347 | have a large amount of physical memory and/or IO, not all of the | |
1348 | memory can be "permanently mapped" by the kernel. The physical | |
1349 | memory that is not permanently mapped is called "high memory". | |
1350 | ||
1351 | Depending on the selected kernel/user memory split, minimum | |
1352 | vmalloc space and actual amount of RAM, you may not need this | |
1353 | option which should result in a slightly faster kernel. | |
1354 | ||
1355 | If unsure, say n. | |
1356 | ||
65cec8e3 RK |
1357 | config HIGHPTE |
1358 | bool "Allocate 2nd-level pagetables from highmem" | |
1359 | depends on HIGHMEM | |
1360 | depends on !OUTER_CACHE | |
1361 | ||
1b8873a0 JI |
1362 | config HW_PERF_EVENTS |
1363 | bool "Enable hardware performance counter support for perf events" | |
fe166148 | 1364 | depends on PERF_EVENTS && CPU_HAS_PMU |
1b8873a0 JI |
1365 | default y |
1366 | help | |
1367 | Enable hardware performance counter support for perf events. If | |
1368 | disabled, perf events will use software events only. | |
1369 | ||
354e6f72 | 1370 | config SPARSE_IRQ |
c1ba6ba3 | 1371 | def_bool n |
354e6f72 | 1372 | help |
1373 | This enables support for sparse irqs. This is useful in general | |
1374 | as most CPUs have a fairly sparse array of IRQ vectors, which | |
1375 | the irq_desc then maps directly on to. Systems with a high | |
1376 | number of off-chip IRQs will want to treat this as | |
1377 | experimental until they have been independently verified. | |
1378 | ||
3f22ab27 DH |
1379 | source "mm/Kconfig" |
1380 | ||
c1b2d970 MD |
1381 | config FORCE_MAX_ZONEORDER |
1382 | int "Maximum zone order" if ARCH_SHMOBILE | |
1383 | range 11 64 if ARCH_SHMOBILE | |
1384 | default "9" if SA1111 | |
1385 | default "11" | |
1386 | help | |
1387 | The kernel memory allocator divides physically contiguous memory | |
1388 | blocks into "zones", where each zone is a power of two number of | |
1389 | pages. This option selects the largest power of two that the kernel | |
1390 | keeps in the memory allocator. If you need to allocate very large | |
1391 | blocks of physically contiguous memory, then you may need to | |
1392 | increase this value. | |
1393 | ||
1394 | This config option is actually maximum order plus one. For example, | |
1395 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1396 | ||
1da177e4 LT |
1397 | config LEDS |
1398 | bool "Timer and CPU usage LEDs" | |
e055d5bf | 1399 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
8c8fdbc9 | 1400 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
1da177e4 LT |
1401 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
1402 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | |
73a59c1c | 1403 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
25329671 | 1404 | ARCH_AT91 || ARCH_DAVINCI || \ |
ff3042fb | 1405 | ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW |
1da177e4 LT |
1406 | help |
1407 | If you say Y here, the LEDs on your machine will be used | |
1408 | to provide useful information about your current system status. | |
1409 | ||
1410 | If you are compiling a kernel for a NetWinder or EBSA-285, you will | |
1411 | be able to select which LEDs are active using the options below. If | |
1412 | you are compiling a kernel for the EBSA-110 or the LART however, the | |
1413 | red LED will simply flash regularly to indicate that the system is | |
1414 | still functional. It is safe to say Y here if you have a CATS | |
1415 | system, but the driver will do nothing. | |
1416 | ||
1417 | config LEDS_TIMER | |
1418 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | |
eebdf7d7 DB |
1419 | OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ |
1420 | || MACH_OMAP_PERSEUS2 | |
1da177e4 | 1421 | depends on LEDS |
0567a0c0 | 1422 | depends on !GENERIC_CLOCKEVENTS |
1da177e4 LT |
1423 | default y if ARCH_EBSA110 |
1424 | help | |
1425 | If you say Y here, one of the system LEDs (the green one on the | |
1426 | NetWinder, the amber one on the EBSA285, or the red one on the LART) | |
1427 | will flash regularly to indicate that the system is still | |
1428 | operational. This is mainly useful to kernel hackers who are | |
1429 | debugging unstable kernels. | |
1430 | ||
1431 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1432 | functions. You may choose to use both, but the Timer LED function | |
1433 | will overrule the CPU usage LED. | |
1434 | ||
1435 | config LEDS_CPU | |
1436 | bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ | |
eebdf7d7 DB |
1437 | !ARCH_OMAP) \ |
1438 | || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ | |
1439 | || MACH_OMAP_PERSEUS2 | |
1da177e4 LT |
1440 | depends on LEDS |
1441 | help | |
1442 | If you say Y here, the red LED will be used to give a good real | |
1443 | time indication of CPU usage, by lighting whenever the idle task | |
1444 | is not currently executing. | |
1445 | ||
1446 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1447 | functions. You may choose to use both, but the Timer LED function | |
1448 | will overrule the CPU usage LED. | |
1449 | ||
1450 | config ALIGNMENT_TRAP | |
1451 | bool | |
f12d0d7c | 1452 | depends on CPU_CP15_MMU |
1da177e4 | 1453 | default y if !ARCH_EBSA110 |
e119bfff | 1454 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1455 | help |
84eb8d06 | 1456 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1457 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1458 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1459 | fetch/store instructions will be emulated in software if you say | |
1460 | here, which has a severe performance impact. This is necessary for | |
1461 | correct operation of some network protocols. With an IP-only | |
1462 | configuration it is safe to say N, otherwise say Y. | |
1463 | ||
39ec58f3 LB |
1464 | config UACCESS_WITH_MEMCPY |
1465 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" | |
1466 | depends on MMU && EXPERIMENTAL | |
1467 | default y if CPU_FEROCEON | |
1468 | help | |
1469 | Implement faster copy_to_user and clear_user methods for CPU | |
1470 | cores where a 8-word STM instruction give significantly higher | |
1471 | memory write throughput than a sequence of individual 32bit stores. | |
1472 | ||
1473 | A possible side effect is a slight increase in scheduling latency | |
1474 | between threads sharing the same address space if they invoke | |
1475 | such copy operations with large buffers. | |
1476 | ||
1477 | However, if the CPU data cache is using a write-allocate mode, | |
1478 | this option is unlikely to provide any performance gain. | |
1479 | ||
c743f380 NP |
1480 | config CC_STACKPROTECTOR |
1481 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
1482 | help | |
1483 | This option turns on the -fstack-protector GCC feature. This | |
1484 | feature puts, at the beginning of functions, a canary value on | |
1485 | the stack just before the return address, and validates | |
1486 | the value just before actually returning. Stack based buffer | |
1487 | overflows (that need to overwrite this return address) now also | |
1488 | overwrite the canary, which gets detected and the attack is then | |
1489 | neutralized via a kernel panic. | |
1490 | This feature requires gcc version 4.2 or above. | |
1491 | ||
73a65b3f UKK |
1492 | config DEPRECATED_PARAM_STRUCT |
1493 | bool "Provide old way to pass kernel parameters" | |
1494 | help | |
1495 | This was deprecated in 2001 and announced to live on for 5 years. | |
1496 | Some old boot loaders still use this way. | |
1497 | ||
1da177e4 LT |
1498 | endmenu |
1499 | ||
1500 | menu "Boot options" | |
1501 | ||
1502 | # Compressed boot loader in ROM. Yes, we really want to ask about | |
1503 | # TEXT and BSS so we preserve their values in the config files. | |
1504 | config ZBOOT_ROM_TEXT | |
1505 | hex "Compressed ROM boot loader base address" | |
1506 | default "0" | |
1507 | help | |
1508 | The physical address at which the ROM-able zImage is to be | |
1509 | placed in the target. Platforms which normally make use of | |
1510 | ROM-able zImage formats normally set this to a suitable | |
1511 | value in their defconfig file. | |
1512 | ||
1513 | If ZBOOT_ROM is not enabled, this has no effect. | |
1514 | ||
1515 | config ZBOOT_ROM_BSS | |
1516 | hex "Compressed ROM boot loader BSS address" | |
1517 | default "0" | |
1518 | help | |
f8c440b2 DF |
1519 | The base address of an area of read/write memory in the target |
1520 | for the ROM-able zImage which must be available while the | |
1521 | decompressor is running. It must be large enough to hold the | |
1522 | entire decompressed kernel plus an additional 128 KiB. | |
1523 | Platforms which normally make use of ROM-able zImage formats | |
1524 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1525 | |
1526 | If ZBOOT_ROM is not enabled, this has no effect. | |
1527 | ||
1528 | config ZBOOT_ROM | |
1529 | bool "Compressed boot loader in ROM/flash" | |
1530 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1531 | help | |
1532 | Say Y here if you intend to execute your compressed kernel image | |
1533 | (zImage) directly from ROM or flash. If unsure, say N. | |
1534 | ||
1535 | config CMDLINE | |
1536 | string "Default kernel command string" | |
1537 | default "" | |
1538 | help | |
1539 | On some architectures (EBSA110 and CATS), there is currently no way | |
1540 | for the boot loader to pass arguments to the kernel. For these | |
1541 | architectures, you should supply some command-line options at build | |
1542 | time by entering them here. As a minimum, you should specify the | |
1543 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
1544 | ||
92d2040d AH |
1545 | config CMDLINE_FORCE |
1546 | bool "Always use the default kernel command string" | |
1547 | depends on CMDLINE != "" | |
1548 | help | |
1549 | Always use the default kernel command string, even if the boot | |
1550 | loader passes other arguments to the kernel. | |
1551 | This is useful if you cannot or don't want to change the | |
1552 | command-line options your boot loader passes to the kernel. | |
1553 | ||
1554 | If unsure, say N. | |
1555 | ||
1da177e4 LT |
1556 | config XIP_KERNEL |
1557 | bool "Kernel Execute-In-Place from ROM" | |
1558 | depends on !ZBOOT_ROM | |
1559 | help | |
1560 | Execute-In-Place allows the kernel to run from non-volatile storage | |
1561 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
1562 | space since the text section of the kernel is not loaded from flash | |
1563 | to RAM. Read-write sections, such as the data section and stack, | |
1564 | are still copied to RAM. The XIP kernel is not compressed since | |
1565 | it has to run directly from flash, so it will take more space to | |
1566 | store it. The flash address used to link the kernel object files, | |
1567 | and for storing it, is configuration dependent. Therefore, if you | |
1568 | say Y here, you must know the proper physical address where to | |
1569 | store the kernel image depending on your own flash memory usage. | |
1570 | ||
1571 | Also note that the make target becomes "make xipImage" rather than | |
1572 | "make zImage" or "make Image". The final kernel binary to put in | |
1573 | ROM memory will be arch/arm/boot/xipImage. | |
1574 | ||
1575 | If unsure, say N. | |
1576 | ||
1577 | config XIP_PHYS_ADDR | |
1578 | hex "XIP Kernel Physical Location" | |
1579 | depends on XIP_KERNEL | |
1580 | default "0x00080000" | |
1581 | help | |
1582 | This is the physical address in your flash memory the kernel will | |
1583 | be linked for and stored to. This address is dependent on your | |
1584 | own flash usage. | |
1585 | ||
c587e4a6 RP |
1586 | config KEXEC |
1587 | bool "Kexec system call (EXPERIMENTAL)" | |
1588 | depends on EXPERIMENTAL | |
1589 | help | |
1590 | kexec is a system call that implements the ability to shutdown your | |
1591 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 1592 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
1593 | you can start any kernel with it, not just Linux. |
1594 | ||
1595 | It is an ongoing process to be certain the hardware in a machine | |
1596 | is properly shutdown, so do not be surprised if this code does not | |
1597 | initially work for you. It may help to enable device hotplugging | |
1598 | support. | |
1599 | ||
4cd9d6f7 RP |
1600 | config ATAGS_PROC |
1601 | bool "Export atags in procfs" | |
b98d7291 UL |
1602 | depends on KEXEC |
1603 | default y | |
4cd9d6f7 RP |
1604 | help |
1605 | Should the atags used to boot the kernel be exported in an "atags" | |
1606 | file in procfs. Useful with kexec. | |
1607 | ||
e69edc79 EM |
1608 | config AUTO_ZRELADDR |
1609 | bool "Auto calculation of the decompressed kernel image address" | |
1610 | depends on !ZBOOT_ROM && !ARCH_U300 | |
1611 | help | |
1612 | ZRELADDR is the physical address where the decompressed kernel | |
1613 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
1614 | will be determined at run-time by masking the current IP with | |
1615 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
1616 | from start of memory. | |
1617 | ||
1da177e4 LT |
1618 | endmenu |
1619 | ||
ac9d7efc | 1620 | menu "CPU Power Management" |
1da177e4 | 1621 | |
89c52ed4 | 1622 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
1623 | |
1624 | source "drivers/cpufreq/Kconfig" | |
1625 | ||
1626 | config CPU_FREQ_SA1100 | |
1627 | bool | |
1da177e4 LT |
1628 | |
1629 | config CPU_FREQ_SA1110 | |
1630 | bool | |
1da177e4 LT |
1631 | |
1632 | config CPU_FREQ_INTEGRATOR | |
1633 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
1634 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
1635 | default y | |
1636 | help | |
1637 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
1638 | ||
1639 | For details, take a look at <file:Documentation/cpu-freq>. | |
1640 | ||
1641 | If in doubt, say Y. | |
1642 | ||
9e2697ff RK |
1643 | config CPU_FREQ_PXA |
1644 | bool | |
1645 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
1646 | default y | |
1647 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | |
1648 | ||
b3748ddd MB |
1649 | config CPU_FREQ_S3C64XX |
1650 | bool "CPUfreq support for Samsung S3C64XX CPUs" | |
1651 | depends on CPU_FREQ && CPU_S3C6410 | |
1652 | ||
9d56c02a BD |
1653 | config CPU_FREQ_S3C |
1654 | bool | |
1655 | help | |
1656 | Internal configuration node for common cpufreq on Samsung SoC | |
1657 | ||
1658 | config CPU_FREQ_S3C24XX | |
1659 | bool "CPUfreq driver for Samsung S3C24XX series CPUs" | |
1660 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL | |
1661 | select CPU_FREQ_S3C | |
1662 | help | |
1663 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
1664 | of CPUs. | |
1665 | ||
1666 | For details, take a look at <file:Documentation/cpu-freq>. | |
1667 | ||
1668 | If in doubt, say N. | |
1669 | ||
1670 | config CPU_FREQ_S3C24XX_PLL | |
1671 | bool "Support CPUfreq changing of PLL frequency" | |
1672 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL | |
1673 | help | |
1674 | Compile in support for changing the PLL frequency from the | |
1675 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
1676 | after a frequency change, so by default it is not enabled. | |
1677 | ||
1678 | This also means that the PLL tables for the selected CPU(s) will | |
1679 | be built which may increase the size of the kernel image. | |
1680 | ||
1681 | config CPU_FREQ_S3C24XX_DEBUG | |
1682 | bool "Debug CPUfreq Samsung driver core" | |
1683 | depends on CPU_FREQ_S3C24XX | |
1684 | help | |
1685 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
1686 | ||
1687 | config CPU_FREQ_S3C24XX_IODEBUG | |
1688 | bool "Debug CPUfreq Samsung driver IO timing" | |
1689 | depends on CPU_FREQ_S3C24XX | |
1690 | help | |
1691 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
1692 | ||
e6d197a6 BD |
1693 | config CPU_FREQ_S3C24XX_DEBUGFS |
1694 | bool "Export debugfs for CPUFreq" | |
1695 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
1696 | help | |
1697 | Export status information via debugfs. | |
1698 | ||
1da177e4 LT |
1699 | endif |
1700 | ||
ac9d7efc RK |
1701 | source "drivers/cpuidle/Kconfig" |
1702 | ||
1703 | endmenu | |
1704 | ||
1da177e4 LT |
1705 | menu "Floating point emulation" |
1706 | ||
1707 | comment "At least one emulation must be selected" | |
1708 | ||
1709 | config FPE_NWFPE | |
1710 | bool "NWFPE math emulation" | |
8993a44c | 1711 | depends on !AEABI || OABI_COMPAT |
1da177e4 LT |
1712 | ---help--- |
1713 | Say Y to include the NWFPE floating point emulator in the kernel. | |
1714 | This is necessary to run most binaries. Linux does not currently | |
1715 | support floating point hardware so you need to say Y here even if | |
1716 | your machine has an FPA or floating point co-processor podule. | |
1717 | ||
1718 | You may say N here if you are going to load the Acorn FPEmulator | |
1719 | early in the bootup. | |
1720 | ||
1721 | config FPE_NWFPE_XP | |
1722 | bool "Support extended precision" | |
bedf142b | 1723 | depends on FPE_NWFPE |
1da177e4 LT |
1724 | help |
1725 | Say Y to include 80-bit support in the kernel floating-point | |
1726 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
1727 | Note that gcc does not generate 80-bit operations by default, | |
1728 | so in most cases this option only enlarges the size of the | |
1729 | floating point emulator without any good reason. | |
1730 | ||
1731 | You almost surely want to say N here. | |
1732 | ||
1733 | config FPE_FASTFPE | |
1734 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 1735 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
1736 | ---help--- |
1737 | Say Y here to include the FAST floating point emulator in the kernel. | |
1738 | This is an experimental much faster emulator which now also has full | |
1739 | precision for the mantissa. It does not support any exceptions. | |
1740 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
1741 | ||
1742 | It should be sufficient for most programs. It may be not suitable | |
1743 | for scientific calculations, but you have to check this for yourself. | |
1744 | If you do not feel you need a faster FP emulation you should better | |
1745 | choose NWFPE. | |
1746 | ||
1747 | config VFP | |
1748 | bool "VFP-format floating point maths" | |
c00d4ffd | 1749 | depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
1750 | help |
1751 | Say Y to include VFP support code in the kernel. This is needed | |
1752 | if your hardware includes a VFP unit. | |
1753 | ||
1754 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
1755 | release notes and additional status information. | |
1756 | ||
1757 | Say N if your target does not have VFP hardware. | |
1758 | ||
25ebee02 CM |
1759 | config VFPv3 |
1760 | bool | |
1761 | depends on VFP | |
1762 | default y if CPU_V7 | |
1763 | ||
b5872db4 CM |
1764 | config NEON |
1765 | bool "Advanced SIMD (NEON) Extension support" | |
1766 | depends on VFPv3 && CPU_V7 | |
1767 | help | |
1768 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
1769 | Extension. | |
1770 | ||
1da177e4 LT |
1771 | endmenu |
1772 | ||
1773 | menu "Userspace binary formats" | |
1774 | ||
1775 | source "fs/Kconfig.binfmt" | |
1776 | ||
1777 | config ARTHUR | |
1778 | tristate "RISC OS personality" | |
704bdda0 | 1779 | depends on !AEABI |
1da177e4 LT |
1780 | help |
1781 | Say Y here to include the kernel code necessary if you want to run | |
1782 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
1783 | experimental; if this sounds frightening, say N and sleep in peace. | |
1784 | You can also say M here to compile this support as a module (which | |
1785 | will be called arthur). | |
1786 | ||
1787 | endmenu | |
1788 | ||
1789 | menu "Power management options" | |
1790 | ||
eceab4ac | 1791 | source "kernel/power/Kconfig" |
1da177e4 | 1792 | |
f4cb5700 JB |
1793 | config ARCH_SUSPEND_POSSIBLE |
1794 | def_bool y | |
1795 | ||
1da177e4 LT |
1796 | endmenu |
1797 | ||
d5950b43 SR |
1798 | source "net/Kconfig" |
1799 | ||
ac25150f | 1800 | source "drivers/Kconfig" |
1da177e4 LT |
1801 | |
1802 | source "fs/Kconfig" | |
1803 | ||
1da177e4 LT |
1804 | source "arch/arm/Kconfig.debug" |
1805 | ||
1806 | source "security/Kconfig" | |
1807 | ||
1808 | source "crypto/Kconfig" | |
1809 | ||
1810 | source "lib/Kconfig" |