Commit | Line | Data |
---|---|---|
41195d23 VG |
1 | /* |
2 | * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * RajeshwarR: Dec 11, 2007 | |
9 | * -- Added support for Inter Processor Interrupts | |
10 | * | |
11 | * Vineetg: Nov 1st, 2007 | |
12 | * -- Initial Write (Borrowed heavily from ARM) | |
13 | */ | |
14 | ||
41195d23 | 15 | #include <linux/spinlock.h> |
68e21be2 | 16 | #include <linux/sched/mm.h> |
41195d23 VG |
17 | #include <linux/interrupt.h> |
18 | #include <linux/profile.h> | |
41195d23 VG |
19 | #include <linux/mm.h> |
20 | #include <linux/cpu.h> | |
41195d23 | 21 | #include <linux/irq.h> |
41195d23 | 22 | #include <linux/atomic.h> |
41195d23 | 23 | #include <linux/cpumask.h> |
41195d23 | 24 | #include <linux/reboot.h> |
34e71e4c | 25 | #include <linux/irqdomain.h> |
fdbed196 | 26 | #include <linux/export.h> |
a29a2527 | 27 | #include <linux/of_fdt.h> |
fdbed196 | 28 | |
41195d23 VG |
29 | #include <asm/processor.h> |
30 | #include <asm/setup.h> | |
03a6d28c | 31 | #include <asm/mach_desc.h> |
41195d23 | 32 | |
9fb92eb1 | 33 | #ifndef CONFIG_ARC_HAS_LLSC |
41195d23 VG |
34 | arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED; |
35 | arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED; | |
fdbed196 VG |
36 | |
37 | EXPORT_SYMBOL_GPL(smp_atomic_ops_lock); | |
38 | EXPORT_SYMBOL_GPL(smp_bitops_lock); | |
9fb92eb1 | 39 | #endif |
41195d23 | 40 | |
173eaafa | 41 | struct plat_smp_ops __weak plat_smp_ops; |
10b12718 | 42 | |
41195d23 VG |
43 | /* XXX: per cpu ? Only needed once in early seconday boot */ |
44 | struct task_struct *secondary_idle_tsk; | |
45 | ||
46 | /* Called from start_kernel */ | |
47 | void __init smp_prepare_boot_cpu(void) | |
48 | { | |
49 | } | |
50 | ||
a29a2527 EP |
51 | static int __init arc_get_cpu_map(const char *name, struct cpumask *cpumask) |
52 | { | |
53 | unsigned long dt_root = of_get_flat_dt_root(); | |
54 | const char *buf; | |
55 | ||
56 | buf = of_get_flat_dt_prop(dt_root, name, NULL); | |
57 | if (!buf) | |
58 | return -EINVAL; | |
59 | ||
60 | if (cpulist_parse(buf, cpumask)) | |
61 | return -EINVAL; | |
62 | ||
63 | return 0; | |
64 | } | |
65 | ||
66 | /* | |
67 | * Read from DeviceTree and setup cpu possible mask. If there is no | |
68 | * "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist. | |
69 | */ | |
70 | static void __init arc_init_cpu_possible(void) | |
71 | { | |
72 | struct cpumask cpumask; | |
73 | ||
74 | if (arc_get_cpu_map("possible-cpus", &cpumask)) { | |
75 | pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n", | |
76 | NR_CPUS); | |
77 | ||
78 | cpumask_setall(&cpumask); | |
79 | } | |
80 | ||
81 | if (!cpumask_test_cpu(0, &cpumask)) | |
82 | panic("Master cpu (cpu[0]) is missed in cpu possible mask!"); | |
83 | ||
84 | init_cpu_possible(&cpumask); | |
85 | } | |
86 | ||
41195d23 | 87 | /* |
e55af4da VG |
88 | * Called from setup_arch() before calling setup_processor() |
89 | * | |
90 | * - Initialise the CPU possible map early - this describes the CPUs | |
91 | * which may be present or become present in the system. | |
92 | * - Call early smp init hook. This can initialize a specific multi-core | |
93 | * IP which is say common to several platforms (hence not part of | |
94 | * platform specific int_early() hook) | |
41195d23 VG |
95 | */ |
96 | void __init smp_init_cpus(void) | |
97 | { | |
a29a2527 | 98 | arc_init_cpu_possible(); |
e55af4da VG |
99 | |
100 | if (plat_smp_ops.init_early_smp) | |
101 | plat_smp_ops.init_early_smp(); | |
41195d23 VG |
102 | } |
103 | ||
104 | /* called from init ( ) => process 1 */ | |
105 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
106 | { | |
41195d23 | 107 | /* |
8f6d9eb2 NC |
108 | * if platform didn't set the present map already, do it now |
109 | * boot cpu is set to present already by init/main.c | |
41195d23 | 110 | */ |
a29a2527 EP |
111 | if (num_present_cpus() <= 1) |
112 | init_cpu_present(cpu_possible_mask); | |
41195d23 VG |
113 | } |
114 | ||
115 | void __init smp_cpus_done(unsigned int max_cpus) | |
116 | { | |
117 | ||
118 | } | |
119 | ||
120 | /* | |
f33e9c43 VG |
121 | * Default smp boot helper for Run-on-reset case where all cores start off |
122 | * together. Non-masters need to wait for Master to start running. | |
123 | * This is implemented using a flag in memory, which Non-masters spin-wait on. | |
124 | * Master sets it to cpu-id of core to "ungate" it. | |
41195d23 | 125 | */ |
f33e9c43 VG |
126 | static volatile int wake_flag; |
127 | ||
78f824d4 VG |
128 | #ifdef CONFIG_ISA_ARCOMPACT |
129 | ||
130 | #define __boot_read(f) f | |
131 | #define __boot_write(f, v) f = v | |
132 | ||
133 | #else | |
134 | ||
135 | #define __boot_read(f) arc_read_uncached_32(&f) | |
136 | #define __boot_write(f, v) arc_write_uncached_32(&f, v) | |
137 | ||
138 | #endif | |
139 | ||
f33e9c43 | 140 | static void arc_default_smp_cpu_kick(int cpu, unsigned long pc) |
41195d23 | 141 | { |
f33e9c43 | 142 | BUG_ON(cpu == 0); |
78f824d4 VG |
143 | |
144 | __boot_write(wake_flag, cpu); | |
f33e9c43 VG |
145 | } |
146 | ||
147 | void arc_platform_smp_wait_to_boot(int cpu) | |
148 | { | |
bf02454a VG |
149 | /* for halt-on-reset, we've waited already */ |
150 | if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET)) | |
151 | return; | |
152 | ||
78f824d4 | 153 | while (__boot_read(wake_flag) != cpu) |
f33e9c43 VG |
154 | ; |
155 | ||
78f824d4 | 156 | __boot_write(wake_flag, 0); |
41195d23 VG |
157 | } |
158 | ||
10b12718 VG |
159 | const char *arc_platform_smp_cpuinfo(void) |
160 | { | |
619f3018 | 161 | return plat_smp_ops.info ? : ""; |
10b12718 VG |
162 | } |
163 | ||
41195d23 VG |
164 | /* |
165 | * The very first "C" code executed by secondary | |
166 | * Called from asm stub in head.S | |
167 | * "current"/R25 already setup by low level boot code | |
168 | */ | |
ce759956 | 169 | void start_kernel_secondary(void) |
41195d23 VG |
170 | { |
171 | struct mm_struct *mm = &init_mm; | |
172 | unsigned int cpu = smp_processor_id(); | |
173 | ||
174 | /* MMU, Caches, Vector Table, Interrupts etc */ | |
175 | setup_processor(); | |
176 | ||
3fce371b | 177 | mmget(mm); |
f1f10076 | 178 | mmgrab(mm); |
41195d23 | 179 | current->active_mm = mm; |
5ea72a90 | 180 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
41195d23 | 181 | |
286130eb | 182 | /* Some SMP H/w setup - for each cpu */ |
b474a023 NC |
183 | if (plat_smp_ops.init_per_cpu) |
184 | plat_smp_ops.init_per_cpu(cpu); | |
286130eb | 185 | |
575a9d4e VG |
186 | if (machine_desc->init_per_cpu) |
187 | machine_desc->init_per_cpu(cpu); | |
41195d23 | 188 | |
71f9cf8f NC |
189 | notify_cpu_starting(cpu); |
190 | set_cpu_online(cpu, true); | |
191 | ||
192 | pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu); | |
193 | ||
41195d23 VG |
194 | local_irq_enable(); |
195 | preempt_disable(); | |
fc6d73d6 | 196 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); |
41195d23 VG |
197 | } |
198 | ||
199 | /* | |
200 | * Called from kernel_init( ) -> smp_init( ) - for each CPU | |
201 | * | |
202 | * At this point, Secondary Processor is "HALT"ed: | |
203 | * -It booted, but was halted in head.S | |
204 | * -It was configured to halt-on-reset | |
205 | * So need to wake it up. | |
206 | * | |
207 | * Essential requirements being where to run from (PC) and stack (SP) | |
208 | */ | |
ce759956 | 209 | int __cpu_up(unsigned int cpu, struct task_struct *idle) |
41195d23 VG |
210 | { |
211 | unsigned long wait_till; | |
212 | ||
213 | secondary_idle_tsk = idle; | |
214 | ||
215 | pr_info("Idle Task [%d] %p", cpu, idle); | |
216 | pr_info("Trying to bring up CPU%u ...\n", cpu); | |
217 | ||
10b12718 VG |
218 | if (plat_smp_ops.cpu_kick) |
219 | plat_smp_ops.cpu_kick(cpu, | |
41195d23 | 220 | (unsigned long)first_lines_of_secondary); |
f33e9c43 VG |
221 | else |
222 | arc_default_smp_cpu_kick(cpu, (unsigned long)NULL); | |
41195d23 VG |
223 | |
224 | /* wait for 1 sec after kicking the secondary */ | |
225 | wait_till = jiffies + HZ; | |
226 | while (time_before(jiffies, wait_till)) { | |
227 | if (cpu_online(cpu)) | |
228 | break; | |
229 | } | |
230 | ||
231 | if (!cpu_online(cpu)) { | |
232 | pr_info("Timeout: CPU%u FAILED to comeup !!!\n", cpu); | |
233 | return -1; | |
234 | } | |
235 | ||
236 | secondary_idle_tsk = NULL; | |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
241 | /* | |
242 | * not supported here | |
243 | */ | |
b27f7391 | 244 | int setup_profiling_timer(unsigned int multiplier) |
41195d23 VG |
245 | { |
246 | return -EINVAL; | |
247 | } | |
248 | ||
249 | /*****************************************************************************/ | |
250 | /* Inter Processor Interrupt Handling */ | |
251 | /*****************************************************************************/ | |
252 | ||
41195d23 | 253 | enum ipi_msg_type { |
f2a4aa56 | 254 | IPI_EMPTY = 0, |
41195d23 VG |
255 | IPI_RESCHEDULE = 1, |
256 | IPI_CALL_FUNC, | |
f2a4aa56 | 257 | IPI_CPU_STOP, |
41195d23 VG |
258 | }; |
259 | ||
f2a4aa56 VG |
260 | /* |
261 | * In arches with IRQ for each msg type (above), receiver can use IRQ-id to | |
262 | * figure out what msg was sent. For those which don't (ARC has dedicated IPI | |
263 | * IRQ), the msg-type needs to be conveyed via per-cpu data | |
264 | */ | |
41195d23 | 265 | |
f2a4aa56 | 266 | static DEFINE_PER_CPU(unsigned long, ipi_data); |
41195d23 | 267 | |
ddf84433 | 268 | static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg) |
41195d23 | 269 | { |
f2a4aa56 | 270 | unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu); |
d8e8c7dd | 271 | unsigned long old, new; |
41195d23 | 272 | unsigned long flags; |
41195d23 | 273 | |
f2a4aa56 VG |
274 | pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu); |
275 | ||
41195d23 VG |
276 | local_irq_save(flags); |
277 | ||
d8e8c7dd VG |
278 | /* |
279 | * Atomically write new msg bit (in case others are writing too), | |
280 | * and read back old value | |
281 | */ | |
282 | do { | |
6aa7de05 | 283 | new = old = READ_ONCE(*ipi_data_ptr); |
d8e8c7dd VG |
284 | new |= 1U << msg; |
285 | } while (cmpxchg(ipi_data_ptr, old, new) != old); | |
41195d23 | 286 | |
d8e8c7dd VG |
287 | /* |
288 | * Call the platform specific IPI kick function, but avoid if possible: | |
289 | * Only do so if there's no pending msg from other concurrent sender(s). | |
290 | * Otherwise, recevier will see this msg as well when it takes the | |
291 | * IPI corresponding to that msg. This is true, even if it is already in | |
292 | * IPI handler, because !@old means it has not yet dequeued the msg(s) | |
293 | * so @new msg can be a free-loader | |
294 | */ | |
295 | if (plat_smp_ops.ipi_send && !old) | |
ddf84433 | 296 | plat_smp_ops.ipi_send(cpu); |
41195d23 VG |
297 | |
298 | local_irq_restore(flags); | |
299 | } | |
300 | ||
ddf84433 VG |
301 | static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg) |
302 | { | |
303 | unsigned int cpu; | |
304 | ||
305 | for_each_cpu(cpu, callmap) | |
306 | ipi_send_msg_one(cpu, msg); | |
307 | } | |
308 | ||
41195d23 VG |
309 | void smp_send_reschedule(int cpu) |
310 | { | |
ddf84433 | 311 | ipi_send_msg_one(cpu, IPI_RESCHEDULE); |
41195d23 VG |
312 | } |
313 | ||
314 | void smp_send_stop(void) | |
315 | { | |
316 | struct cpumask targets; | |
317 | cpumask_copy(&targets, cpu_online_mask); | |
318 | cpumask_clear_cpu(smp_processor_id(), &targets); | |
319 | ipi_send_msg(&targets, IPI_CPU_STOP); | |
320 | } | |
321 | ||
322 | void arch_send_call_function_single_ipi(int cpu) | |
323 | { | |
ddf84433 | 324 | ipi_send_msg_one(cpu, IPI_CALL_FUNC); |
41195d23 VG |
325 | } |
326 | ||
327 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) | |
328 | { | |
329 | ipi_send_msg(mask, IPI_CALL_FUNC); | |
330 | } | |
331 | ||
332 | /* | |
333 | * ipi_cpu_stop - handle IPI from smp_send_stop() | |
334 | */ | |
53dc110c | 335 | static void ipi_cpu_stop(void) |
41195d23 VG |
336 | { |
337 | machine_halt(); | |
338 | } | |
339 | ||
aa6083ed | 340 | static inline int __do_IPI(unsigned long msg) |
41195d23 | 341 | { |
aa6083ed VG |
342 | int rc = 0; |
343 | ||
d8e8c7dd VG |
344 | switch (msg) { |
345 | case IPI_RESCHEDULE: | |
346 | scheduler_ipi(); | |
347 | break; | |
41195d23 | 348 | |
d8e8c7dd VG |
349 | case IPI_CALL_FUNC: |
350 | generic_smp_call_function_interrupt(); | |
351 | break; | |
f2a4aa56 | 352 | |
d8e8c7dd VG |
353 | case IPI_CPU_STOP: |
354 | ipi_cpu_stop(); | |
355 | break; | |
f2a4aa56 | 356 | |
d8e8c7dd | 357 | default: |
aa6083ed | 358 | rc = 1; |
f2a4aa56 | 359 | } |
aa6083ed VG |
360 | |
361 | return rc; | |
41195d23 VG |
362 | } |
363 | ||
364 | /* | |
365 | * arch-common ISR to handle for inter-processor interrupts | |
366 | * Has hooks for platform specific IPI | |
367 | */ | |
368 | irqreturn_t do_IPI(int irq, void *dev_id) | |
369 | { | |
f2a4aa56 | 370 | unsigned long pending; |
aa6083ed | 371 | unsigned long __maybe_unused copy; |
f2a4aa56 VG |
372 | |
373 | pr_debug("IPI [%ld] received on cpu %d\n", | |
374 | *this_cpu_ptr(&ipi_data), smp_processor_id()); | |
41195d23 | 375 | |
10b12718 | 376 | if (plat_smp_ops.ipi_clear) |
ccdaa6e0 | 377 | plat_smp_ops.ipi_clear(irq); |
41195d23 VG |
378 | |
379 | /* | |
d8e8c7dd VG |
380 | * "dequeue" the msg corresponding to this IPI (and possibly other |
381 | * piggybacked msg from elided IPIs: see ipi_send_msg_one() above) | |
41195d23 | 382 | */ |
aa6083ed | 383 | copy = pending = xchg(this_cpu_ptr(&ipi_data), 0); |
d8e8c7dd VG |
384 | |
385 | do { | |
386 | unsigned long msg = __ffs(pending); | |
aa6083ed VG |
387 | int rc; |
388 | ||
389 | rc = __do_IPI(msg); | |
aa6083ed VG |
390 | if (rc) |
391 | pr_info("IPI with bogus msg %ld in %ld\n", msg, copy); | |
d8e8c7dd VG |
392 | pending &= ~(1U << msg); |
393 | } while (pending); | |
41195d23 VG |
394 | |
395 | return IRQ_HANDLED; | |
396 | } | |
397 | ||
398 | /* | |
399 | * API called by platform code to hookup arch-common ISR to their IPI IRQ | |
56957940 VG |
400 | * |
401 | * Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map | |
402 | * function needs to call call irq_set_percpu_devid() for IPI IRQ, otherwise | |
403 | * request_percpu_irq() below will fail | |
41195d23 VG |
404 | */ |
405 | static DEFINE_PER_CPU(int, ipi_dev); | |
7e512219 | 406 | |
34e71e4c | 407 | int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq) |
41195d23 | 408 | { |
2b75c0f9 | 409 | int *dev = per_cpu_ptr(&ipi_dev, cpu); |
34e71e4c YK |
410 | unsigned int virq = irq_find_mapping(NULL, hwirq); |
411 | ||
412 | if (!virq) | |
413 | panic("Cannot find virq for root domain and hwirq=%lu", hwirq); | |
2b75c0f9 | 414 | |
56957940 VG |
415 | /* Boot cpu calls request, all call enable */ |
416 | if (!cpu) { | |
417 | int rc; | |
418 | ||
34e71e4c | 419 | rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev); |
56957940 | 420 | if (rc) |
34e71e4c | 421 | panic("Percpu IRQ request failed for %u\n", virq); |
56957940 VG |
422 | } |
423 | ||
34e71e4c | 424 | enable_percpu_irq(virq, 0); |
7e512219 NC |
425 | |
426 | return 0; | |
41195d23 | 427 | } |