projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 2924cd18 RD |
1 | /* |
| 2 | * Copyright (C) 2013, 2014 Synopsys, Inc. (www.synopsys.com) | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License version 2 as | |
| 6 | * published by the Free Software Foundation. | |
| 7 | */ | |
| 8 | ||
| 9 | /* | |
| 10 | * Device tree for AXC003 CPU card: HS38x UP configuration (VDK version) | |
| 11 | */ | |
| 12 | ||
| 2e8cd938 VG |
13 | /include/ "skeleton_hs.dtsi" |
| 14 | ||
| 2924cd18 RD |
15 | / { |
| 16 | compatible = "snps,arc"; | |
| 2924cd18 RD |
17 | #address-cells = <1>; |
| 18 | #size-cells = <1>; | |
| 19 | ||
| 20 | cpu_card { | |
| 21 | compatible = "simple-bus"; | |
| 22 | #address-cells = <1>; | |
| 23 | #size-cells = <1>; | |
| 24 | ||
| 25 | ranges = <0x00000000 0xf0000000 0x10000000>; | |
| 26 | ||
| b3d6aba8 VG |
27 | core_clk: core_clk { |
| 28 | #clock-cells = <0>; | |
| 29 | compatible = "fixed-clock"; | |
| 30 | clock-frequency = <50000000>; | |
| 31 | }; | |
| 32 | ||
| 9ba7648c | 33 | core_intc: archs-intc@cpu { |
| 2924cd18 RD |
34 | compatible = "snps,archs-intc"; |
| 35 | interrupt-controller; | |
| 36 | #interrupt-cells = <1>; | |
| 37 | }; | |
| 38 | ||
| ef4c54c3 | 39 | debug_uart: dw-apb-uart@5000 { |
| 2924cd18 RD |
40 | compatible = "snps,dw-apb-uart"; |
| 41 | reg = <0x5000 0x100>; | |
| 42 | clock-frequency = <2403200>; | |
| 9ba7648c | 43 | interrupt-parent = <&core_intc>; |
| 2924cd18 RD |
44 | interrupts = <19>; |
| 45 | baud = <115200>; | |
| 46 | reg-shift = <2>; | |
| 47 | reg-io-width = <4>; | |
| 48 | }; | |
| 49 | ||
| 50 | }; | |
| 51 | ||
| ef4c54c3 | 52 | mb_intc: dw-apb-ictl@e0012000 { |
| 2924cd18 RD |
53 | #interrupt-cells = <1>; |
| 54 | compatible = "snps,dw-apb-ictl"; | |
| 55 | reg = < 0xe0012000 0x200 >; | |
| 56 | interrupt-controller; | |
| 9ba7648c | 57 | interrupt-parent = <&core_intc>; |
| 2924cd18 RD |
58 | interrupts = < 18 >; |
| 59 | }; | |
| 60 | ||
| 61 | memory { | |
| 62 | #address-cells = <1>; | |
| 63 | #size-cells = <1>; | |
| 64 | ranges = <0x00000000 0x80000000 0x40000000>; | |
| 65 | device_type = "memory"; | |
| f759ee57 | 66 | reg = <0x80000000 0x20000000>; /* 512MiB */ |
| 2924cd18 RD |
67 | }; |
| 68 | }; |