Merge remote-tracking branches 'asoc/topic/fsl-spdif', 'asoc/topic/hdmi', 'asoc/topic...
[linux-2.6-block.git] / arch / arc / boot / dts / axc003.dtsi
CommitLineData
5fa2daaa
VG
1/*
2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Device tree for AXC003 CPU card: HS38x UP configuration
11 */
12
2e8cd938
VG
13/include/ "skeleton_hs.dtsi"
14
5fa2daaa
VG
15/ {
16 compatible = "snps,arc";
5fa2daaa
VG
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 cpu_card {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 ranges = <0x00000000 0xf0000000 0x10000000>;
26
b3d6aba8
VG
27 core_clk: core_clk {
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
30 clock-frequency = <90000000>;
31 };
32
9ba7648c 33 core_intc: archs-intc@cpu {
5fa2daaa
VG
34 compatible = "snps,archs-intc";
35 interrupt-controller;
36 #interrupt-cells = <1>;
37 };
38
39 /*
40 * this GPIO block ORs all interrupts on CPU card (creg,..)
41 * to uplink only 1 IRQ to ARC core intc
42 */
43 dw-apb-gpio@0x2000 {
44 compatible = "snps,dw-apb-gpio";
45 reg = < 0x2000 0x80 >;
46 #address-cells = <1>;
47 #size-cells = <0>;
48
49 ictl_intc: gpio-controller@0 {
50 compatible = "snps,dw-apb-gpio-port";
51 gpio-controller;
52 #gpio-cells = <2>;
53 snps,nr-gpios = <30>;
54 reg = <0>;
55 interrupt-controller;
56 #interrupt-cells = <2>;
9ba7648c 57 interrupt-parent = <&core_intc>;
5fa2daaa
VG
58 interrupts = <25>;
59 };
60 };
61
62 debug_uart: dw-apb-uart@0x5000 {
63 compatible = "snps,dw-apb-uart";
64 reg = <0x5000 0x100>;
65 clock-frequency = <33333000>;
66 interrupt-parent = <&ictl_intc>;
67 interrupts = <2 4>;
68 baud = <115200>;
69 reg-shift = <2>;
70 reg-io-width = <4>;
71 };
72
73 arcpct0: pct {
74 compatible = "snps,archs-pct";
75 #interrupt-cells = <1>;
9ba7648c 76 interrupt-parent = <&core_intc>;
5fa2daaa
VG
77 interrupts = <20>;
78 };
79 };
80
81 /*
09074950
VG
82 * The DW APB ICTL intc on MB is connected to CPU intc via a
83 * DT "invisible" DW APB GPIO block, configured to simply pass thru
84 * interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c)
85 *
86 * So here we mimic a direct connection betwen them, ignoring the
87 * ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core)
88 * instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO)
5fa2daaa
VG
89 *
90 * This intc actually resides on MB, but we move it here to
91 * avoid duplicating the MB dtsi file given that IRQ from
92 * this intc to cpu intc are different for axs101 and axs103
93 */
94 mb_intc: dw-apb-ictl@0xe0012000 {
95 #interrupt-cells = <1>;
96 compatible = "snps,dw-apb-ictl";
97 reg = < 0xe0012000 0x200 >;
98 interrupt-controller;
9ba7648c 99 interrupt-parent = <&core_intc>;
5fa2daaa
VG
100 interrupts = < 24 >;
101 };
102
103 memory {
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges = <0x00000000 0x80000000 0x40000000>;
107 device_type = "memory";
f759ee57 108 reg = <0x80000000 0x20000000>; /* 512MiB */
5fa2daaa 109 };
cb2ad5e5
AB
110
111 reserved-memory {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 ranges;
115 /*
116 * Move frame buffer out of IOC aperture (0x8z-0xAz).
117 */
118 frame_buffer: frame_buffer@be000000 {
119 compatible = "shared-dma-pool";
120 reg = <0xbe000000 0x2000000>;
121 no-map;
122 };
123 };
5fa2daaa 124};