[linux-2.6-block.git] / arch / arc / boot / dts / abilis_tb101.dtsi

/*
 * Abilis Systems TB101 SOC device tree
 *
 * Copyright (C) Abilis Systems 2013
 *
 * Author: Christian Ruppert <christian.ruppert@abilis.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

/include/ "abilis_tb10x.dtsi"

/* interrupt specifiers
 * --------------------
 * 0: rising, 1: low, 2: high, 3: falling,
 */

/ {
	clock-frequency		= <500000000>;	/* 500 MHZ */

	soc100 {
		bus-frequency	= <166666666>;

		pll0: oscillator {
			clock-frequency  = <1000000000>;
		};
		cpu_clk: clkdiv_cpu {
			clock-mult = <1>;
			clock-div = <2>;
		};
		ahb_clk: clkdiv_ahb {
			clock-mult = <1>;
			clock-div = <6>;
		};

		iomux: iomux@FF10601c {
			/* Port 1 */
			pctl_tsin_s0: pctl-tsin-s0 {   /* Serial TS-in 0 */
				pingrp = "mis0_pins";
			};
			pctl_tsin_s1: pctl-tsin-s1 {   /* Serial TS-in 1 */
				pingrp = "mis1_pins";
			};
			pctl_gpio_a: pctl-gpio-a {     /* GPIO bank A */
				pingrp = "gpioa_pins";
			};
			pctl_tsin_p1: pctl-tsin-p1 {   /* Parallel TS-in 1 */
				pingrp = "mip1_pins";
			};
			/* Port 2 */
			pctl_tsin_s2: pctl-tsin-s2 {   /* Serial TS-in 2 */
				pingrp = "mis2_pins";
			};
			pctl_tsin_s3: pctl-tsin-s3 {   /* Serial TS-in 3 */
				pingrp = "mis3_pins";
			};
			pctl_gpio_c: pctl-gpio-c {     /* GPIO bank C */
				pingrp = "gpioc_pins";
			};
			pctl_tsin_p3: pctl-tsin-p3 {   /* Parallel TS-in 3 */
				pingrp = "mip3_pins";
			};
			/* Port 3 */
			pctl_tsin_s4: pctl-tsin-s4 {   /* Serial TS-in 4 */
				pingrp = "mis4_pins";
			};
			pctl_tsin_s5: pctl-tsin-s5 {   /* Serial TS-in 5 */
				pingrp = "mis5_pins";
			};
			pctl_gpio_e: pctl-gpio-e {     /* GPIO bank E */
				pingrp = "gpioe_pins";
			};
			pctl_tsin_p5: pctl-tsin-p5 {   /* Parallel TS-in 5 */
				pingrp = "mip5_pins";
			};
			/* Port 4 */
			pctl_tsin_s6: pctl-tsin-s6 {   /* Serial TS-in 6 */
				pingrp = "mis6_pins";
			};
			pctl_tsin_s7: pctl-tsin-s7 {   /* Serial TS-in 7 */
				pingrp = "mis7_pins";
			};
			pctl_gpio_g: pctl-gpio-g {     /* GPIO bank G */
				pingrp = "gpiog_pins";
			};
			pctl_tsin_p7: pctl-tsin-p7 {   /* Parallel TS-in 7 */
				pingrp = "mip7_pins";
			};
			/* Port 5 */
			pctl_gpio_j: pctl-gpio-j {     /* GPIO bank J */
				pingrp = "gpioj_pins";
			};
			pctl_gpio_k: pctl-gpio-k {     /* GPIO bank K */
				pingrp = "gpiok_pins";
			};
			pctl_ciplus: pctl-ciplus {     /* CI+ interface */
				pingrp = "ciplus_pins";
			};
			pctl_mcard: pctl-mcard {       /* M-Card interface */
				pingrp = "mcard_pins";
			};
			pctl_stc0: pctl-stc0 {         /* Smart card I/F 0 */
				pingrp = "stc0_pins";
			};
			pctl_stc1: pctl-stc1 {         /* Smart card I/F 1 */
				pingrp = "stc1_pins";
			};
			/* Port 6 */
			pctl_tsout_p: pctl-tsout-p {   /* Parallel TS-out */
				pingrp = "mop_pins";
			};
			pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
				pingrp = "mos0_pins";
			};
			pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
				pingrp = "mos1_pins";
			};
			pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
				pingrp = "mos2_pins";
			};
			pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
				pingrp = "mos3_pins";
			};
			/* Port 7 */
			pctl_uart0: pctl-uart0 {       /* UART 0 */
				pingrp = "uart0_pins";
			};
			pctl_uart1: pctl-uart1 {       /* UART 1 */
				pingrp = "uart1_pins";
			};
			pctl_gpio_l: pctl-gpio-l {     /* GPIO bank L */
				pingrp = "gpiol_pins";
			};
			pctl_gpio_m: pctl-gpio-m {     /* GPIO bank M */
				pingrp = "gpiom_pins";
			};
			/* Port 8 */
			pctl_spi3: pctl-spi3 {
				pingrp = "spi3_pins";
			};
			pctl_jtag: pctl-jtag {
				pingrp = "jtag_pins";
			};
			/* Port 9 */
			pctl_spi1: pctl-spi1 {
				pingrp = "spi1_pins";
			};
			pctl_gpio_n: pctl-gpio-n {
				pingrp = "gpion_pins";
			};
			/* Unmuxed GPIOs */
			pctl_gpio_b: pctl-gpio-b {
				pingrp = "gpiob_pins";
			};
			pctl_gpio_d: pctl-gpio-d {
				pingrp = "gpiod_pins";
			};
			pctl_gpio_f: pctl-gpio-f {
				pingrp = "gpiof_pins";
			};
			pctl_gpio_h: pctl-gpio-h {
				pingrp = "gpioh_pins";
			};
			pctl_gpio_i: pctl-gpio-i {
				pingrp = "gpioi_pins";
			};
		};

		gpioa: gpio@FF140000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF140000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <0>;
			gpio-pins = <&pctl_gpio_a>;
		};
		gpiob: gpio@FF141000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF141000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <3>;
			gpio-pins = <&pctl_gpio_b>;
		};
		gpioc: gpio@FF142000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF142000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <5>;
			gpio-pins = <&pctl_gpio_c>;
		};
		gpiod: gpio@FF143000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF143000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <8>;
			gpio-pins = <&pctl_gpio_d>;
		};
		gpioe: gpio@FF144000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF144000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <10>;
			gpio-pins = <&pctl_gpio_e>;
		};
		gpiof: gpio@FF145000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF145000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <13>;
			gpio-pins = <&pctl_gpio_f>;
		};
		gpiog: gpio@FF146000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF146000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <15>;
			gpio-pins = <&pctl_gpio_g>;
		};
		gpioh: gpio@FF147000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF147000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <18>;
			gpio-pins = <&pctl_gpio_h>;
		};
		gpioi: gpio@FF148000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF148000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <20>;
			gpio-pins = <&pctl_gpio_i>;
		};
		gpioj: gpio@FF149000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF149000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <32>;
			gpio-pins = <&pctl_gpio_j>;
		};
		gpiok: gpio@FF14a000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF14A000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <64>;
			gpio-pins = <&pctl_gpio_k>;
		};
		gpiol: gpio@FF14b000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF14B000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <86>;
			gpio-pins = <&pctl_gpio_l>;
		};
		gpiom: gpio@FF14c000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF14C000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <90>;
			gpio-pins = <&pctl_gpio_m>;
		};
		gpion: gpio@FF14d000 {
			compatible = "abilis,tb10x-gpio";
			interrupt-controller;
			#interrupt-cells = <1>;
			interrupt-parent = <&tb10x_ictl>;
			interrupts = <27 1>;
			reg = <0xFF14D000 0x1000>;
			gpio-controller;
			#gpio-cells = <1>;
			gpio-base  = <94>;
			gpio-pins = <&pctl_gpio_n>;
		};
	};
};
Commit	Line	Data
2eb9504b CR	1	/*
	2	* Abilis Systems TB101 SOC device tree
	3	*
	4	* Copyright (C) Abilis Systems 2013
	5	*
	6	* Author: Christian Ruppert <christian.ruppert@abilis.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
	22	/include/ "abilis_tb10x.dtsi"
	23
	24	/* interrupt specifiers
	25	* --------------------
	26	* 0: rising, 1: low, 2: high, 3: falling,
	27	*/
	28
	29	/ {
	30	clock-frequency = <500000000>; /* 500 MHZ */
	31
	32	soc100 {
	33	bus-frequency = <166666666>;
	34
	35	pll0: oscillator {
	36	clock-frequency = <1000000000>;
	37	};
	38	cpu_clk: clkdiv_cpu {
	39	clock-mult = <1>;
	40	clock-div = <2>;
	41	};
	42	ahb_clk: clkdiv_ahb {
	43	clock-mult = <1>;
	44	clock-div = <6>;
	45	};
	46
	47	iomux: iomux@FF10601c {
	48	/* Port 1 */
	49	pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
	50	pingrp = "mis0_pins";
	51	};
	52	pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
	53	pingrp = "mis1_pins";
	54	};
	55	pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
	56	pingrp = "gpioa_pins";
	57	};
	58	pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */
	59	pingrp = "mip1_pins";
	60	};
	61	/* Port 2 */
	62	pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */
	63	pingrp = "mis2_pins";
	64	};
65	pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */
66	pingrp = "mis3_pins";
67	};
68	pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */
69	pingrp = "gpioc_pins";
70	};
71	pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */
72	pingrp = "mip3_pins";
73	};
74	/* Port 3 */
75	pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */
76	pingrp = "mis4_pins";
77	};
78	pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */
79	pingrp = "mis5_pins";
80	};
81	pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */
82	pingrp = "gpioe_pins";
83	};
84	pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */
85	pingrp = "mip5_pins";
86	};
87	/* Port 4 */
88	pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */
89	pingrp = "mis6_pins";
90	};
91	pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */
92	pingrp = "mis7_pins";
93	};
94	pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */
95	pingrp = "gpiog_pins";
96	};
97	pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */
98	pingrp = "mip7_pins";
99	};
100	/* Port 5 */
101	pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */
102	pingrp = "gpioj_pins";
103	};
104	pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */
105	pingrp = "gpiok_pins";
106	};
107	pctl_ciplus: pctl-ciplus { /* CI+ interface */
108	pingrp = "ciplus_pins";
109	};
110	pctl_mcard: pctl-mcard { /* M-Card interface */
111	pingrp = "mcard_pins";
112	};
113	pctl_stc0: pctl-stc0 { /* Smart card I/F 0 */
114	pingrp = "stc0_pins";
115	};
116	pctl_stc1: pctl-stc1 { /* Smart card I/F 1 */
117	pingrp = "stc1_pins";
118	};
119	/* Port 6 */
120	pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */
121	pingrp = "mop_pins";
122	};
123	pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */
124	pingrp = "mos0_pins";
125	};
126	pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */
127	pingrp = "mos1_pins";
128	};
129	pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */
130	pingrp = "mos2_pins";
131	};
132	pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */
133	pingrp = "mos3_pins";
134	};
135	/* Port 7 */
136	pctl_uart0: pctl-uart0 { /* UART 0 */
137	pingrp = "uart0_pins";
138	};
139	pctl_uart1: pctl-uart1 { /* UART 1 */
140	pingrp = "uart1_pins";
141	};
142	pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */
143	pingrp = "gpiol_pins";
144	};
145	pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */
146	pingrp = "gpiom_pins";
147	};
148	/* Port 8 */
149	pctl_spi3: pctl-spi3 {
150	pingrp = "spi3_pins";
151	};
152	pctl_jtag: pctl-jtag {
153	pingrp = "jtag_pins";
154	};
155	/* Port 9 */
156	pctl_spi1: pctl-spi1 {
157	pingrp = "spi1_pins";
158	};
159	pctl_gpio_n: pctl-gpio-n {
160	pingrp = "gpion_pins";
161	};
162	/* Unmuxed GPIOs */
163	pctl_gpio_b: pctl-gpio-b {
164	pingrp = "gpiob_pins";
165	};
166	pctl_gpio_d: pctl-gpio-d {
167	pingrp = "gpiod_pins";
168	};
169	pctl_gpio_f: pctl-gpio-f {
170	pingrp = "gpiof_pins";
171	};
172	pctl_gpio_h: pctl-gpio-h {
173	pingrp = "gpioh_pins";
174	};
175	pctl_gpio_i: pctl-gpio-i {
176	pingrp = "gpioi_pins";
177	};
178	};
179
180	gpioa: gpio@FF140000 {
181	compatible = "abilis,tb10x-gpio";
182	interrupt-controller;
183	#interrupt-cells = <1>;
184	interrupt-parent = <&tb10x_ictl>;
185	interrupts = <27 1>;
186	reg = <0xFF140000 0x1000>;
187	gpio-controller;
188	#gpio-cells = <1>;
189	gpio-base = <0>;
190	gpio-pins = <&pctl_gpio_a>;
191	};
192	gpiob: gpio@FF141000 {
193	compatible = "abilis,tb10x-gpio";
194	interrupt-controller;
195	#interrupt-cells = <1>;
196	interrupt-parent = <&tb10x_ictl>;
197	interrupts = <27 1>;
198	reg = <0xFF141000 0x1000>;
199	gpio-controller;
200	#gpio-cells = <1>;
201	gpio-base = <3>;
202	gpio-pins = <&pctl_gpio_b>;
203	};
204	gpioc: gpio@FF142000 {
205	compatible = "abilis,tb10x-gpio";
206	interrupt-controller;
207	#interrupt-cells = <1>;
208	interrupt-parent = <&tb10x_ictl>;
209	interrupts = <27 1>;
210	reg = <0xFF142000 0x1000>;
211	gpio-controller;
212	#gpio-cells = <1>;
213	gpio-base = <5>;
214	gpio-pins = <&pctl_gpio_c>;
215	};
216	gpiod: gpio@FF143000 {
217	compatible = "abilis,tb10x-gpio";
218	interrupt-controller;
219	#interrupt-cells = <1>;
220	interrupt-parent = <&tb10x_ictl>;
221	interrupts = <27 1>;
222	reg = <0xFF143000 0x1000>;
223	gpio-controller;
224	#gpio-cells = <1>;
225	gpio-base = <8>;
226	gpio-pins = <&pctl_gpio_d>;
227	};
228	gpioe: gpio@FF144000 {
229	compatible = "abilis,tb10x-gpio";
230	interrupt-controller;
231	#interrupt-cells = <1>;
232	interrupt-parent = <&tb10x_ictl>;
233	interrupts = <27 1>;
234	reg = <0xFF144000 0x1000>;
235	gpio-controller;
236	#gpio-cells = <1>;
237	gpio-base = <10>;
238	gpio-pins = <&pctl_gpio_e>;
239	};
240	gpiof: gpio@FF145000 {
241	compatible = "abilis,tb10x-gpio";
242	interrupt-controller;
243	#interrupt-cells = <1>;
244	interrupt-parent = <&tb10x_ictl>;
245	interrupts = <27 1>;
246	reg = <0xFF145000 0x1000>;
247	gpio-controller;
248	#gpio-cells = <1>;
249	gpio-base = <13>;
250	gpio-pins = <&pctl_gpio_f>;
251	};
252	gpiog: gpio@FF146000 {
253	compatible = "abilis,tb10x-gpio";
254	interrupt-controller;
255	#interrupt-cells = <1>;
256	interrupt-parent = <&tb10x_ictl>;
257	interrupts = <27 1>;
258	reg = <0xFF146000 0x1000>;
259	gpio-controller;
260	#gpio-cells = <1>;
261	gpio-base = <15>;
262	gpio-pins = <&pctl_gpio_g>;
263	};
264	gpioh: gpio@FF147000 {
265	compatible = "abilis,tb10x-gpio";
266	interrupt-controller;
267	#interrupt-cells = <1>;
268	interrupt-parent = <&tb10x_ictl>;
269	interrupts = <27 1>;
270	reg = <0xFF147000 0x1000>;
271	gpio-controller;
272	#gpio-cells = <1>;
273	gpio-base = <18>;
274	gpio-pins = <&pctl_gpio_h>;
275	};
276	gpioi: gpio@FF148000 {
277	compatible = "abilis,tb10x-gpio";
278	interrupt-controller;
279	#interrupt-cells = <1>;
280	interrupt-parent = <&tb10x_ictl>;
281	interrupts = <27 1>;
282	reg = <0xFF148000 0x1000>;
283	gpio-controller;
284	#gpio-cells = <1>;
285	gpio-base = <20>;
286	gpio-pins = <&pctl_gpio_i>;
287	};
288	gpioj: gpio@FF149000 {
289	compatible = "abilis,tb10x-gpio";
290	interrupt-controller;
291	#interrupt-cells = <1>;
292	interrupt-parent = <&tb10x_ictl>;
293	interrupts = <27 1>;
294	reg = <0xFF149000 0x1000>;
295	gpio-controller;
296	#gpio-cells = <1>;
297	gpio-base = <32>;
298	gpio-pins = <&pctl_gpio_j>;
299	};
300	gpiok: gpio@FF14a000 {
301	compatible = "abilis,tb10x-gpio";
302	interrupt-controller;
303	#interrupt-cells = <1>;
304	interrupt-parent = <&tb10x_ictl>;
305	interrupts = <27 1>;
306	reg = <0xFF14A000 0x1000>;
307	gpio-controller;
308	#gpio-cells = <1>;
309	gpio-base = <64>;
310	gpio-pins = <&pctl_gpio_k>;
311	};
312	gpiol: gpio@FF14b000 {
313	compatible = "abilis,tb10x-gpio";
314	interrupt-controller;
315	#interrupt-cells = <1>;
316	interrupt-parent = <&tb10x_ictl>;
317	interrupts = <27 1>;
318	reg = <0xFF14B000 0x1000>;
319	gpio-controller;
320	#gpio-cells = <1>;
321	gpio-base = <86>;
322	gpio-pins = <&pctl_gpio_l>;
323	};
324	gpiom: gpio@FF14c000 {
325	compatible = "abilis,tb10x-gpio";
326	interrupt-controller;
327	#interrupt-cells = <1>;
328	interrupt-parent = <&tb10x_ictl>;
329	interrupts = <27 1>;
330	reg = <0xFF14C000 0x1000>;
331	gpio-controller;
332	#gpio-cells = <1>;
333	gpio-base = <90>;
334	gpio-pins = <&pctl_gpio_m>;
335	};
336	gpion: gpio@FF14d000 {
337	compatible = "abilis,tb10x-gpio";
338	interrupt-controller;
339	#interrupt-cells = <1>;
340	interrupt-parent = <&tb10x_ictl>;
341	interrupts = <27 1>;
342	reg = <0xFF14D000 0x1000>;
343	gpio-controller;
344	#gpio-cells = <1>;
345	gpio-base = <94>;
346	gpio-pins = <&pctl_gpio_n>;
347	};
348	};
349	};