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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
2a440168 | 11 | select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC |
f06d19e4 | 12 | select BUILDTIME_EXTABLE_SORT |
d7f8a085 | 13 | select COMMON_CLK |
4adeefe1 | 14 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
15 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
16 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
17 | select GENERIC_ATOMIC64 | |
18 | select GENERIC_CLOCKEVENTS | |
19 | select GENERIC_FIND_FIRST_BIT | |
20 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
21 | select GENERIC_IRQ_SHOW | |
22 | select GENERIC_PENDING_IRQ if SMP | |
23 | select GENERIC_SMP_IDLE_THREAD | |
f46121bd | 24 | select HAVE_ARCH_KGDB |
547f1125 | 25 | select HAVE_ARCH_TRACEHOOK |
5e057429 | 26 | select HAVE_FUTEX_CMPXCHG |
4368902b | 27 | select HAVE_IOREMAP_PROT |
4d86dfbb VG |
28 | select HAVE_KPROBES |
29 | select HAVE_KRETPROBES | |
c121c506 | 30 | select HAVE_MEMBLOCK |
854a0d95 | 31 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 32 | select HAVE_OPROFILE |
9c57564e | 33 | select HAVE_PERF_EVENTS |
999159a5 | 34 | select IRQ_DOMAIN |
cfdbc2e1 | 35 | select MODULES_USE_ELF_RELA |
c121c506 | 36 | select NO_BOOTMEM |
999159a5 VG |
37 | select OF |
38 | select OF_EARLY_FLATTREE | |
9c57564e | 39 | select PERF_USE_VMALLOC |
d1a1dc0b | 40 | select HAVE_DEBUG_STACKOVERFLOW |
cfdbc2e1 | 41 | |
0dafafc3 VG |
42 | config TRACE_IRQFLAGS_SUPPORT |
43 | def_bool y | |
44 | ||
45 | config LOCKDEP_SUPPORT | |
46 | def_bool y | |
47 | ||
cfdbc2e1 VG |
48 | config SCHED_OMIT_FRAME_POINTER |
49 | def_bool y | |
50 | ||
51 | config GENERIC_CSUM | |
52 | def_bool y | |
53 | ||
54 | config RWSEM_GENERIC_SPINLOCK | |
55 | def_bool y | |
56 | ||
57 | config ARCH_FLATMEM_ENABLE | |
58 | def_bool y | |
59 | ||
60 | config MMU | |
61 | def_bool y | |
62 | ||
ce816fa8 | 63 | config NO_IOPORT_MAP |
cfdbc2e1 VG |
64 | def_bool y |
65 | ||
66 | config GENERIC_CALIBRATE_DELAY | |
67 | def_bool y | |
68 | ||
69 | config GENERIC_HWEIGHT | |
70 | def_bool y | |
71 | ||
44c8bb91 VG |
72 | config STACKTRACE_SUPPORT |
73 | def_bool y | |
74 | select STACKTRACE | |
75 | ||
cfdbc2e1 VG |
76 | config HAVE_LATENCYTOP_SUPPORT |
77 | def_bool y | |
78 | ||
cfdbc2e1 VG |
79 | source "init/Kconfig" |
80 | source "kernel/Kconfig.freezer" | |
81 | ||
82 | menu "ARC Architecture Configuration" | |
83 | ||
93ad700d | 84 | menu "ARC Platform/SoC/Board" |
cfdbc2e1 | 85 | |
fd155792 | 86 | source "arch/arc/plat-sim/Kconfig" |
072eb693 | 87 | source "arch/arc/plat-tb10x/Kconfig" |
556cc1c5 | 88 | source "arch/arc/plat-axs10x/Kconfig" |
cfdbc2e1 | 89 | #New platform adds here |
93ad700d | 90 | |
53d98958 | 91 | endmenu |
cfdbc2e1 | 92 | |
1f6ccfff VG |
93 | choice |
94 | prompt "ARC Instruction Set" | |
95 | default ISA_ARCOMPACT | |
96 | ||
97 | config ISA_ARCOMPACT | |
98 | bool "ARCompact ISA" | |
99 | help | |
100 | The original ARC ISA of ARC600/700 cores | |
101 | ||
65bfbcdf VG |
102 | config ISA_ARCV2 |
103 | bool "ARC ISA v2" | |
104 | help | |
105 | ISA for the Next Generation ARC-HS cores | |
1f6ccfff VG |
106 | |
107 | endchoice | |
108 | ||
cfdbc2e1 VG |
109 | menu "ARC CPU Configuration" |
110 | ||
111 | choice | |
112 | prompt "ARC Core" | |
1f6ccfff VG |
113 | default ARC_CPU_770 if ISA_ARCOMPACT |
114 | default ARC_CPU_HS if ISA_ARCV2 | |
115 | ||
116 | if ISA_ARCOMPACT | |
cfdbc2e1 VG |
117 | |
118 | config ARC_CPU_750D | |
119 | bool "ARC750D" | |
14a0abfc | 120 | select ARC_CANT_LLSC |
cfdbc2e1 VG |
121 | help |
122 | Support for ARC750 core | |
123 | ||
124 | config ARC_CPU_770 | |
125 | bool "ARC770" | |
742f8af6 | 126 | select ARC_HAS_SWAPE |
cfdbc2e1 VG |
127 | help |
128 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
129 | This core has a bunch of cool new features: | |
130 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
131 | Shared Address Spaces (for sharing TLB entires in MMU) | |
132 | -Caches: New Prog Model, Region Flush | |
133 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
134 | ||
1f6ccfff VG |
135 | endif #ISA_ARCOMPACT |
136 | ||
137 | config ARC_CPU_HS | |
138 | bool "ARC-HS" | |
139 | depends on ISA_ARCV2 | |
140 | help | |
141 | Support for ARC HS38x Cores based on ARCv2 ISA | |
142 | The notable features are: | |
143 | - SMP configurations of upto 4 core with coherency | |
144 | - Optional L2 Cache and IO-Coherency | |
145 | - Revised Interrupt Architecture (multiple priorites, reg banks, | |
146 | auto stack switch, auto regfile save/restore) | |
147 | - MMUv4 (PIPT dcache, Huge Pages) | |
148 | - Instructions for | |
149 | * 64bit load/store: LDD, STD | |
150 | * Hardware assisted divide/remainder: DIV, REM | |
151 | * Function prologue/epilogue: ENTER_S, LEAVE_S | |
152 | * IRQ enable/disable: CLRI, SETI | |
153 | * pop count: FFS, FLS | |
154 | * SETcc, BMSKN, XBFU... | |
155 | ||
cfdbc2e1 VG |
156 | endchoice |
157 | ||
158 | config CPU_BIG_ENDIAN | |
159 | bool "Enable Big Endian Mode" | |
160 | default n | |
161 | help | |
162 | Build kernel for Big Endian Mode of ARC CPU | |
163 | ||
41195d23 | 164 | config SMP |
82fea5a1 | 165 | bool "Symmetric Multi-Processing" |
41195d23 | 166 | default n |
82fea5a1 VG |
167 | select ARC_HAS_COH_CACHES if ISA_ARCV2 |
168 | select ARC_MCIP if ISA_ARCV2 | |
41195d23 | 169 | help |
82fea5a1 | 170 | This enables support for systems with more than one CPU. |
41195d23 VG |
171 | |
172 | if SMP | |
173 | ||
174 | config ARC_HAS_COH_CACHES | |
175 | def_bool n | |
176 | ||
41195d23 VG |
177 | config ARC_HAS_REENTRANT_IRQ_LV2 |
178 | def_bool n | |
179 | ||
82fea5a1 VG |
180 | config ARC_MCIP |
181 | bool "ARConnect Multicore IP (MCIP) Support " | |
182 | depends on ISA_ARCV2 | |
183 | help | |
184 | This IP block enables SMP in ARC-HS38 cores. | |
185 | It provides for cross-core interrupts, multi-core debug | |
186 | hardware semaphores, shared memory,.... | |
41195d23 VG |
187 | |
188 | config NR_CPUS | |
3aa4f80e NC |
189 | int "Maximum number of CPUs (2-4096)" |
190 | range 2 4096 | |
82fea5a1 VG |
191 | default "4" |
192 | ||
193 | endif #SMP | |
41195d23 | 194 | |
cfdbc2e1 VG |
195 | menuconfig ARC_CACHE |
196 | bool "Enable Cache Support" | |
197 | default y | |
41195d23 VG |
198 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
199 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
200 | |
201 | if ARC_CACHE | |
202 | ||
203 | config ARC_CACHE_LINE_SHIFT | |
204 | int "Cache Line Length (as power of 2)" | |
205 | range 5 7 | |
206 | default "6" | |
207 | help | |
208 | Starting with ARC700 4.9, Cache line length is configurable, | |
209 | This option specifies "N", with Line-len = 2 power N | |
210 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
211 | Linux only supports same line lengths for I and D caches. | |
212 | ||
213 | config ARC_HAS_ICACHE | |
214 | bool "Use Instruction Cache" | |
215 | default y | |
216 | ||
217 | config ARC_HAS_DCACHE | |
218 | bool "Use Data Cache" | |
219 | default y | |
220 | ||
221 | config ARC_CACHE_PAGES | |
222 | bool "Per Page Cache Control" | |
223 | default y | |
224 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
225 | help | |
226 | This can be used to over-ride the global I/D Cache Enable on a | |
227 | per-page basis (but only for pages accessed via MMU such as | |
228 | Kernel Virtual address or User Virtual Address) | |
229 | TLB entries have a per-page Cache Enable Bit. | |
230 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
231 | Global DISABLE + Per Page ENABLE won't work | |
232 | ||
4102b533 VG |
233 | config ARC_CACHE_VIPT_ALIASING |
234 | bool "Support VIPT Aliasing D$" | |
d1f317d8 | 235 | depends on ARC_HAS_DCACHE && ISA_ARCOMPACT |
4102b533 VG |
236 | default n |
237 | ||
cfdbc2e1 VG |
238 | endif #ARC_CACHE |
239 | ||
8b5850f8 VG |
240 | config ARC_HAS_ICCM |
241 | bool "Use ICCM" | |
242 | help | |
243 | Single Cycle RAMS to store Fast Path Code | |
244 | default n | |
245 | ||
246 | config ARC_ICCM_SZ | |
247 | int "ICCM Size in KB" | |
248 | default "64" | |
249 | depends on ARC_HAS_ICCM | |
250 | ||
251 | config ARC_HAS_DCCM | |
252 | bool "Use DCCM" | |
253 | help | |
254 | Single Cycle RAMS to store Fast Path Data | |
255 | default n | |
256 | ||
257 | config ARC_DCCM_SZ | |
258 | int "DCCM Size in KB" | |
259 | default "64" | |
260 | depends on ARC_HAS_DCCM | |
261 | ||
262 | config ARC_DCCM_BASE | |
263 | hex "DCCM map address" | |
264 | default "0xA0000000" | |
265 | depends on ARC_HAS_DCCM | |
266 | ||
cfdbc2e1 VG |
267 | config ARC_HAS_HW_MPY |
268 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
269 | default y | |
270 | help | |
271 | Influences how gcc generates code for MPY operations. | |
272 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
273 | Multipler. Otherwise software multipy lib is used | |
274 | ||
275 | choice | |
1f6ccfff | 276 | prompt "MMU Version" |
cfdbc2e1 VG |
277 | default ARC_MMU_V3 if ARC_CPU_770 |
278 | default ARC_MMU_V2 if ARC_CPU_750D | |
d7a512bf | 279 | default ARC_MMU_V4 if ARC_CPU_HS |
cfdbc2e1 VG |
280 | |
281 | config ARC_MMU_V1 | |
282 | bool "MMU v1" | |
283 | help | |
284 | Orig ARC700 MMU | |
285 | ||
286 | config ARC_MMU_V2 | |
287 | bool "MMU v2" | |
288 | help | |
289 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
290 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
291 | ||
292 | config ARC_MMU_V3 | |
293 | bool "MMU v3" | |
294 | depends on ARC_CPU_770 | |
295 | help | |
296 | Introduced with ARC700 4.10: New Features | |
297 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
298 | Shared Address Spaces (SASID) | |
299 | ||
d7a512bf VG |
300 | config ARC_MMU_V4 |
301 | bool "MMU v4" | |
302 | depends on ISA_ARCV2 | |
303 | ||
cfdbc2e1 VG |
304 | endchoice |
305 | ||
306 | ||
307 | choice | |
308 | prompt "MMU Page Size" | |
309 | default ARC_PAGE_SIZE_8K | |
310 | ||
311 | config ARC_PAGE_SIZE_8K | |
312 | bool "8KB" | |
313 | help | |
314 | Choose between 8k vs 16k | |
315 | ||
316 | config ARC_PAGE_SIZE_16K | |
317 | bool "16KB" | |
450ed0db | 318 | depends on ARC_MMU_V3 || ARC_MMU_V4 |
cfdbc2e1 VG |
319 | |
320 | config ARC_PAGE_SIZE_4K | |
321 | bool "4KB" | |
450ed0db | 322 | depends on ARC_MMU_V3 || ARC_MMU_V4 |
cfdbc2e1 VG |
323 | |
324 | endchoice | |
325 | ||
1f6ccfff VG |
326 | if ISA_ARCOMPACT |
327 | ||
4788a594 VG |
328 | config ARC_COMPACT_IRQ_LEVELS |
329 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
330 | default n | |
331 | # Timer HAS to be high priority, for any other high priority config | |
332 | select ARC_IRQ3_LV2 | |
41195d23 VG |
333 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
334 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
335 | |
336 | if ARC_COMPACT_IRQ_LEVELS | |
337 | ||
338 | config ARC_IRQ3_LV2 | |
339 | bool | |
340 | ||
341 | config ARC_IRQ5_LV2 | |
342 | bool | |
343 | ||
344 | config ARC_IRQ6_LV2 | |
345 | bool | |
346 | ||
1f6ccfff | 347 | endif #ARC_COMPACT_IRQ_LEVELS |
4788a594 | 348 | |
cfdbc2e1 VG |
349 | config ARC_FPU_SAVE_RESTORE |
350 | bool "Enable FPU state persistence across context switch" | |
351 | default n | |
352 | help | |
353 | Double Precision Floating Point unit had dedictaed regs which | |
354 | need to be saved/restored across context-switch. | |
355 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
356 | hardware pieces to allow software to conditionally save/restore, | |
357 | based on actual usage of FPU by a task. Thus our implemn does | |
358 | this for all tasks in system. | |
359 | ||
1f6ccfff VG |
360 | endif #ISA_ARCOMPACT |
361 | ||
fbf8e13d VG |
362 | config ARC_CANT_LLSC |
363 | def_bool n | |
364 | ||
cfdbc2e1 VG |
365 | config ARC_HAS_LLSC |
366 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
367 | default y | |
14a0abfc | 368 | depends on !ARC_CANT_LLSC |
cfdbc2e1 | 369 | |
e78fdfef VG |
370 | config ARC_STAR_9000923308 |
371 | bool "Workaround for llock/scond livelock" | |
372 | default y | |
373 | depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC | |
374 | ||
cfdbc2e1 VG |
375 | config ARC_HAS_SWAPE |
376 | bool "Insn: SWAPE (endian-swap)" | |
377 | default y | |
cfdbc2e1 | 378 | |
1f6ccfff VG |
379 | if ISA_ARCV2 |
380 | ||
381 | config ARC_HAS_LL64 | |
382 | bool "Insn: 64bit LDD/STD" | |
383 | help | |
384 | Enable gcc to generate 64-bit load/store instructions | |
385 | ISA mandates even/odd registers to allow encoding of two | |
386 | dest operands with 2 possible source operands. | |
387 | default y | |
388 | ||
d05a76ab AB |
389 | config ARC_HAS_DIV_REM |
390 | bool "Insn: div, divu, rem, remu" | |
391 | default y | |
392 | ||
aa93e8ef VG |
393 | config ARC_HAS_RTC |
394 | bool "Local 64-bit r/o cycle counter" | |
395 | default n | |
396 | depends on !SMP | |
397 | ||
72d72880 VG |
398 | config ARC_HAS_GRTC |
399 | bool "SMP synchronized 64-bit cycle counter" | |
400 | default y | |
401 | depends on SMP | |
402 | ||
1f6ccfff VG |
403 | config ARC_NUMBER_OF_INTERRUPTS |
404 | int "Number of interrupts" | |
405 | range 8 240 | |
406 | default 32 | |
407 | help | |
408 | This defines the number of interrupts on the ARCv2HS core. | |
409 | It affects the size of vector table. | |
410 | The initial 8 IRQs are fixed (Timer, ICI etc) and although configurable | |
411 | in hardware, it keep things simple for Linux to assume they are always | |
412 | present. | |
413 | ||
414 | endif # ISA_ARCV2 | |
415 | ||
cfdbc2e1 VG |
416 | endmenu # "ARC CPU Configuration" |
417 | ||
cfdbc2e1 VG |
418 | config LINUX_LINK_BASE |
419 | hex "Linux Link Address" | |
420 | default "0x80000000" | |
421 | help | |
422 | ARC700 divides the 32 bit phy address space into two equal halves | |
423 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
424 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
425 | Typically Linux kernel is linked at the start of untransalted addr, | |
426 | hence the default value of 0x8zs. | |
427 | However some customers have peripherals mapped at this addr, so | |
428 | Linux needs to be scooted a bit. | |
429 | If you don't know what the above means, leave this setting alone. | |
430 | ||
080c3747 VG |
431 | config ARC_CURR_IN_REG |
432 | bool "Dedicate Register r25 for current_task pointer" | |
433 | default y | |
434 | help | |
435 | This reserved Register R25 to point to Current Task in | |
436 | kernel mode. This saves memory access for each such access | |
437 | ||
2e651ea1 | 438 | |
1736a56f | 439 | config ARC_EMUL_UNALIGNED |
2e651ea1 | 440 | bool "Emulate unaligned memory access (userspace only)" |
1f6ccfff | 441 | default N |
2e651ea1 VG |
442 | select SYSCTL_ARCH_UNALIGN_NO_WARN |
443 | select SYSCTL_ARCH_UNALIGN_ALLOW | |
1f6ccfff | 444 | depends on ISA_ARCOMPACT |
2e651ea1 VG |
445 | help |
446 | This enables misaligned 16 & 32 bit memory access from user space. | |
447 | Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide | |
448 | potential bugs in code | |
449 | ||
cfdbc2e1 VG |
450 | config HZ |
451 | int "Timer Frequency" | |
452 | default 100 | |
453 | ||
cbe056f7 VG |
454 | config ARC_METAWARE_HLINK |
455 | bool "Support for Metaware debugger assisted Host access" | |
456 | default n | |
457 | help | |
458 | This options allows a Linux userland apps to directly access | |
459 | host file system (open/creat/read/write etc) with help from | |
460 | Metaware Debugger. This can come in handy for Linux-host communication | |
461 | when there is no real usable peripheral such as EMAC. | |
462 | ||
cfdbc2e1 VG |
463 | menuconfig ARC_DBG |
464 | bool "ARC debugging" | |
465 | default y | |
466 | ||
aa6083ed VG |
467 | if ARC_DBG |
468 | ||
854a0d95 VG |
469 | config ARC_DW2_UNWIND |
470 | bool "Enable DWARF specific kernel stack unwind" | |
854a0d95 VG |
471 | default y |
472 | select KALLSYMS | |
473 | help | |
474 | Compiles the kernel with DWARF unwind information and can be used | |
475 | to get stack backtraces. | |
476 | ||
477 | If you say Y here the resulting kernel image will be slightly larger | |
478 | but not slower, and it will give very useful debugging information. | |
479 | If you don't debug the kernel, you can say N, but we may not be able | |
480 | to solve problems without frame unwind information | |
481 | ||
cfdbc2e1 VG |
482 | config ARC_DBG_TLB_PARANOIA |
483 | bool "Paranoia Checks in Low Level TLB Handlers" | |
cfdbc2e1 VG |
484 | default n |
485 | ||
486 | config ARC_DBG_TLB_MISS_COUNT | |
487 | bool "Profile TLB Misses" | |
488 | default n | |
489 | select DEBUG_FS | |
cfdbc2e1 VG |
490 | help |
491 | Counts number of I and D TLB Misses and exports them via Debugfs | |
492 | The counters can be cleared via Debugfs as well | |
493 | ||
aa6083ed VG |
494 | if SMP |
495 | ||
496 | config ARC_IPI_DBG | |
497 | bool "Debug Inter Core interrupts" | |
498 | default n | |
499 | ||
500 | endif | |
501 | ||
502 | endif | |
503 | ||
036b2c56 VG |
504 | config ARC_UBOOT_SUPPORT |
505 | bool "Support uboot arg Handling" | |
506 | default n | |
507 | help | |
508 | ARC Linux by default checks for uboot provided args as pointers to | |
509 | external cmdline or DTB. This however breaks in absence of uboot, | |
510 | when booting from Metaware debugger directly, as the registers are | |
511 | not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus | |
512 | registers look like uboot args to kernel which then chokes. | |
513 | So only enable the uboot arg checking/processing if users are sure | |
514 | of uboot being in play. | |
515 | ||
999159a5 VG |
516 | config ARC_BUILTIN_DTB_NAME |
517 | string "Built in DTB" | |
518 | help | |
519 | Set the name of the DTB to embed in the vmlinux binary | |
520 | Leaving it blank selects the minimal "skeleton" dtb | |
521 | ||
cfdbc2e1 VG |
522 | source "kernel/Kconfig.preempt" |
523 | ||
5628832f VG |
524 | menu "Executable file formats" |
525 | source "fs/Kconfig.binfmt" | |
526 | endmenu | |
527 | ||
cfdbc2e1 VG |
528 | endmenu # "ARC Architecture Configuration" |
529 | ||
530 | source "mm/Kconfig" | |
531 | source "net/Kconfig" | |
532 | source "drivers/Kconfig" | |
533 | source "fs/Kconfig" | |
534 | source "arch/arc/Kconfig.debug" | |
535 | source "security/Kconfig" | |
536 | source "crypto/Kconfig" | |
537 | source "lib/Kconfig" | |
996bad6c | 538 | source "kernel/power/Kconfig" |