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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | /* |
3 | * arch/alpha/lib/ev67-strlen.S | |
4 | * 21264 version by Rick Gorton <rick.gorton@alpha-processor.com> | |
5 | * | |
6 | * Finds length of a 0-terminated string. Optimized for the | |
7 | * Alpha architecture: | |
8 | * | |
9 | * - memory accessed as aligned quadwords only | |
10 | * - uses bcmpge to compare 8 bytes in parallel | |
11 | * | |
12 | * Much of the information about 21264 scheduling/coding comes from: | |
13 | * Compiler Writer's Guide for the Alpha 21264 | |
14 | * abbreviated as 'CWG' in other comments here | |
15 | * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html | |
16 | * Scheduling notation: | |
17 | * E - either cluster | |
18 | * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1 | |
19 | * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1 | |
20 | */ | |
00fc0e0d | 21 | #include <asm/export.h> |
1da177e4 LT |
22 | .set noreorder |
23 | .set noat | |
24 | ||
25 | .globl strlen | |
26 | .ent strlen | |
27 | .align 4 | |
28 | strlen: | |
29 | ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned) | |
30 | lda $2, -1($31) # E : | |
31 | insqh $2, $16, $2 # U : | |
32 | andnot $16, 7, $0 # E : | |
33 | ||
34 | or $2, $1, $1 # E : | |
35 | cmpbge $31, $1, $2 # E : $2 <- bitmask: bit i == 1 <==> i-th byte == 0 | |
36 | nop # E : | |
37 | bne $2, $found # U : | |
38 | ||
39 | $loop: ldq $1, 8($0) # L : | |
40 | addq $0, 8, $0 # E : addr += 8 | |
41 | cmpbge $31, $1, $2 # E : | |
42 | beq $2, $loop # U : | |
43 | ||
44 | $found: | |
45 | cttz $2, $3 # U0 : | |
46 | addq $0, $3, $0 # E : | |
47 | subq $0, $16, $0 # E : | |
48 | ret $31, ($26) # L0 : | |
49 | ||
50 | .end strlen | |
00fc0e0d | 51 | EXPORT_SYMBOL(strlen) |