mm: remove include/linux/bootmem.h
[linux-2.6-block.git] / arch / alpha / kernel / setup.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4
LT
2/*
3 * linux/arch/alpha/kernel/setup.c
4 *
5 * Copyright (C) 1995 Linus Torvalds
6 */
7
8/* 2.3.x bootmem, 1999 Andrea Arcangeli <andrea@suse.de> */
9
10/*
11 * Bootup setup stuff.
12 */
13
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
19#include <linux/ptrace.h>
20#include <linux/slab.h>
21#include <linux/user.h>
894673ee 22#include <linux/screen_info.h>
1da177e4 23#include <linux/delay.h>
1da177e4
LT
24#include <linux/mc146818rtc.h>
25#include <linux/console.h>
917b1f78 26#include <linux/cpu.h>
1da177e4
LT
27#include <linux/errno.h>
28#include <linux/init.h>
29#include <linux/string.h>
30#include <linux/ioport.h>
e5c6c8e4 31#include <linux/platform_device.h>
6471f52a 32#include <linux/memblock.h>
1da177e4
LT
33#include <linux/pci.h>
34#include <linux/seq_file.h>
35#include <linux/root_dev.h>
36#include <linux/initrd.h>
37#include <linux/eisa.h>
22a9835c 38#include <linux/pfn.h>
1da177e4
LT
39#ifdef CONFIG_MAGIC_SYSRQ
40#include <linux/sysrq.h>
41#include <linux/reboot.h>
42#endif
43#include <linux/notifier.h>
44#include <asm/setup.h>
45#include <asm/io.h>
74fd1b68 46#include <linux/log2.h>
00cd1176 47#include <linux/export.h>
1da177e4 48
e041c683 49extern struct atomic_notifier_head panic_notifier_list;
1da177e4
LT
50static int alpha_panic_event(struct notifier_block *, unsigned long, void *);
51static struct notifier_block alpha_panic_block = {
52 alpha_panic_event,
53 NULL,
54 INT_MAX /* try to do it first */
55};
56
7c0f6ba6 57#include <linux/uaccess.h>
1da177e4 58#include <asm/pgtable.h>
1da177e4
LT
59#include <asm/hwrpb.h>
60#include <asm/dma.h>
1da177e4
LT
61#include <asm/mmu_context.h>
62#include <asm/console.h>
63
64#include "proto.h"
65#include "pci_impl.h"
66
67
68struct hwrpb_struct *hwrpb;
cff52daf 69EXPORT_SYMBOL(hwrpb);
1da177e4
LT
70unsigned long srm_hae;
71
72int alpha_l1i_cacheshape;
73int alpha_l1d_cacheshape;
74int alpha_l2_cacheshape;
75int alpha_l3_cacheshape;
76
77#ifdef CONFIG_VERBOSE_MCHECK
78/* 0=minimum, 1=verbose, 2=all */
79/* These can be overridden via the command line, ie "verbose_mcheck=2") */
80unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON;
81#endif
82
2258a5bb
RR
83#ifdef CONFIG_NUMA
84struct cpumask node_to_cpumask_map[MAX_NUMNODES] __read_mostly;
85EXPORT_SYMBOL(node_to_cpumask_map);
86#endif
87
1da177e4
LT
88/* Which processor we booted from. */
89int boot_cpuid;
90
91/*
92 * Using SRM callbacks for initial console output. This works from
93 * setup_arch() time through the end of time_init(), as those places
94 * are under our (Alpha) control.
95
96 * "srmcons" specified in the boot command arguments allows us to
97 * see kernel messages during the period of time before the true
98 * console device is "registered" during console_init().
99 * As of this version (2.5.59), console_init() will call
100 * disable_early_printk() as the last action before initializing
101 * the console drivers. That's the last possible time srmcons can be
102 * unregistered without interfering with console behavior.
103 *
104 * By default, OFF; set it with a bootcommand arg of "srmcons" or
105 * "console=srm". The meaning of these two args is:
106 * "srmcons" - early callback prints
107 * "console=srm" - full callback based console, including early prints
108 */
109int srmcons_output = 0;
110
111/* Enforce a memory size limit; useful for testing. By default, none. */
112unsigned long mem_size_limit = 0;
113
114/* Set AGP GART window size (0 means disabled). */
115unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE;
116
117#ifdef CONFIG_ALPHA_GENERIC
118struct alpha_machine_vector alpha_mv;
00fc0e0d 119EXPORT_SYMBOL(alpha_mv);
994dcf70
RH
120#endif
121
122#ifndef alpha_using_srm
1da177e4 123int alpha_using_srm;
cff52daf 124EXPORT_SYMBOL(alpha_using_srm);
1da177e4
LT
125#endif
126
994dcf70
RH
127#ifndef alpha_using_qemu
128int alpha_using_qemu;
129#endif
130
1da177e4
LT
131static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long,
132 unsigned long);
133static struct alpha_machine_vector *get_sysvec_byname(const char *);
134static void get_sysnames(unsigned long, unsigned long, unsigned long,
135 char **, char **);
136static void determine_cpu_caches (unsigned int);
137
3c253ca0 138static char __initdata command_line[COMMAND_LINE_SIZE];
1da177e4
LT
139
140/*
141 * The format of "screen_info" is strange, and due to early
142 * i386-setup code. This is just enough to make the console
143 * code think we're on a VGA color display.
144 */
145
146struct screen_info screen_info = {
147 .orig_x = 0,
148 .orig_y = 25,
149 .orig_video_cols = 80,
150 .orig_video_lines = 25,
151 .orig_video_isVGA = 1,
152 .orig_video_points = 16
153};
154
cff52daf
AV
155EXPORT_SYMBOL(screen_info);
156
1da177e4
LT
157/*
158 * The direct map I/O window, if any. This should be the same
159 * for all busses, since it's used by virt_to_bus.
160 */
161
162unsigned long __direct_map_base;
163unsigned long __direct_map_size;
cff52daf
AV
164EXPORT_SYMBOL(__direct_map_base);
165EXPORT_SYMBOL(__direct_map_size);
1da177e4
LT
166
167/*
168 * Declare all of the machine vectors.
169 */
170
171/* GCC 2.7.2 (on alpha at least) is lame. It does not support either
172 __attribute__((weak)) or #pragma weak. Bypass it and talk directly
173 to the assembler. */
174
175#define WEAK(X) \
176 extern struct alpha_machine_vector X; \
177 asm(".weak "#X)
178
179WEAK(alcor_mv);
180WEAK(alphabook1_mv);
181WEAK(avanti_mv);
182WEAK(cabriolet_mv);
183WEAK(clipper_mv);
184WEAK(dp264_mv);
185WEAK(eb164_mv);
186WEAK(eb64p_mv);
187WEAK(eb66_mv);
188WEAK(eb66p_mv);
189WEAK(eiger_mv);
190WEAK(jensen_mv);
191WEAK(lx164_mv);
192WEAK(lynx_mv);
193WEAK(marvel_ev7_mv);
194WEAK(miata_mv);
195WEAK(mikasa_mv);
196WEAK(mikasa_primo_mv);
197WEAK(monet_mv);
198WEAK(nautilus_mv);
199WEAK(noname_mv);
200WEAK(noritake_mv);
201WEAK(noritake_primo_mv);
202WEAK(p2k_mv);
203WEAK(pc164_mv);
204WEAK(privateer_mv);
205WEAK(rawhide_mv);
206WEAK(ruffian_mv);
207WEAK(rx164_mv);
208WEAK(sable_mv);
209WEAK(sable_gamma_mv);
210WEAK(shark_mv);
211WEAK(sx164_mv);
212WEAK(takara_mv);
213WEAK(titan_mv);
214WEAK(webbrick_mv);
215WEAK(wildfire_mv);
216WEAK(xl_mv);
217WEAK(xlt_mv);
218
219#undef WEAK
220
221/*
222 * I/O resources inherited from PeeCees. Except for perhaps the
223 * turbochannel alphas, everyone has these on some sort of SuperIO chip.
224 *
225 * ??? If this becomes less standard, move the struct out into the
226 * machine vector.
227 */
228
229static void __init
230reserve_std_resources(void)
231{
232 static struct resource standard_io_resources[] = {
233 { .name = "rtc", .start = -1, .end = -1 },
234 { .name = "dma1", .start = 0x00, .end = 0x1f },
235 { .name = "pic1", .start = 0x20, .end = 0x3f },
236 { .name = "timer", .start = 0x40, .end = 0x5f },
237 { .name = "keyboard", .start = 0x60, .end = 0x6f },
238 { .name = "dma page reg", .start = 0x80, .end = 0x8f },
239 { .name = "pic2", .start = 0xa0, .end = 0xbf },
240 { .name = "dma2", .start = 0xc0, .end = 0xdf },
241 };
242
243 struct resource *io = &ioport_resource;
244 size_t i;
245
246 if (hose_head) {
247 struct pci_controller *hose;
248 for (hose = hose_head; hose; hose = hose->next)
249 if (hose->index == 0) {
250 io = hose->io_space;
251 break;
252 }
253 }
254
255 /* Fix up for the Jensen's queer RTC placement. */
256 standard_io_resources[0].start = RTC_PORT(0);
257 standard_io_resources[0].end = RTC_PORT(0) + 0x10;
258
25c8716c 259 for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i)
1da177e4
LT
260 request_resource(io, standard_io_resources+i);
261}
262
1da177e4 263#define PFN_MAX PFN_DOWN(0x80000000)
fb26b3e6
RK
264#define for_each_mem_cluster(memdesc, _cluster, i) \
265 for ((_cluster) = (memdesc)->cluster, (i) = 0; \
266 (i) < (memdesc)->numclusters; (i)++, (_cluster)++)
1da177e4
LT
267
268static unsigned long __init
269get_mem_size_limit(char *s)
270{
271 unsigned long end = 0;
272 char *from = s;
273
274 end = simple_strtoul(from, &from, 0);
275 if ( *from == 'K' || *from == 'k' ) {
276 end = end << 10;
277 from++;
278 } else if ( *from == 'M' || *from == 'm' ) {
279 end = end << 20;
280 from++;
281 } else if ( *from == 'G' || *from == 'g' ) {
282 end = end << 30;
283 from++;
284 }
285 return end >> PAGE_SHIFT; /* Return the PFN of the limit. */
286}
287
288#ifdef CONFIG_BLK_DEV_INITRD
289void * __init
290move_initrd(unsigned long mem_limit)
291{
292 void *start;
293 unsigned long size;
294
295 size = initrd_end - initrd_start;
4fc4a09e 296 start = memblock_alloc_from(PAGE_ALIGN(size), PAGE_SIZE, 0);
1da177e4
LT
297 if (!start || __pa(start) + size > mem_limit) {
298 initrd_start = initrd_end = 0;
299 return NULL;
300 }
301 memmove(start, (void *)initrd_start, size);
302 initrd_start = (unsigned long)start;
303 initrd_end = initrd_start + size;
304 printk("initrd moved to %p\n", start);
305 return start;
306}
307#endif
308
309#ifndef CONFIG_DISCONTIGMEM
310static void __init
311setup_memory(void *kernel_end)
312{
313 struct memclust_struct * cluster;
314 struct memdesc_struct * memdesc;
6471f52a 315 unsigned long kernel_size;
1da177e4
LT
316 unsigned long i;
317
318 /* Find free clusters, and init and free the bootmem accordingly. */
319 memdesc = (struct memdesc_struct *)
320 (hwrpb->mddt_offset + (unsigned long) hwrpb);
321
322 for_each_mem_cluster(memdesc, cluster, i) {
6471f52a
MR
323 unsigned long end;
324
1da177e4
LT
325 printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n",
326 i, cluster->usage, cluster->start_pfn,
327 cluster->start_pfn + cluster->numpages);
328
329 /* Bit 0 is console/PALcode reserved. Bit 1 is
330 non-volatile memory -- we might want to mark
331 this for later. */
332 if (cluster->usage & 3)
333 continue;
334
335 end = cluster->start_pfn + cluster->numpages;
336 if (end > max_low_pfn)
337 max_low_pfn = end;
6471f52a
MR
338
339 memblock_add(PFN_PHYS(cluster->start_pfn),
340 cluster->numpages << PAGE_SHIFT);
1da177e4
LT
341 }
342
343 /*
344 * Except for the NUMA systems (wildfire, marvel) all of the
345 * Alpha systems we run on support 32GB of memory or less.
346 * Since the NUMA systems introduce large holes in memory addressing,
347 * we can get into a situation where there is not enough contiguous
348 * memory for the memory map.
349 *
350 * Limit memory to the first 32GB to limit the NUMA systems to
351 * memory on their first node (wildfire) or 2 (marvel) to avoid
352 * not being able to produce the memory map. In order to access
353 * all of the memory on the NUMA systems, build with discontiguous
354 * memory support.
355 *
356 * If the user specified a memory limit, let that memory limit stand.
357 */
358 if (!mem_size_limit)
359 mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT;
360
361 if (mem_size_limit && max_low_pfn >= mem_size_limit)
362 {
363 printk("setup: forcing memory size to %ldK (from %ldK).\n",
364 mem_size_limit << (PAGE_SHIFT - 10),
365 max_low_pfn << (PAGE_SHIFT - 10));
366 max_low_pfn = mem_size_limit;
367 }
368
6471f52a
MR
369 /* Reserve the kernel memory. */
370 kernel_size = virt_to_phys(kernel_end) - KERNEL_START_PHYS;
371 memblock_reserve(KERNEL_START_PHYS, kernel_size);
1da177e4
LT
372
373#ifdef CONFIG_BLK_DEV_INITRD
374 initrd_start = INITRD_START;
375 if (initrd_start) {
376 initrd_end = initrd_start+INITRD_SIZE;
377 printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
378 (void *) initrd_start, INITRD_SIZE);
379
380 if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) {
381 if (!move_initrd(PFN_PHYS(max_low_pfn)))
382 printk("initrd extends beyond end of memory "
383 "(0x%08lx > 0x%p)\ndisabling initrd\n",
384 initrd_end,
385 phys_to_virt(PFN_PHYS(max_low_pfn)));
386 } else {
6471f52a
MR
387 memblock_reserve(virt_to_phys((void *)initrd_start),
388 INITRD_SIZE);
1da177e4
LT
389 }
390 }
391#endif /* CONFIG_BLK_DEV_INITRD */
392}
393#else
394extern void setup_memory(void *);
395#endif /* !CONFIG_DISCONTIGMEM */
396
397int __init
398page_is_ram(unsigned long pfn)
399{
400 struct memclust_struct * cluster;
401 struct memdesc_struct * memdesc;
402 unsigned long i;
403
404 memdesc = (struct memdesc_struct *)
405 (hwrpb->mddt_offset + (unsigned long) hwrpb);
406 for_each_mem_cluster(memdesc, cluster, i)
407 {
408 if (pfn >= cluster->start_pfn &&
409 pfn < cluster->start_pfn + cluster->numpages) {
410 return (cluster->usage & 3) ? 0 : 1;
411 }
412 }
413
414 return 0;
415}
416
917b1f78
BU
417static int __init
418register_cpus(void)
419{
420 int i;
421
422 for_each_possible_cpu(i) {
423 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL);
424 if (!p)
425 return -ENOMEM;
76b67ed9 426 register_cpu(p, i);
917b1f78
BU
427 }
428 return 0;
429}
430
431arch_initcall(register_cpus);
432
1da177e4
LT
433void __init
434setup_arch(char **cmdline_p)
435{
436 extern char _end[];
437
438 struct alpha_machine_vector *vec = NULL;
439 struct percpu_struct *cpu;
440 char *type_name, *var_name, *p;
441 void *kernel_end = _end; /* end of kernel */
442 char *args = command_line;
443
444 hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr);
445 boot_cpuid = hard_smp_processor_id();
446
447 /*
448 * Pre-process the system type to make sure it will be valid.
449 *
450 * This may restore real CABRIO and EB66+ family names, ie
451 * EB64+ and EB66.
452 *
453 * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series)
454 * and AS1200 (DIGITAL Server 5000 series) have the type as
455 * the negative of the real one.
456 */
457 if ((long)hwrpb->sys_type < 0) {
458 hwrpb->sys_type = -((long)hwrpb->sys_type);
459 hwrpb_update_checksum(hwrpb);
460 }
461
462 /* Register a call for panic conditions. */
e041c683
AS
463 atomic_notifier_chain_register(&panic_notifier_list,
464 &alpha_panic_block);
1da177e4 465
994dcf70 466#ifndef alpha_using_srm
1da177e4
LT
467 /* Assume that we've booted from SRM if we haven't booted from MILO.
468 Detect the later by looking for "MILO" in the system serial nr. */
469 alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0;
470#endif
994dcf70
RH
471#ifndef alpha_using_qemu
472 /* Similarly, look for QEMU. */
473 alpha_using_qemu = strstr((const char *)hwrpb->ssn, "QEMU") != 0;
474#endif
1da177e4
LT
475
476 /* If we are using SRM, we want to allow callbacks
477 as early as possible, so do this NOW, and then
478 they should work immediately thereafter.
479 */
480 kernel_end = callback_init(kernel_end);
481
482 /*
483 * Locate the command line.
484 */
485 /* Hack for Jensen... since we're restricted to 8 or 16 chars for
486 boot flags depending on the boot mode, we need some shorthand.
487 This should do for installation. */
488 if (strcmp(COMMAND_LINE, "INSTALL") == 0) {
489 strlcpy(command_line, "root=/dev/fd0 load_ramdisk=1", sizeof command_line);
490 } else {
491 strlcpy(command_line, COMMAND_LINE, sizeof command_line);
492 }
3c253ca0 493 strcpy(boot_command_line, command_line);
1da177e4
LT
494 *cmdline_p = command_line;
495
496 /*
497 * Process command-line arguments.
498 */
499 while ((p = strsep(&args, " \t")) != NULL) {
500 if (!*p) continue;
501 if (strncmp(p, "alpha_mv=", 9) == 0) {
502 vec = get_sysvec_byname(p+9);
503 continue;
504 }
505 if (strncmp(p, "cycle=", 6) == 0) {
506 est_cycle_freq = simple_strtol(p+6, NULL, 0);
507 continue;
508 }
509 if (strncmp(p, "mem=", 4) == 0) {
510 mem_size_limit = get_mem_size_limit(p+4);
511 continue;
512 }
513 if (strncmp(p, "srmcons", 7) == 0) {
514 srmcons_output |= 1;
515 continue;
516 }
517 if (strncmp(p, "console=srm", 11) == 0) {
518 srmcons_output |= 2;
519 continue;
520 }
521 if (strncmp(p, "gartsize=", 9) == 0) {
522 alpha_agpgart_size =
523 get_mem_size_limit(p+9) << PAGE_SHIFT;
524 continue;
525 }
526#ifdef CONFIG_VERBOSE_MCHECK
527 if (strncmp(p, "verbose_mcheck=", 15) == 0) {
528 alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0);
529 continue;
530 }
531#endif
532 }
533
534 /* Replace the command line, now that we've killed it with strsep. */
3c253ca0 535 strcpy(command_line, boot_command_line);
1da177e4
LT
536
537 /* If we want SRM console printk echoing early, do it now. */
538 if (alpha_using_srm && srmcons_output) {
539 register_srm_console();
540
541 /*
542 * If "console=srm" was specified, clear the srmcons_output
543 * flag now so that time.c won't unregister_srm_console
544 */
545 if (srmcons_output & 2)
546 srmcons_output = 0;
547 }
548
549#ifdef CONFIG_MAGIC_SYSRQ
550 /* If we're using SRM, make sysrq-b halt back to the prom,
551 not auto-reboot. */
552 if (alpha_using_srm) {
553 struct sysrq_key_op *op = __sysrq_get_key_op('b');
554 op->handler = (void *) machine_halt;
555 }
556#endif
557
558 /*
559 * Identify and reconfigure for the current system.
560 */
561 cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset);
562
563 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
564 cpu->type, &type_name, &var_name);
565 if (*var_name == '0')
566 var_name = "";
567
568 if (!vec) {
569 vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation,
570 cpu->type);
571 }
572
573 if (!vec) {
574 panic("Unsupported system type: %s%s%s (%ld %ld)\n",
575 type_name, (*var_name ? " variation " : ""), var_name,
576 hwrpb->sys_type, hwrpb->sys_variation);
577 }
578 if (vec != &alpha_mv) {
579 alpha_mv = *vec;
580 }
581
582 printk("Booting "
583#ifdef CONFIG_ALPHA_GENERIC
584 "GENERIC "
585#endif
586 "on %s%s%s using machine vector %s from %s\n",
587 type_name, (*var_name ? " variation " : ""),
588 var_name, alpha_mv.vector_name,
589 (alpha_using_srm ? "SRM" : "MILO"));
590
591 printk("Major Options: "
592#ifdef CONFIG_SMP
593 "SMP "
594#endif
595#ifdef CONFIG_ALPHA_EV56
596 "EV56 "
597#endif
598#ifdef CONFIG_ALPHA_EV67
599 "EV67 "
600#endif
601#ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
602 "LEGACY_START "
603#endif
604#ifdef CONFIG_VERBOSE_MCHECK
605 "VERBOSE_MCHECK "
606#endif
607
608#ifdef CONFIG_DISCONTIGMEM
609 "DISCONTIGMEM "
610#ifdef CONFIG_NUMA
611 "NUMA "
612#endif
613#endif
614
615#ifdef CONFIG_DEBUG_SPINLOCK
616 "DEBUG_SPINLOCK "
617#endif
618#ifdef CONFIG_MAGIC_SYSRQ
619 "MAGIC_SYSRQ "
620#endif
621 "\n");
622
623 printk("Command line: %s\n", command_line);
624
625 /*
626 * Sync up the HAE.
627 * Save the SRM's current value for restoration.
628 */
629 srm_hae = *alpha_mv.hae_register;
630 __set_hae(alpha_mv.hae_cache);
631
632 /* Reset enable correctable error reports. */
633 wrmces(0x7);
634
635 /* Find our memory. */
636 setup_memory(kernel_end);
637
638 /* First guess at cpu cache sizes. Do this before init_arch. */
639 determine_cpu_caches(cpu->type);
640
641 /* Initialize the machine. Usually has to do with setting up
642 DMA windows and the like. */
643 if (alpha_mv.init_arch)
644 alpha_mv.init_arch();
645
646 /* Reserve standard resources. */
647 reserve_std_resources();
648
649 /*
650 * Give us a default console. TGA users will see nothing until
651 * chr_dev_init is called, rather late in the boot sequence.
652 */
653
654#ifdef CONFIG_VT
655#if defined(CONFIG_VGA_CONSOLE)
656 conswitchp = &vga_con;
657#elif defined(CONFIG_DUMMY_CONSOLE)
658 conswitchp = &dummy_con;
659#endif
660#endif
661
662 /* Default root filesystem to sda2. */
663 ROOT_DEV = Root_SDA2;
664
665#ifdef CONFIG_EISA
666 /* FIXME: only set this when we actually have EISA in this box? */
667 EISA_bus = 1;
668#endif
669
670 /*
671 * Check ASN in HWRPB for validity, report if bad.
672 * FIXME: how was this failing? Should we trust it instead,
673 * and copy the value into alpha_mv.max_asn?
674 */
675
676 if (hwrpb->max_asn != MAX_ASN) {
677 printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn);
678 }
679
680 /*
681 * Identify the flock of penguins.
682 */
683
684#ifdef CONFIG_SMP
685 setup_smp();
686#endif
687 paging_init();
688}
689
1da177e4
LT
690static char sys_unknown[] = "Unknown";
691static char systype_names[][16] = {
692 "0",
693 "ADU", "Cobra", "Ruby", "Flamingo", "Mannequin", "Jensen",
694 "Pelican", "Morgan", "Sable", "Medulla", "Noname",
695 "Turbolaser", "Avanti", "Mustang", "Alcor", "Tradewind",
696 "Mikasa", "EB64", "EB66", "EB64+", "AlphaBook1",
697 "Rawhide", "K2", "Lynx", "XL", "EB164", "Noritake",
698 "Cortex", "29", "Miata", "XXM", "Takara", "Yukon",
699 "Tsunami", "Wildfire", "CUSCO", "Eiger", "Titan", "Marvel"
700};
701
702static char unofficial_names[][8] = {"100", "Ruffian"};
703
704static char api_names[][16] = {"200", "Nautilus"};
705
706static char eb164_names[][8] = {"EB164", "PC164", "LX164", "SX164", "RX164"};
707static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4};
708
709static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"};
710static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2};
711
712static char eb64p_names[][16] = {"EB64+", "Cabriolet", "AlphaPCI64"};
713static int eb64p_indices[] = {0,0,1,2};
714
715static char eb66_names[][8] = {"EB66", "EB66+"};
716static int eb66_indices[] = {0,0,1};
717
718static char marvel_names[][16] = {
719 "Marvel/EV7"
720};
721static int marvel_indices[] = { 0 };
722
723static char rawhide_names[][16] = {
724 "Dodge", "Wrangler", "Durango", "Tincup", "DaVinci"
725};
726static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4};
727
728static char titan_names[][16] = {
729 "DEFAULT", "Privateer", "Falcon", "Granite"
730};
731static int titan_indices[] = {0,1,2,2,3};
732
733static char tsunami_names[][16] = {
734 "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper",
735 "Goldrush", "Webbrick", "Catamaran", "Brisbane", "Melbourne",
736 "Flying Clipper", "Shark"
737};
738static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12};
739
740static struct alpha_machine_vector * __init
741get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)
742{
743 static struct alpha_machine_vector *systype_vecs[] __initdata =
744 {
745 NULL, /* 0 */
746 NULL, /* ADU */
747 NULL, /* Cobra */
748 NULL, /* Ruby */
749 NULL, /* Flamingo */
750 NULL, /* Mannequin */
751 &jensen_mv,
752 NULL, /* Pelican */
753 NULL, /* Morgan */
754 NULL, /* Sable -- see below. */
755 NULL, /* Medulla */
756 &noname_mv,
757 NULL, /* Turbolaser */
758 &avanti_mv,
759 NULL, /* Mustang */
760 NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */
761 NULL, /* Tradewind */
762 NULL, /* Mikasa -- see below. */
763 NULL, /* EB64 */
764 NULL, /* EB66 -- see variation. */
765 NULL, /* EB64+ -- see variation. */
766 &alphabook1_mv,
767 &rawhide_mv,
768 NULL, /* K2 */
769 &lynx_mv, /* Lynx */
770 &xl_mv,
771 NULL, /* EB164 -- see variation. */
772 NULL, /* Noritake -- see below. */
773 NULL, /* Cortex */
774 NULL, /* 29 */
775 &miata_mv,
776 NULL, /* XXM */
777 &takara_mv,
778 NULL, /* Yukon */
779 NULL, /* Tsunami -- see variation. */
780 &wildfire_mv, /* Wildfire */
781 NULL, /* CUSCO */
782 &eiger_mv, /* Eiger */
783 NULL, /* Titan */
784 NULL, /* Marvel */
785 };
786
787 static struct alpha_machine_vector *unofficial_vecs[] __initdata =
788 {
789 NULL, /* 100 */
790 &ruffian_mv,
791 };
792
793 static struct alpha_machine_vector *api_vecs[] __initdata =
794 {
795 NULL, /* 200 */
796 &nautilus_mv,
797 };
798
799 static struct alpha_machine_vector *alcor_vecs[] __initdata =
800 {
801 &alcor_mv, &xlt_mv, &xlt_mv
802 };
803
804 static struct alpha_machine_vector *eb164_vecs[] __initdata =
805 {
806 &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv
807 };
808
809 static struct alpha_machine_vector *eb64p_vecs[] __initdata =
810 {
811 &eb64p_mv,
812 &cabriolet_mv,
813 &cabriolet_mv /* AlphaPCI64 */
814 };
815
816 static struct alpha_machine_vector *eb66_vecs[] __initdata =
817 {
818 &eb66_mv,
819 &eb66p_mv
820 };
821
822 static struct alpha_machine_vector *marvel_vecs[] __initdata =
823 {
824 &marvel_ev7_mv,
825 };
826
827 static struct alpha_machine_vector *titan_vecs[] __initdata =
828 {
829 &titan_mv, /* default */
830 &privateer_mv, /* privateer */
831 &titan_mv, /* falcon */
832 &privateer_mv, /* granite */
833 };
834
835 static struct alpha_machine_vector *tsunami_vecs[] __initdata =
836 {
837 NULL,
838 &dp264_mv, /* dp264 */
839 &dp264_mv, /* warhol */
840 &dp264_mv, /* windjammer */
841 &monet_mv, /* monet */
842 &clipper_mv, /* clipper */
843 &dp264_mv, /* goldrush */
844 &webbrick_mv, /* webbrick */
845 &dp264_mv, /* catamaran */
846 NULL, /* brisbane? */
847 NULL, /* melbourne? */
848 NULL, /* flying clipper? */
849 &shark_mv, /* shark */
850 };
851
852 /* ??? Do we need to distinguish between Rawhides? */
853
854 struct alpha_machine_vector *vec;
855
856 /* Search the system tables first... */
857 vec = NULL;
25c8716c 858 if (type < ARRAY_SIZE(systype_vecs)) {
1da177e4
LT
859 vec = systype_vecs[type];
860 } else if ((type > ST_API_BIAS) &&
25c8716c 861 (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) {
1da177e4
LT
862 vec = api_vecs[type - ST_API_BIAS];
863 } else if ((type > ST_UNOFFICIAL_BIAS) &&
25c8716c 864 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) {
1da177e4
LT
865 vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS];
866 }
867
868 /* If we've not found one, try for a variation. */
869
870 if (!vec) {
871 /* Member ID is a bit-field. */
872 unsigned long member = (variation >> 10) & 0x3f;
873
874 cpu &= 0xffffffff; /* make it usable */
875
876 switch (type) {
877 case ST_DEC_ALCOR:
25c8716c 878 if (member < ARRAY_SIZE(alcor_indices))
1da177e4
LT
879 vec = alcor_vecs[alcor_indices[member]];
880 break;
881 case ST_DEC_EB164:
25c8716c 882 if (member < ARRAY_SIZE(eb164_indices))
1da177e4
LT
883 vec = eb164_vecs[eb164_indices[member]];
884 /* PC164 may show as EB164 variation with EV56 CPU,
885 but, since no true EB164 had anything but EV5... */
886 if (vec == &eb164_mv && cpu == EV56_CPU)
887 vec = &pc164_mv;
888 break;
889 case ST_DEC_EB64P:
25c8716c 890 if (member < ARRAY_SIZE(eb64p_indices))
1da177e4
LT
891 vec = eb64p_vecs[eb64p_indices[member]];
892 break;
893 case ST_DEC_EB66:
25c8716c 894 if (member < ARRAY_SIZE(eb66_indices))
1da177e4
LT
895 vec = eb66_vecs[eb66_indices[member]];
896 break;
897 case ST_DEC_MARVEL:
25c8716c 898 if (member < ARRAY_SIZE(marvel_indices))
1da177e4
LT
899 vec = marvel_vecs[marvel_indices[member]];
900 break;
901 case ST_DEC_TITAN:
902 vec = titan_vecs[0]; /* default */
25c8716c 903 if (member < ARRAY_SIZE(titan_indices))
1da177e4
LT
904 vec = titan_vecs[titan_indices[member]];
905 break;
906 case ST_DEC_TSUNAMI:
25c8716c 907 if (member < ARRAY_SIZE(tsunami_indices))
1da177e4
LT
908 vec = tsunami_vecs[tsunami_indices[member]];
909 break;
910 case ST_DEC_1000:
911 if (cpu == EV5_CPU || cpu == EV56_CPU)
912 vec = &mikasa_primo_mv;
913 else
914 vec = &mikasa_mv;
915 break;
916 case ST_DEC_NORITAKE:
917 if (cpu == EV5_CPU || cpu == EV56_CPU)
918 vec = &noritake_primo_mv;
919 else
920 vec = &noritake_mv;
921 break;
922 case ST_DEC_2100_A500:
923 if (cpu == EV5_CPU || cpu == EV56_CPU)
924 vec = &sable_gamma_mv;
925 else
926 vec = &sable_mv;
927 break;
928 }
929 }
930 return vec;
931}
932
933static struct alpha_machine_vector * __init
934get_sysvec_byname(const char *name)
935{
936 static struct alpha_machine_vector *all_vecs[] __initdata =
937 {
938 &alcor_mv,
939 &alphabook1_mv,
940 &avanti_mv,
941 &cabriolet_mv,
942 &clipper_mv,
943 &dp264_mv,
944 &eb164_mv,
945 &eb64p_mv,
946 &eb66_mv,
947 &eb66p_mv,
948 &eiger_mv,
949 &jensen_mv,
950 &lx164_mv,
951 &lynx_mv,
952 &miata_mv,
953 &mikasa_mv,
954 &mikasa_primo_mv,
955 &monet_mv,
956 &nautilus_mv,
957 &noname_mv,
958 &noritake_mv,
959 &noritake_primo_mv,
960 &p2k_mv,
961 &pc164_mv,
962 &privateer_mv,
963 &rawhide_mv,
964 &ruffian_mv,
965 &rx164_mv,
966 &sable_mv,
967 &sable_gamma_mv,
968 &shark_mv,
969 &sx164_mv,
970 &takara_mv,
971 &webbrick_mv,
972 &wildfire_mv,
973 &xl_mv,
974 &xlt_mv
975 };
976
977 size_t i;
978
25c8716c 979 for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) {
1da177e4
LT
980 struct alpha_machine_vector *mv = all_vecs[i];
981 if (strcasecmp(mv->vector_name, name) == 0)
982 return mv;
983 }
984 return NULL;
985}
986
987static void
988get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu,
989 char **type_name, char **variation_name)
990{
991 unsigned long member;
992
993 /* If not in the tables, make it UNKNOWN,
994 else set type name to family */
25c8716c 995 if (type < ARRAY_SIZE(systype_names)) {
1da177e4
LT
996 *type_name = systype_names[type];
997 } else if ((type > ST_API_BIAS) &&
25c8716c 998 (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) {
1da177e4
LT
999 *type_name = api_names[type - ST_API_BIAS];
1000 } else if ((type > ST_UNOFFICIAL_BIAS) &&
25c8716c 1001 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) {
1da177e4
LT
1002 *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS];
1003 } else {
1004 *type_name = sys_unknown;
1005 *variation_name = sys_unknown;
1006 return;
1007 }
1008
1009 /* Set variation to "0"; if variation is zero, done. */
1010 *variation_name = systype_names[0];
1011 if (variation == 0) {
1012 return;
1013 }
1014
1015 member = (variation >> 10) & 0x3f; /* member ID is a bit-field */
1016
1017 cpu &= 0xffffffff; /* make it usable */
1018
1019 switch (type) { /* select by family */
1020 default: /* default to variation "0" for now */
1021 break;
1022 case ST_DEC_EB164:
03e1f044
DC
1023 if (member >= ARRAY_SIZE(eb164_indices))
1024 break;
1025 *variation_name = eb164_names[eb164_indices[member]];
1da177e4
LT
1026 /* PC164 may show as EB164 variation, but with EV56 CPU,
1027 so, since no true EB164 had anything but EV5... */
1028 if (eb164_indices[member] == 0 && cpu == EV56_CPU)
1029 *variation_name = eb164_names[1]; /* make it PC164 */
1030 break;
1031 case ST_DEC_ALCOR:
25c8716c 1032 if (member < ARRAY_SIZE(alcor_indices))
1da177e4
LT
1033 *variation_name = alcor_names[alcor_indices[member]];
1034 break;
1035 case ST_DEC_EB64P:
25c8716c 1036 if (member < ARRAY_SIZE(eb64p_indices))
1da177e4
LT
1037 *variation_name = eb64p_names[eb64p_indices[member]];
1038 break;
1039 case ST_DEC_EB66:
25c8716c 1040 if (member < ARRAY_SIZE(eb66_indices))
1da177e4
LT
1041 *variation_name = eb66_names[eb66_indices[member]];
1042 break;
1043 case ST_DEC_MARVEL:
25c8716c 1044 if (member < ARRAY_SIZE(marvel_indices))
1da177e4
LT
1045 *variation_name = marvel_names[marvel_indices[member]];
1046 break;
1047 case ST_DEC_RAWHIDE:
25c8716c 1048 if (member < ARRAY_SIZE(rawhide_indices))
1da177e4
LT
1049 *variation_name = rawhide_names[rawhide_indices[member]];
1050 break;
1051 case ST_DEC_TITAN:
1052 *variation_name = titan_names[0]; /* default */
25c8716c 1053 if (member < ARRAY_SIZE(titan_indices))
1da177e4
LT
1054 *variation_name = titan_names[titan_indices[member]];
1055 break;
1056 case ST_DEC_TSUNAMI:
25c8716c 1057 if (member < ARRAY_SIZE(tsunami_indices))
1da177e4
LT
1058 *variation_name = tsunami_names[tsunami_indices[member]];
1059 break;
1060 }
1061}
1062
1063/*
1064 * A change was made to the HWRPB via an ECO and the following code
1065 * tracks a part of the ECO. In HWRPB versions less than 5, the ECO
1066 * was not implemented in the console firmware. If it's revision 5 or
1067 * greater we can get the name of the platform as an ASCII string from
1068 * the HWRPB. That's what this function does. It checks the revision
1069 * level and if the string is in the HWRPB it returns the address of
1070 * the string--a pointer to the name of the platform.
1071 *
1072 * Returns:
1073 * - Pointer to a ASCII string if it's in the HWRPB
1074 * - Pointer to a blank string if the data is not in the HWRPB.
1075 */
1076
1077static char *
1078platform_string(void)
1079{
1080 struct dsr_struct *dsr;
1081 static char unk_system_string[] = "N/A";
1082
1083 /* Go to the console for the string pointer.
1084 * If the rpb_vers is not 5 or greater the rpb
1085 * is old and does not have this data in it.
1086 */
1087 if (hwrpb->revision < 5)
1088 return (unk_system_string);
1089 else {
1090 /* The Dynamic System Recognition struct
1091 * has the system platform name starting
1092 * after the character count of the string.
1093 */
1094 dsr = ((struct dsr_struct *)
1095 ((char *)hwrpb + hwrpb->dsr_offset));
1096 return ((char *)dsr + (dsr->sysname_off +
1097 sizeof(long)));
1098 }
1099}
1100
1101static int
1102get_nr_processors(struct percpu_struct *cpubase, unsigned long num)
1103{
1104 struct percpu_struct *cpu;
1105 unsigned long i;
1106 int count = 0;
1107
1108 for (i = 0; i < num; i++) {
1109 cpu = (struct percpu_struct *)
1110 ((char *)cpubase + i*hwrpb->processor_size);
1111 if ((cpu->flags & 0x1cc) == 0x1cc)
1112 count++;
1113 }
1114 return count;
1115}
1116
1117static void
1118show_cache_size (struct seq_file *f, const char *which, int shape)
1119{
1120 if (shape == -1)
1121 seq_printf (f, "%s\t\t: n/a\n", which);
1122 else if (shape == 0)
1123 seq_printf (f, "%s\t\t: unknown\n", which);
1124 else
1125 seq_printf (f, "%s\t\t: %dK, %d-way, %db line\n",
1126 which, shape >> 10, shape & 15,
1127 1 << ((shape >> 4) & 15));
1128}
1129
1130static int
1131show_cpuinfo(struct seq_file *f, void *slot)
1132{
1133 extern struct unaligned_stat {
1134 unsigned long count, va, pc;
1135 } unaligned[2];
1136
1137 static char cpu_names[][8] = {
1138 "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56",
1139 "EV6", "PCA56", "PCA57", "EV67", "EV68CB", "EV68AL",
1140 "EV68CX", "EV7", "EV79", "EV69"
1141 };
1142
1143 struct percpu_struct *cpu = slot;
1144 unsigned int cpu_index;
1145 char *cpu_name;
1146 char *systype_name;
1147 char *sysvariation_name;
1148 int nr_processors;
fddd87d6 1149 unsigned long timer_freq;
1da177e4
LT
1150
1151 cpu_index = (unsigned) (cpu->type - 1);
1152 cpu_name = "Unknown";
25c8716c 1153 if (cpu_index < ARRAY_SIZE(cpu_names))
1da177e4
LT
1154 cpu_name = cpu_names[cpu_index];
1155
1156 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
1157 cpu->type, &systype_name, &sysvariation_name);
1158
1159 nr_processors = get_nr_processors(cpu, hwrpb->nr_processors);
1160
fddd87d6
RH
1161#if CONFIG_HZ == 1024 || CONFIG_HZ == 1200
1162 timer_freq = (100UL * hwrpb->intr_freq) / 4096;
1163#else
1164 timer_freq = 100UL * CONFIG_HZ;
1165#endif
1166
1da177e4
LT
1167 seq_printf(f, "cpu\t\t\t: Alpha\n"
1168 "cpu model\t\t: %s\n"
1169 "cpu variation\t\t: %ld\n"
1170 "cpu revision\t\t: %ld\n"
1171 "cpu serial number\t: %s\n"
1172 "system type\t\t: %s\n"
1173 "system variation\t: %s\n"
1174 "system revision\t\t: %ld\n"
1175 "system serial number\t: %s\n"
1176 "cycle frequency [Hz]\t: %lu %s\n"
1177 "timer frequency [Hz]\t: %lu.%02lu\n"
1178 "page size [bytes]\t: %ld\n"
1179 "phys. address bits\t: %ld\n"
1180 "max. addr. space #\t: %ld\n"
1181 "BogoMIPS\t\t: %lu.%02lu\n"
1182 "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1183 "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1184 "platform string\t\t: %s\n"
1185 "cpus detected\t\t: %d\n",
1186 cpu_name, cpu->variation, cpu->revision,
1187 (char*)cpu->serial_no,
1188 systype_name, sysvariation_name, hwrpb->sys_revision,
1189 (char*)hwrpb->ssn,
1190 est_cycle_freq ? : hwrpb->cycle_freq,
1191 est_cycle_freq ? "est." : "",
fddd87d6 1192 timer_freq / 100, timer_freq % 100,
1da177e4
LT
1193 hwrpb->pagesize,
1194 hwrpb->pa_bits,
1195 hwrpb->max_asn,
1196 loops_per_jiffy / (500000/HZ),
1197 (loops_per_jiffy / (5000/HZ)) % 100,
1198 unaligned[0].count, unaligned[0].pc, unaligned[0].va,
1199 unaligned[1].count, unaligned[1].pc, unaligned[1].va,
1200 platform_string(), nr_processors);
1201
1202#ifdef CONFIG_SMP
5f0e3da6 1203 seq_printf(f, "cpus active\t\t: %u\n"
1da177e4 1204 "cpu active mask\t\t: %016lx\n",
81740fc6 1205 num_online_cpus(), cpumask_bits(cpu_possible_mask)[0]);
1da177e4
LT
1206#endif
1207
1208 show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape);
1209 show_cache_size (f, "L1 Dcache", alpha_l1d_cacheshape);
1210 show_cache_size (f, "L2 cache", alpha_l2_cacheshape);
1211 show_cache_size (f, "L3 cache", alpha_l3_cacheshape);
1212
1213 return 0;
1214}
1215
1216static int __init
1217read_mem_block(int *addr, int stride, int size)
1218{
1219 long nloads = size / stride, cnt, tmp;
1220
1221 __asm__ __volatile__(
1222 " rpcc %0\n"
1223 "1: ldl %3,0(%2)\n"
1224 " subq %1,1,%1\n"
1225 /* Next two XORs introduce an explicit data dependency between
1226 consecutive loads in the loop, which will give us true load
1227 latency. */
1228 " xor %3,%2,%2\n"
1229 " xor %3,%2,%2\n"
1230 " addq %2,%4,%2\n"
1231 " bne %1,1b\n"
1232 " rpcc %3\n"
1233 " subl %3,%0,%0\n"
1234 : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp)
1235 : "r" (stride), "1" (nloads), "2" (addr));
1236
1237 return cnt / (size / stride);
1238}
1239
1240#define CSHAPE(totalsize, linesize, assoc) \
1241 ((totalsize & ~0xff) | (linesize << 4) | assoc)
1242
1243/* ??? EV5 supports up to 64M, but did the systems with more than
1244 16M of BCACHE ever exist? */
1245#define MAX_BCACHE_SIZE 16*1024*1024
1246
1247/* Note that the offchip caches are direct mapped on all Alphas. */
1248static int __init
1249external_cache_probe(int minsize, int width)
1250{
1251 int cycles, prev_cycles = 1000000;
1252 int stride = 1 << width;
1253 long size = minsize, maxsize = MAX_BCACHE_SIZE * 2;
1254
1255 if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT)
74fd1b68 1256 maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT);
1da177e4
LT
1257
1258 /* Get the first block cached. */
1259 read_mem_block(__va(0), stride, size);
1260
1261 while (size < maxsize) {
1262 /* Get an average load latency in cycles. */
1263 cycles = read_mem_block(__va(0), stride, size);
1264 if (cycles > prev_cycles * 2) {
1265 /* Fine, we exceed the cache. */
1266 printk("%ldK Bcache detected; load hit latency %d "
1267 "cycles, load miss latency %d cycles\n",
1268 size >> 11, prev_cycles, cycles);
1269 return CSHAPE(size >> 1, width, 1);
1270 }
1271 /* Try to get the next block cached. */
1272 read_mem_block(__va(size), stride, size);
1273 prev_cycles = cycles;
1274 size <<= 1;
1275 }
1276 return -1; /* No BCACHE found. */
1277}
1278
1279static void __init
1280determine_cpu_caches (unsigned int cpu_type)
1281{
1282 int L1I, L1D, L2, L3;
1283
1284 switch (cpu_type) {
1285 case EV4_CPU:
1286 case EV45_CPU:
1287 {
1288 if (cpu_type == EV4_CPU)
1289 L1I = CSHAPE(8*1024, 5, 1);
1290 else
1291 L1I = CSHAPE(16*1024, 5, 1);
1292 L1D = L1I;
1293 L3 = -1;
1294
1295 /* BIU_CTL is a write-only Abox register. PALcode has a
1296 shadow copy, and may be available from some versions
1297 of the CSERVE PALcall. If we can get it, then
1298
1299 unsigned long biu_ctl, size;
1300 size = 128*1024 * (1 << ((biu_ctl >> 28) & 7));
1301 L2 = CSHAPE (size, 5, 1);
1302
1303 Unfortunately, we can't rely on that.
1304 */
1305 L2 = external_cache_probe(128*1024, 5);
1306 break;
1307 }
1308
1309 case LCA4_CPU:
1310 {
1311 unsigned long car, size;
1312
1313 L1I = L1D = CSHAPE(8*1024, 5, 1);
1314 L3 = -1;
1315
1316 car = *(vuip) phys_to_virt (0x120000078UL);
1317 size = 64*1024 * (1 << ((car >> 5) & 7));
1318 /* No typo -- 8 byte cacheline size. Whodathunk. */
1319 L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1);
1320 break;
1321 }
1322
1323 case EV5_CPU:
1324 case EV56_CPU:
1325 {
1326 unsigned long sc_ctl, width;
1327
1328 L1I = L1D = CSHAPE(8*1024, 5, 1);
1329
1330 /* Check the line size of the Scache. */
1331 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL);
1332 width = sc_ctl & 0x1000 ? 6 : 5;
1333 L2 = CSHAPE (96*1024, width, 3);
1334
1335 /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode
1336 has a shadow copy, and may be available from some versions
1337 of the CSERVE PALcall. If we can get it, then
1338
1339 unsigned long bc_control, bc_config, size;
1340 size = 1024*1024 * (1 << ((bc_config & 7) - 1));
1341 L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1);
1342
1343 Unfortunately, we can't rely on that.
1344 */
1345 L3 = external_cache_probe(1024*1024, width);
1346 break;
1347 }
1348
1349 case PCA56_CPU:
1350 case PCA57_CPU:
1351 {
1da177e4
LT
1352 if (cpu_type == PCA56_CPU) {
1353 L1I = CSHAPE(16*1024, 6, 1);
1354 L1D = CSHAPE(8*1024, 5, 1);
1355 } else {
1356 L1I = CSHAPE(32*1024, 6, 2);
1357 L1D = CSHAPE(16*1024, 5, 1);
1358 }
1359 L3 = -1;
1360
280da4e4
RH
1361#if 0
1362 unsigned long cbox_config, size;
1363
1da177e4
LT
1364 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL);
1365 size = 512*1024 * (1 << ((cbox_config >> 12) & 3));
1366
1da177e4
LT
1367 L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1);
1368#else
1369 L2 = external_cache_probe(512*1024, 6);
1370#endif
1371 break;
1372 }
1373
1374 case EV6_CPU:
1375 case EV67_CPU:
1376 case EV68CB_CPU:
1377 case EV68AL_CPU:
1378 case EV68CX_CPU:
1379 case EV69_CPU:
1380 L1I = L1D = CSHAPE(64*1024, 6, 2);
1381 L2 = external_cache_probe(1024*1024, 6);
1382 L3 = -1;
1383 break;
1384
1385 case EV7_CPU:
1386 case EV79_CPU:
1387 L1I = L1D = CSHAPE(64*1024, 6, 2);
1388 L2 = CSHAPE(7*1024*1024/4, 6, 7);
1389 L3 = -1;
1390 break;
1391
1392 default:
1393 /* Nothing known about this cpu type. */
1394 L1I = L1D = L2 = L3 = 0;
1395 break;
1396 }
1397
1398 alpha_l1i_cacheshape = L1I;
1399 alpha_l1d_cacheshape = L1D;
1400 alpha_l2_cacheshape = L2;
1401 alpha_l3_cacheshape = L3;
1402}
1403
1404/*
1405 * We show only CPU #0 info.
1406 */
1407static void *
1408c_start(struct seq_file *f, loff_t *pos)
1409{
1410 return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset;
1411}
1412
1413static void *
1414c_next(struct seq_file *f, void *v, loff_t *pos)
1415{
1416 return NULL;
1417}
1418
1419static void
1420c_stop(struct seq_file *f, void *v)
1421{
1422}
1423
03a44825 1424const struct seq_operations cpuinfo_op = {
1da177e4
LT
1425 .start = c_start,
1426 .next = c_next,
1427 .stop = c_stop,
1428 .show = show_cpuinfo,
1429};
1430
1431
1432static int
1433alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1434{
1435#if 1
1436 /* FIXME FIXME FIXME */
1437 /* If we are using SRM and serial console, just hard halt here. */
1438 if (alpha_using_srm && srmcons_output)
1439 __halt();
1440#endif
1441 return NOTIFY_DONE;
1442}
e5c6c8e4
MN
1443
1444static __init int add_pcspkr(void)
1445{
1446 struct platform_device *pd;
1447 int ret;
1448
1449 pd = platform_device_alloc("pcspkr", -1);
1450 if (!pd)
1451 return -ENOMEM;
1452
1453 ret = platform_device_add(pd);
1454 if (ret)
1455 platform_device_put(pd);
1456
1457 return ret;
1458}
1459device_initcall(add_pcspkr);