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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 | 2 | /* |
f30c2269 | 3 | * linux/arch/alpha/kernel/machvec_impl.h |
1da177e4 LT |
4 | * |
5 | * Copyright (C) 1997, 1998 Richard Henderson | |
6 | * | |
7 | * This file has goodies to help simplify instantiation of machine vectors. | |
8 | */ | |
9 | ||
1da177e4 LT |
10 | /* Whee. These systems don't have an HAE: |
11 | IRONGATE, MARVEL, POLARIS, TSUNAMI, TITAN, WILDFIRE | |
12 | Fix things up for the GENERIC kernel by defining the HAE address | |
13 | to be that of the cache. Now we can read and write it as we like. ;-) */ | |
14 | #define IRONGATE_HAE_ADDRESS (&alpha_mv.hae_cache) | |
15 | #define MARVEL_HAE_ADDRESS (&alpha_mv.hae_cache) | |
16 | #define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache) | |
17 | #define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache) | |
18 | #define TITAN_HAE_ADDRESS (&alpha_mv.hae_cache) | |
19 | #define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae_cache) | |
20 | ||
21 | #ifdef CIA_ONE_HAE_WINDOW | |
22 | #define CIA_HAE_ADDRESS (&alpha_mv.hae_cache) | |
23 | #endif | |
24 | #ifdef MCPCIA_ONE_HAE_WINDOW | |
25 | #define MCPCIA_HAE_ADDRESS (&alpha_mv.hae_cache) | |
26 | #endif | |
98c532ec IK |
27 | #ifdef T2_ONE_HAE_WINDOW |
28 | #define T2_HAE_ADDRESS (&alpha_mv.hae_cache) | |
29 | #endif | |
1da177e4 LT |
30 | |
31 | /* Only a few systems don't define IACK_SC, handling all interrupts through | |
32 | the SRM console. But splitting out that one case from IO() below | |
33 | seems like such a pain. Define this to get things to compile. */ | |
34 | #define JENSEN_IACK_SC 1 | |
35 | #define T2_IACK_SC 1 | |
36 | #define WILDFIRE_IACK_SC 1 /* FIXME */ | |
37 | ||
38 | /* | |
39 | * Some helpful macros for filling in the blanks. | |
40 | */ | |
41 | ||
42 | #define CAT1(x,y) x##y | |
43 | #define CAT(x,y) CAT1(x,y) | |
44 | ||
85d0b3a5 | 45 | #define DO_DEFAULT_RTC .rtc_port = 0x70 |
1da177e4 LT |
46 | |
47 | #define DO_EV4_MMU \ | |
48 | .max_asn = EV4_MAX_ASN, \ | |
49 | .mv_switch_mm = ev4_switch_mm, \ | |
50 | .mv_activate_mm = ev4_activate_mm, \ | |
51 | .mv_flush_tlb_current = ev4_flush_tlb_current, \ | |
52 | .mv_flush_tlb_current_page = ev4_flush_tlb_current_page | |
53 | ||
54 | #define DO_EV5_MMU \ | |
55 | .max_asn = EV5_MAX_ASN, \ | |
56 | .mv_switch_mm = ev5_switch_mm, \ | |
57 | .mv_activate_mm = ev5_activate_mm, \ | |
58 | .mv_flush_tlb_current = ev5_flush_tlb_current, \ | |
59 | .mv_flush_tlb_current_page = ev5_flush_tlb_current_page | |
60 | ||
61 | #define DO_EV6_MMU \ | |
62 | .max_asn = EV6_MAX_ASN, \ | |
63 | .mv_switch_mm = ev5_switch_mm, \ | |
64 | .mv_activate_mm = ev5_activate_mm, \ | |
65 | .mv_flush_tlb_current = ev5_flush_tlb_current, \ | |
66 | .mv_flush_tlb_current_page = ev5_flush_tlb_current_page | |
67 | ||
68 | #define DO_EV7_MMU \ | |
69 | .max_asn = EV6_MAX_ASN, \ | |
70 | .mv_switch_mm = ev5_switch_mm, \ | |
71 | .mv_activate_mm = ev5_activate_mm, \ | |
72 | .mv_flush_tlb_current = ev5_flush_tlb_current, \ | |
73 | .mv_flush_tlb_current_page = ev5_flush_tlb_current_page | |
74 | ||
75 | #define IO_LITE(UP,low) \ | |
76 | .hae_register = (unsigned long *) CAT(UP,_HAE_ADDRESS), \ | |
77 | .iack_sc = CAT(UP,_IACK_SC), \ | |
78 | .mv_ioread8 = CAT(low,_ioread8), \ | |
79 | .mv_ioread16 = CAT(low,_ioread16), \ | |
80 | .mv_ioread32 = CAT(low,_ioread32), \ | |
e19d4ebc | 81 | .mv_ioread64 = CAT(low,_ioread64), \ |
1da177e4 LT |
82 | .mv_iowrite8 = CAT(low,_iowrite8), \ |
83 | .mv_iowrite16 = CAT(low,_iowrite16), \ | |
84 | .mv_iowrite32 = CAT(low,_iowrite32), \ | |
e19d4ebc | 85 | .mv_iowrite64 = CAT(low,_iowrite64), \ |
1da177e4 LT |
86 | .mv_readb = CAT(low,_readb), \ |
87 | .mv_readw = CAT(low,_readw), \ | |
88 | .mv_readl = CAT(low,_readl), \ | |
89 | .mv_readq = CAT(low,_readq), \ | |
90 | .mv_writeb = CAT(low,_writeb), \ | |
91 | .mv_writew = CAT(low,_writew), \ | |
92 | .mv_writel = CAT(low,_writel), \ | |
93 | .mv_writeq = CAT(low,_writeq), \ | |
94 | .mv_ioportmap = CAT(low,_ioportmap), \ | |
95 | .mv_ioremap = CAT(low,_ioremap), \ | |
96 | .mv_iounmap = CAT(low,_iounmap), \ | |
97 | .mv_is_ioaddr = CAT(low,_is_ioaddr), \ | |
98 | .mv_is_mmio = CAT(low,_is_mmio) \ | |
99 | ||
100 | #define IO(UP,low) \ | |
101 | IO_LITE(UP,low), \ | |
102 | .pci_ops = &CAT(low,_pci_ops), \ | |
103 | .mv_pci_tbi = CAT(low,_pci_tbi) | |
104 | ||
105 | #define DO_APECS_IO IO(APECS,apecs) | |
106 | #define DO_CIA_IO IO(CIA,cia) | |
107 | #define DO_IRONGATE_IO IO(IRONGATE,irongate) | |
108 | #define DO_LCA_IO IO(LCA,lca) | |
109 | #define DO_MARVEL_IO IO(MARVEL,marvel) | |
110 | #define DO_MCPCIA_IO IO(MCPCIA,mcpcia) | |
111 | #define DO_POLARIS_IO IO(POLARIS,polaris) | |
112 | #define DO_T2_IO IO(T2,t2) | |
113 | #define DO_TSUNAMI_IO IO(TSUNAMI,tsunami) | |
114 | #define DO_TITAN_IO IO(TITAN,titan) | |
115 | #define DO_WILDFIRE_IO IO(WILDFIRE,wildfire) | |
116 | ||
117 | #define DO_PYXIS_IO IO_LITE(CIA,cia_bwx), \ | |
118 | .pci_ops = &cia_pci_ops, \ | |
119 | .mv_pci_tbi = cia_pci_tbi | |
120 | ||
121 | /* | |
122 | * In a GENERIC kernel, we have lots of these vectors floating about, | |
123 | * all but one of which we want to go away. In a non-GENERIC kernel, | |
124 | * we want only one, ever. | |
125 | * | |
126 | * Accomplish this in the GENERIC kernel by putting all of the vectors | |
127 | * in the .init.data section where they'll go away. We'll copy the | |
128 | * one we want to the real alpha_mv vector in setup_arch. | |
129 | * | |
130 | * Accomplish this in a non-GENERIC kernel by ifdef'ing out all but | |
131 | * one of the vectors, which will not reside in .init.data. We then | |
132 | * alias this one vector to alpha_mv, so no copy is needed. | |
133 | * | |
134 | * Upshot: set __initdata to nothing for non-GENERIC kernels. | |
135 | */ | |
136 | ||
137 | #ifdef CONFIG_ALPHA_GENERIC | |
138 | #define __initmv __initdata | |
139 | #define ALIAS_MV(x) | |
140 | #else | |
bd721ea7 | 141 | #define __initmv __refdata |
1da177e4 LT |
142 | |
143 | /* GCC actually has a syntax for defining aliases, but is under some | |
144 | delusion that you shouldn't be able to declare it extern somewhere | |
145 | else beforehand. Fine. We'll do it ourselves. */ | |
146 | #if 0 | |
147 | #define ALIAS_MV(system) \ | |
00fc0e0d AV |
148 | struct alpha_machine_vector alpha_mv __attribute__((alias(#system "_mv"))); \ |
149 | EXPORT_SYMBOL(alpha_mv); | |
1da177e4 LT |
150 | #else |
151 | #define ALIAS_MV(system) \ | |
00fc0e0d AV |
152 | asm(".global alpha_mv\nalpha_mv = " #system "_mv"); \ |
153 | EXPORT_SYMBOL(alpha_mv); | |
1da177e4 LT |
154 | #endif |
155 | #endif /* GENERIC */ |