Commit | Line | Data |
---|---|---|
d0fc2eaa KG |
1 | * Board Control and Status (BCSR) |
2 | ||
3 | Required properties: | |
4 | ||
fd657efc | 5 | - compatible : Should be "fsl,<board>-bcsr" |
d0fc2eaa KG |
6 | - reg : Offset and length of the register set for the device |
7 | ||
8 | Example: | |
9 | ||
10 | bcsr@f8000000 { | |
fd657efc | 11 | compatible = "fsl,mpc8360mds-bcsr"; |
d0fc2eaa KG |
12 | reg = <f8000000 8000>; |
13 | }; | |
14 | ||
15 | * Freescale on board FPGA | |
16 | ||
17 | This is the memory-mapped registers for on board FPGA. | |
18 | ||
19 | Required properities: | |
20 | - compatible : should be "fsl,fpga-pixis". | |
94409d6e | 21 | - reg : should contain the address and the length of the FPPGA register |
d0fc2eaa KG |
22 | set. |
23 | ||
24 | Example (MPC8610HPCD): | |
25 | ||
26 | board-control@e8000000 { | |
27 | compatible = "fsl,fpga-pixis"; | |
28 | reg = <0xe8000000 32>; | |
29 | }; | |
94409d6e AV |
30 | |
31 | * Freescale BCSR GPIO banks | |
32 | ||
33 | Some BCSR registers act as simple GPIO controllers, each such | |
34 | register can be represented by the gpio-controller node. | |
35 | ||
36 | Required properities: | |
37 | - compatible : Should be "fsl,<board>-bcsr-gpio". | |
38 | - reg : Should contain the address and the length of the GPIO bank | |
39 | register. | |
40 | - #gpio-cells : Should be two. The first cell is the pin number and the | |
98a1708d | 41 | second cell is used to specify optional parameters (currently unused). |
94409d6e AV |
42 | - gpio-controller : Marks the port as GPIO controller. |
43 | ||
44 | Example: | |
45 | ||
46 | bcsr@1,0 { | |
47 | #address-cells = <1>; | |
48 | #size-cells = <1>; | |
49 | compatible = "fsl,mpc8360mds-bcsr"; | |
50 | reg = <1 0 0x8000>; | |
51 | ranges = <0 1 0 0x8000>; | |
52 | ||
53 | bcsr13: gpio-controller@d { | |
54 | #gpio-cells = <2>; | |
55 | compatible = "fsl,mpc8360mds-bcsr-gpio"; | |
56 | reg = <0xd 1>; | |
57 | gpio-controller; | |
58 | }; | |
59 | }; |