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1 | =================================== |
2 | DSCR (Data Stream Control Register) | |
3 | =================================== | |
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4 | |
5 | DSCR register in powerpc allows user to have some control of prefetch of data | |
6 | stream in the processor. Please refer to the ISA documents or related manual | |
7 | for more detailed information regarding how to use this DSCR to attain this | |
dc12f20b | 8 | control of the prefetches . This document here provides an overview of kernel |
d56b699d | 9 | support for DSCR, related kernel objects, its functionalities and exported |
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10 | user interface. |
11 | ||
12 | (A) Data Structures: | |
13 | ||
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14 | (1) thread_struct:: |
15 | ||
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16 | dscr /* Thread DSCR value */ |
17 | dscr_inherit /* Thread has changed default DSCR */ | |
18 | ||
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19 | (2) PACA:: |
20 | ||
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21 | dscr_default /* per-CPU DSCR default value */ |
22 | ||
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23 | (3) sysfs.c:: |
24 | ||
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25 | dscr_default /* System DSCR default value */ |
26 | ||
27 | (B) Scheduler Changes: | |
28 | ||
29 | Scheduler will write the per-CPU DSCR default which is stored in the | |
30 | CPU's PACA value into the register if the thread has dscr_inherit value | |
31 | cleared which means that it has not changed the default DSCR till now. | |
32 | If the dscr_inherit value is set which means that it has changed the | |
33 | default DSCR value, scheduler will write the changed value which will | |
34 | now be contained in thread struct's dscr into the register instead of | |
35 | the per-CPU default PACA based DSCR value. | |
36 | ||
37 | NOTE: Please note here that the system wide global DSCR value never | |
38 | gets used directly in the scheduler process context switch at all. | |
39 | ||
40 | (C) SYSFS Interface: | |
41 | ||
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42 | - Global DSCR default: /sys/devices/system/cpu/dscr_default |
43 | - CPU specific DSCR default: /sys/devices/system/cpu/cpuN/dscr | |
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44 | |
45 | Changing the global DSCR default in the sysfs will change all the CPU | |
46 | specific DSCR defaults immediately in their PACA structures. Again if | |
47 | the current process has the dscr_inherit clear, it also writes the new | |
48 | value into every CPU's DSCR register right away and updates the current | |
49 | thread's DSCR value as well. | |
50 | ||
dc12f20b | 51 | Changing the CPU specific DSCR default value in the sysfs does exactly |
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52 | the same thing as above but unlike the global one above, it just changes |
53 | stuff for that particular CPU instead for all the CPUs on the system. | |
54 | ||
55 | (D) User Space Instructions: | |
56 | ||
57 | The DSCR register can be accessed in the user space using any of these | |
58 | two SPR numbers available for that purpose. | |
59 | ||
60 | (1) Problem state SPR: 0x03 (Un-privileged, POWER8 only) | |
61 | (2) Privileged state SPR: 0x11 (Privileged) | |
62 | ||
63 | Accessing DSCR through privileged SPR number (0x11) from user space | |
64 | works, as it is emulated following an illegal instruction exception | |
65 | inside the kernel. Both mfspr and mtspr instructions are emulated. | |
66 | ||
67 | Accessing DSCR through user level SPR (0x03) from user space will first | |
68 | create a facility unavailable exception. Inside this exception handler | |
dc12f20b | 69 | all mfspr instruction based read attempts will get emulated and returned |
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70 | where as the first mtspr instruction based write attempts will enable |
71 | the DSCR facility for the next time around (both for read and write) by | |
72 | setting DSCR facility in the FSCR register. | |
73 | ||
74 | (E) Specifics about 'dscr_inherit': | |
75 | ||
76 | The thread struct element 'dscr_inherit' represents whether the thread | |
77 | in question has attempted and changed the DSCR itself using any of the | |
78 | following methods. This element signifies whether the thread wants to | |
79 | use the CPU default DSCR value or its own changed DSCR value in the | |
80 | kernel. | |
81 | ||
82 | (1) mtspr instruction (SPR number 0x03) | |
83 | (2) mtspr instruction (SPR number 0x11) | |
84 | (3) ptrace interface (Explicitly set user DSCR value) | |
85 | ||
86 | Any child of the process created after this event in the process inherits | |
87 | this same behaviour as well. |