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1 | ===================================== |
2 | Amiga Buddha and Catweasel IDE Driver | |
3 | ===================================== | |
1da177e4 LT |
4 | |
5 | The Amiga Buddha and Catweasel IDE Driver (part of ide.c) was written by | |
6 | Geert Uytterhoeven based on the following specifications: | |
7 | ||
8 | ------------------------------------------------------------------------ | |
9 | ||
10 | Register map of the Buddha IDE controller and the | |
11 | Buddha-part of the Catweasel Zorro-II version | |
12 | ||
13 | The Autoconfiguration has been implemented just as Commodore | |
14 | described in their manuals, no tricks have been used (for | |
15 | example leaving some address lines out of the equations...). | |
16 | If you want to configure the board yourself (for example let | |
17 | a Linux kernel configure the card), look at the Commodore | |
6d6486a0 | 18 | Docs. Reading the nibbles should give this information:: |
1da177e4 | 19 | |
6d6486a0 MCC |
20 | Vendor number: 4626 ($1212) |
21 | product number: 0 (42 for Catweasel Z-II) | |
22 | Serial number: 0 | |
23 | Rom-vector: $1000 | |
1da177e4 LT |
24 | |
25 | The card should be a Z-II board, size 64K, not for freemem | |
26 | list, Rom-Vektor is valid, no second Autoconfig-board on the | |
27 | same card, no space preference, supports "Shutup_forever". | |
28 | ||
29 | Setting the base address should be done in two steps, just | |
30 | as the Amiga Kickstart does: The lower nibble of the 8-Bit | |
31 | address is written to $4a, then the whole Byte is written to | |
32 | $48, while it doesn't matter how often you're writing to $4a | |
33 | as long as $48 is not touched. After $48 has been written, | |
34 | the whole card disappears from $e8 and is mapped to the new | |
7f927fcc | 35 | address just written. Make sure $4a is written before $48, |
1da177e4 LT |
36 | otherwise your chance is only 1:16 to find the board :-). |
37 | ||
38 | The local memory-map is even active when mapped to $e8: | |
39 | ||
6d6486a0 | 40 | ============== =========================================== |
1da177e4 LT |
41 | $0-$7e Autokonfig-space, see Z-II docs. |
42 | ||
43 | $80-$7fd reserved | |
44 | ||
45 | $7fe Speed-select Register: Read & Write | |
46 | (description see further down) | |
47 | ||
48 | $800-$8ff IDE-Select 0 (Port 0, Register set 0) | |
49 | ||
50 | $900-$9ff IDE-Select 1 (Port 0, Register set 1) | |
51 | ||
52 | $a00-$aff IDE-Select 2 (Port 1, Register set 0) | |
53 | ||
54 | $b00-$bff IDE-Select 3 (Port 1, Register set 1) | |
55 | ||
56 | $c00-$cff IDE-Select 4 (Port 2, Register set 0, | |
6d6486a0 | 57 | Catweasel only!) |
1da177e4 LT |
58 | |
59 | $d00-$dff IDE-Select 5 (Port 3, Register set 1, | |
6d6486a0 | 60 | Catweasel only!) |
1da177e4 | 61 | |
6d6486a0 | 62 | $e00-$eff local expansion port, on Catweasel Z-II the |
1da177e4 LT |
63 | Catweasel registers are also mapped here. |
64 | Never touch, use multidisk.device! | |
6d6486a0 MCC |
65 | |
66 | $f00 read only, Byte-access: Bit 7 shows the | |
67 | level of the IRQ-line of IDE port 0. | |
1da177e4 LT |
68 | |
69 | $f01-$f3f mirror of $f00 | |
70 | ||
6d6486a0 MCC |
71 | $f40 read only, Byte-access: Bit 7 shows the |
72 | level of the IRQ-line of IDE port 1. | |
1da177e4 LT |
73 | |
74 | $f41-$f7f mirror of $f40 | |
75 | ||
6d6486a0 MCC |
76 | $f80 read only, Byte-access: Bit 7 shows the |
77 | level of the IRQ-line of IDE port 2. | |
1da177e4 LT |
78 | (Catweasel only!) |
79 | ||
80 | $f81-$fbf mirror of $f80 | |
81 | ||
82 | $fc0 write-only: Writing any value to this | |
6d6486a0 MCC |
83 | register enables IRQs to be passed from the |
84 | IDE ports to the Zorro bus. This mechanism | |
85 | has been implemented to be compatible with | |
1da177e4 | 86 | harddisks that are either defective or have |
6d6486a0 MCC |
87 | a buggy firmware and pull the IRQ line up |
88 | while starting up. If interrupts would | |
89 | always be passed to the bus, the computer | |
90 | might not start up. Once enabled, this flag | |
91 | can not be disabled again. The level of the | |
92 | flag can not be determined by software | |
1da177e4 LT |
93 | (what for? Write to me if it's necessary!). |
94 | ||
95 | $fc1-$fff mirror of $fc0 | |
96 | ||
97 | $1000-$ffff Buddha-Rom with offset $1000 in the rom | |
6d6486a0 | 98 | chip. The addresses $0 to $fff of the rom |
1da177e4 LT |
99 | chip cannot be read. Rom is Byte-wide and |
100 | mapped to even addresses. | |
6d6486a0 | 101 | ============== =========================================== |
1da177e4 LT |
102 | |
103 | The IDE ports issue an INT2. You can read the level of the | |
104 | IRQ-lines of the IDE-ports by reading from the three (two | |
105 | for Buddha-only) registers $f00, $f40 and $f80. This way | |
106 | more than one I/O request can be handled and you can easily | |
107 | determine what driver has to serve the INT2. Buddha and | |
108 | Catweasel expansion boards can issue an INT6. A separate | |
109 | memory map is available for the I/O module and the sysop's | |
110 | I/O module. | |
111 | ||
112 | The IDE ports are fed by the address lines A2 to A4, just as | |
113 | the Amiga 1200 and Amiga 4000 IDE ports are. This way | |
114 | existing drivers can be easily ported to Buddha. A move.l | |
115 | polls two words out of the same address of IDE port since | |
116 | every word is mirrored once. movem is not possible, but | |
117 | it's not necessary either, because you can only speedup | |
118 | 68000 systems with this technique. A 68020 system with | |
119 | fastmem is faster with move.l. | |
120 | ||
121 | If you're using the mirrored registers of the IDE-ports with | |
122 | A6=1, the Buddha doesn't care about the speed that you have | |
123 | selected in the speed register (see further down). With | |
124 | A6=1 (for example $840 for port 0, register set 0), a 780ns | |
125 | access is being made. These registers should be used for a | |
126 | command access to the harddisk/CD-Rom, since command | |
127 | accesses are Byte-wide and have to be made slower according | |
128 | to the ATA-X3T9 manual. | |
129 | ||
130 | Now for the speed-register: The register is byte-wide, and | |
131 | only the upper three bits are used (Bits 7 to 5). Bit 4 | |
132 | must always be set to 1 to be compatible with later Buddha | |
133 | versions (if I'll ever update this one). I presume that | |
134 | I'll never use the lower four bits, but they have to be set | |
135 | to 1 by definition. | |
6d6486a0 MCC |
136 | |
137 | The values in this table have to be shifted 5 bits to the | |
1da177e4 LT |
138 | left and or'd with $1f (this sets the lower 5 bits). |
139 | ||
140 | All the timings have in common: Select and IOR/IOW rise at | |
141 | the same time. IOR and IOW have a propagation delay of | |
142 | about 30ns to the clocks on the Zorro bus, that's why the | |
143 | values are no multiple of 71. One clock-cycle is 71ns long | |
144 | (exactly 70,5 at 14,18 Mhz on PAL systems). | |
145 | ||
146 | value 0 (Default after reset) | |
6d6486a0 MCC |
147 | 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles) |
148 | (same timing as the Amiga 1200 does on it's IDE port without | |
149 | accelerator card) | |
1da177e4 LT |
150 | |
151 | value 1 | |
6d6486a0 | 152 | 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles) |
1da177e4 LT |
153 | |
154 | value 2 | |
6d6486a0 | 155 | 781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles) |
1da177e4 LT |
156 | |
157 | value 3 | |
6d6486a0 | 158 | 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle) |
1da177e4 LT |
159 | |
160 | value 4 | |
6d6486a0 | 161 | 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles) |
1da177e4 LT |
162 | |
163 | value 5 | |
6d6486a0 | 164 | 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles) |
1da177e4 LT |
165 | |
166 | value 6 | |
6d6486a0 | 167 | 1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles) |
1da177e4 LT |
168 | |
169 | value 7 | |
6d6486a0 | 170 | 355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle) |
1da177e4 LT |
171 | |
172 | When accessing IDE registers with A6=1 (for example $84x), | |
173 | the timing will always be mode 0 8-bit compatible, no matter | |
174 | what you have selected in the speed register: | |
175 | ||
6d6486a0 | 176 | 781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive. |
1da177e4 LT |
177 | |
178 | All the timings with a very short select-signal (the 355ns | |
179 | fast accesses) depend on the accelerator card used in the | |
180 | system: Sometimes two more clock cycles are inserted by the | |
181 | bus interface, making the whole access 497ns long. This | |
182 | doesn't affect the reliability of the controller nor the | |
183 | performance of the card, since this doesn't happen very | |
184 | often. | |
185 | ||
186 | All the timings are calculated and only confirmed by | |
187 | measurements that allowed me to count the clock cycles. If | |
188 | the system is clocked by an oscillator other than 28,37516 | |
189 | Mhz (for example the NTSC-frequency 28,63636 Mhz), each | |
190 | clock cycle is shortened to a bit less than 70ns (not worth | |
191 | mentioning). You could think of a small performance boost | |
192 | by overclocking the system, but you would either need a | |
193 | multisync monitor, or a graphics card, and your internal | |
194 | diskdrive would go crazy, that's why you shouldn't tune your | |
195 | Amiga this way. | |
196 | ||
197 | Giving you the possibility to write software that is | |
198 | compatible with both the Buddha and the Catweasel Z-II, The | |
199 | Buddha acts just like a Catweasel Z-II with no device | |
200 | connected to the third IDE-port. The IRQ-register $f80 | |
201 | always shows a "no IRQ here" on the Buddha, and accesses to | |
202 | the third IDE port are going into data's Nirwana on the | |
203 | Buddha. | |
204 | ||
6d6486a0 MCC |
205 | Jens Schönfeld february 19th, 1997 |
206 | ||
207 | updated may 27th, 1997 | |
1da177e4 | 208 | |
6d6486a0 | 209 | eMail: sysop@nostlgic.tng.oche.de |