Commit | Line | Data |
---|---|---|
be4fdf99 VP |
1 | Kernel driver for Mellanox systems LEDs |
2 | ======================================= | |
3 | ||
4 | Provide system LED support for the nex Mellanox systems: | |
5 | "msx6710", "msx6720", "msb7700", "msn2700", "msx1410", | |
6 | "msn2410", "msb7800", "msn2740", "msn2100". | |
7 | ||
8 | Description | |
9 | ----------- | |
10 | Driver provides the following LEDs for the systems "msx6710", "msx6720", | |
11 | "msb7700", "msn2700", "msx1410", "msn2410", "msb7800", "msn2740": | |
12 | mlxcpld:fan1:green | |
13 | mlxcpld:fan1:red | |
14 | mlxcpld:fan2:green | |
15 | mlxcpld:fan2:red | |
16 | mlxcpld:fan3:green | |
17 | mlxcpld:fan3:red | |
18 | mlxcpld:fan4:green | |
19 | mlxcpld:fan4:red | |
20 | mlxcpld:psu:green | |
21 | mlxcpld:psu:red | |
22 | mlxcpld:status:green | |
23 | mlxcpld:status:red | |
24 | ||
25 | "status" | |
26 | CPLD reg offset: 0x20 | |
27 | Bits [3:0] | |
28 | ||
29 | "psu" | |
30 | CPLD reg offset: 0x20 | |
31 | Bits [7:4] | |
32 | ||
33 | "fan1" | |
34 | CPLD reg offset: 0x21 | |
35 | Bits [3:0] | |
36 | ||
37 | "fan2" | |
38 | CPLD reg offset: 0x21 | |
39 | Bits [7:4] | |
40 | ||
41 | "fan3" | |
42 | CPLD reg offset: 0x22 | |
43 | Bits [3:0] | |
44 | ||
45 | "fan4" | |
46 | CPLD reg offset: 0x22 | |
47 | Bits [7:4] | |
48 | ||
49 | Color mask for all the above LEDs: | |
50 | [bit3,bit2,bit1,bit0] or | |
51 | [bit7,bit6,bit5,bit4]: | |
52 | [0,0,0,0] = LED OFF | |
53 | [0,1,0,1] = Red static ON | |
54 | [1,1,0,1] = Green static ON | |
55 | [0,1,1,0] = Red blink 3Hz | |
56 | [1,1,1,0] = Green blink 3Hz | |
57 | [0,1,1,1] = Red blink 6Hz | |
58 | [1,1,1,1] = Green blink 6Hz | |
59 | ||
60 | Driver provides the following LEDs for the system "msn2100": | |
61 | mlxcpld:fan:green | |
62 | mlxcpld:fan:red | |
63 | mlxcpld:psu1:green | |
64 | mlxcpld:psu1:red | |
65 | mlxcpld:psu2:green | |
66 | mlxcpld:psu2:red | |
67 | mlxcpld:status:green | |
68 | mlxcpld:status:red | |
69 | mlxcpld:uid:blue | |
70 | ||
71 | "status" | |
72 | CPLD reg offset: 0x20 | |
73 | Bits [3:0] | |
74 | ||
75 | "fan" | |
76 | CPLD reg offset: 0x21 | |
77 | Bits [3:0] | |
78 | ||
79 | "psu1" | |
80 | CPLD reg offset: 0x23 | |
81 | Bits [3:0] | |
82 | ||
83 | "psu2" | |
84 | CPLD reg offset: 0x23 | |
85 | Bits [7:4] | |
86 | ||
87 | "uid" | |
88 | CPLD reg offset: 0x24 | |
89 | Bits [3:0] | |
90 | ||
91 | Color mask for all the above LEDs, excepted uid: | |
92 | [bit3,bit2,bit1,bit0] or | |
93 | [bit7,bit6,bit5,bit4]: | |
94 | [0,0,0,0] = LED OFF | |
95 | [0,1,0,1] = Red static ON | |
96 | [1,1,0,1] = Green static ON | |
97 | [0,1,1,0] = Red blink 3Hz | |
98 | [1,1,1,0] = Green blink 3Hz | |
99 | [0,1,1,1] = Red blink 6Hz | |
100 | [1,1,1,1] = Green blink 6Hz | |
101 | ||
102 | Color mask for uid LED: | |
103 | [bit3,bit2,bit1,bit0]: | |
104 | [0,0,0,0] = LED OFF | |
105 | [1,1,0,1] = Blue static ON | |
106 | [1,1,1,0] = Blue blink 3Hz | |
107 | [1,1,1,1] = Blue blink 6Hz | |
108 | ||
109 | Driver supports HW blinking at 3Hz and 6Hz frequency (50% duty cycle). | |
110 | For 3Hz duty cylce is about 167 msec, for 6Hz is about 83 msec. |