Commit | Line | Data |
---|---|---|
f6fcefa1 LC |
1 | ================== |
2 | The SMBus Protocol | |
3 | ================== | |
1a31a88f | 4 | |
1da177e4 LT |
5 | The following is a summary of the SMBus protocol. It applies to |
6 | all revisions of the protocol (1.0, 1.1, and 2.0). | |
7 | Certain protocol features which are not supported by | |
8 | this package are briefly described at the end of this document. | |
9 | ||
10 | Some adapters understand only the SMBus (System Management Bus) protocol, | |
11 | which is a subset from the I2C protocol. Fortunately, many devices use | |
12 | only the same subset, which makes it possible to put them on an SMBus. | |
1a31a88f | 13 | |
1da177e4 LT |
14 | If you write a driver for some I2C device, please try to use the SMBus |
15 | commands if at all possible (if the device uses only that subset of the | |
16 | I2C protocol). This makes it possible to use the device driver on both | |
17 | SMBus adapters and I2C adapters (the SMBus command set is automatically | |
18 | translated to I2C on I2C adapters, but plain I2C commands can not be | |
19 | handled at all on most pure SMBus adapters). | |
20 | ||
1a31a88f DB |
21 | Below is a list of SMBus protocol operations, and the functions executing |
22 | them. Note that the names used in the SMBus protocol specifications usually | |
23 | don't match these function names. For some of the operations which pass a | |
24 | single data byte, the functions using SMBus protocol operation names execute | |
25 | a different protocol operation entirely. | |
26 | ||
a1681781 JD |
27 | Each transaction type corresponds to a functionality flag. Before calling a |
28 | transaction function, a device driver should always check (just once) for | |
29 | the corresponding functionality flag to ensure that the underlying I2C | |
924fbb4d LC |
30 | adapter supports the transaction in question. See :doc:`functionality` for |
31 | the details. | |
a1681781 | 32 | |
1da177e4 LT |
33 | |
34 | Key to symbols | |
35 | ============== | |
36 | ||
ccf988b6 | 37 | =============== ============================================================= |
026c0fe6 LC |
38 | S Start condition |
39 | P Stop condition | |
40 | Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0. | |
9e89d618 | 41 | A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit |
026c0fe6 | 42 | Addr (7 bits) I2C 7 bit address. Note that this can be expanded as usual to |
1da177e4 | 43 | get a 10 bit I2C address. |
026c0fe6 | 44 | Comm (8 bits) Command byte, a data byte which often selects a register on |
1da177e4 | 45 | the device. |
026c0fe6 | 46 | Data (8 bits) A plain data byte. Sometimes, I write DataLow, DataHigh |
1da177e4 | 47 | for 16 bit data. |
026c0fe6 | 48 | Count (8 bits) A data byte containing the length of a block operation. |
1da177e4 | 49 | |
026c0fe6 | 50 | [..] Data sent by I2C device, as opposed to data sent by the host |
ccf988b6 MCC |
51 | adapter. |
52 | =============== ============================================================= | |
1da177e4 LT |
53 | |
54 | ||
67c2e665 JD |
55 | SMBus Quick Command |
56 | =================== | |
1da177e4 | 57 | |
ccf988b6 | 58 | This sends a single bit to the device, at the place of the Rd/Wr bit:: |
1da177e4 | 59 | |
a5765124 | 60 | S Addr Rd/Wr [A] P |
1da177e4 | 61 | |
a1681781 JD |
62 | Functionality flag: I2C_FUNC_SMBUS_QUICK |
63 | ||
1da177e4 | 64 | |
3c13f1fb LC |
65 | SMBus Receive Byte |
66 | ================== | |
67 | ||
68 | Implemented by i2c_smbus_read_byte() | |
1da177e4 LT |
69 | |
70 | This reads a single byte from a device, without specifying a device | |
71 | register. Some devices are so simple that this interface is enough; for | |
72 | others, it is a shorthand if you want to read the same register as in | |
ccf988b6 | 73 | the previous SMBus command:: |
1da177e4 | 74 | |
ccf988b6 | 75 | S Addr Rd [A] [Data] NA P |
1da177e4 | 76 | |
a1681781 JD |
77 | Functionality flag: I2C_FUNC_SMBUS_READ_BYTE |
78 | ||
1da177e4 | 79 | |
3c13f1fb LC |
80 | SMBus Send Byte |
81 | =============== | |
82 | ||
83 | Implemented by i2c_smbus_write_byte() | |
1da177e4 | 84 | |
1a31a88f DB |
85 | This operation is the reverse of Receive Byte: it sends a single byte |
86 | to a device. See Receive Byte for more information. | |
1da177e4 | 87 | |
ccf988b6 MCC |
88 | :: |
89 | ||
90 | S Addr Wr [A] Data [A] P | |
1da177e4 | 91 | |
a1681781 JD |
92 | Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE |
93 | ||
1da177e4 | 94 | |
3c13f1fb LC |
95 | SMBus Read Byte |
96 | =============== | |
97 | ||
98 | Implemented by i2c_smbus_read_byte_data() | |
1da177e4 LT |
99 | |
100 | This reads a single byte from a device, from a designated register. | |
ccf988b6 | 101 | The register is specified through the Comm byte:: |
1da177e4 | 102 | |
ccf988b6 | 103 | S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P |
1da177e4 | 104 | |
a1681781 JD |
105 | Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA |
106 | ||
1da177e4 | 107 | |
3c13f1fb LC |
108 | SMBus Read Word |
109 | =============== | |
110 | ||
111 | Implemented by i2c_smbus_read_word_data() | |
1da177e4 | 112 | |
1a31a88f | 113 | This operation is very like Read Byte; again, data is read from a |
1da177e4 | 114 | device, from a designated register that is specified through the Comm |
ccf988b6 | 115 | byte. But this time, the data is a complete word (16 bits):: |
1da177e4 | 116 | |
ccf988b6 | 117 | S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P |
1da177e4 | 118 | |
a1681781 JD |
119 | Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA |
120 | ||
b36cbb70 | 121 | Note the convenience function i2c_smbus_read_word_swapped() is |
06a67848 JC |
122 | available for reads where the two data bytes are the other way |
123 | around (not SMBus compliant, but very popular.) | |
124 | ||
1da177e4 | 125 | |
3c13f1fb LC |
126 | SMBus Write Byte |
127 | ================ | |
128 | ||
129 | Implemented by i2c_smbus_write_byte_data() | |
1da177e4 LT |
130 | |
131 | This writes a single byte to a device, to a designated register. The | |
132 | register is specified through the Comm byte. This is the opposite of | |
1a31a88f | 133 | the Read Byte operation. |
1da177e4 | 134 | |
ccf988b6 MCC |
135 | :: |
136 | ||
137 | S Addr Wr [A] Comm [A] Data [A] P | |
1da177e4 | 138 | |
a1681781 JD |
139 | Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA |
140 | ||
1da177e4 | 141 | |
3c13f1fb LC |
142 | SMBus Write Word |
143 | ================ | |
144 | ||
145 | Implemented by i2c_smbus_write_word_data() | |
1da177e4 | 146 | |
1a31a88f | 147 | This is the opposite of the Read Word operation. 16 bits |
414a5964 | 148 | of data are written to a device, to the designated register that is |
c7148b05 | 149 | specified through the Comm byte:: |
1da177e4 | 150 | |
ccf988b6 | 151 | S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P |
1da177e4 | 152 | |
a1681781 JD |
153 | Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA |
154 | ||
b36cbb70 | 155 | Note the convenience function i2c_smbus_write_word_swapped() is |
06a67848 JC |
156 | available for writes where the two data bytes are the other way |
157 | around (not SMBus compliant, but very popular.) | |
158 | ||
1da177e4 | 159 | |
3c13f1fb LC |
160 | SMBus Process Call |
161 | ================== | |
1da177e4 LT |
162 | |
163 | This command selects a device register (through the Comm byte), sends | |
ccf988b6 | 164 | 16 bits of data to it, and reads 16 bits of data in return:: |
1da177e4 | 165 | |
ccf988b6 MCC |
166 | S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] |
167 | S Addr Rd [A] [DataLow] A [DataHigh] NA P | |
1da177e4 | 168 | |
a1681781 JD |
169 | Functionality flag: I2C_FUNC_SMBUS_PROC_CALL |
170 | ||
1da177e4 | 171 | |
3c13f1fb LC |
172 | SMBus Block Read |
173 | ================ | |
174 | ||
175 | Implemented by i2c_smbus_read_block_data() | |
1da177e4 | 176 | |
ccf988b6 | 177 | This command reads a block of up to 32 bytes from a device, from a |
1da177e4 LT |
178 | designated register that is specified through the Comm byte. The amount |
179 | of data is specified by the device in the Count byte. | |
180 | ||
ccf988b6 MCC |
181 | :: |
182 | ||
183 | S Addr Wr [A] Comm [A] | |
184 | S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P | |
1da177e4 | 185 | |
a1681781 JD |
186 | Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA |
187 | ||
1da177e4 | 188 | |
3c13f1fb LC |
189 | SMBus Block Write |
190 | ================= | |
191 | ||
192 | Implemented by i2c_smbus_write_block_data() | |
1da177e4 | 193 | |
ccf988b6 | 194 | The opposite of the Block Read command, this writes up to 32 bytes to |
1da177e4 LT |
195 | a device, to a designated register that is specified through the |
196 | Comm byte. The amount of data is specified in the Count byte. | |
197 | ||
ccf988b6 MCC |
198 | :: |
199 | ||
200 | S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P | |
1da177e4 | 201 | |
a1681781 JD |
202 | Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA |
203 | ||
1da177e4 | 204 | |
1a31a88f DB |
205 | SMBus Block Write - Block Read Process Call |
206 | =========================================== | |
1da177e4 | 207 | |
1a31a88f DB |
208 | SMBus Block Write - Block Read Process Call was introduced in |
209 | Revision 2.0 of the specification. | |
1da177e4 LT |
210 | |
211 | This command selects a device register (through the Comm byte), sends | |
ccf988b6 | 212 | 1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return:: |
1da177e4 | 213 | |
ccf988b6 MCC |
214 | S Addr Wr [A] Comm [A] Count [A] Data [A] ... |
215 | S Addr Rd [A] [Count] A [Data] ... A P | |
1da177e4 | 216 | |
a1681781 JD |
217 | Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
218 | ||
1da177e4 LT |
219 | |
220 | SMBus Host Notify | |
221 | ================= | |
222 | ||
223 | This command is sent from a SMBus device acting as a master to the | |
224 | SMBus host acting as a slave. | |
225 | It is the same form as Write Word, with the command code replaced by the | |
226 | alerting device's address. | |
227 | ||
ccf988b6 MCC |
228 | :: |
229 | ||
230 | [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] | |
1da177e4 | 231 | |
e456cd37 | 232 | This is implemented in the following way in the Linux kernel: |
ccf988b6 | 233 | |
4d5538f5 BT |
234 | * I2C bus drivers which support SMBus Host Notify should report |
235 | I2C_FUNC_SMBUS_HOST_NOTIFY. | |
236 | * I2C bus drivers trigger SMBus Host Notify by a call to | |
237 | i2c_handle_smbus_host_notify(). | |
238 | * I2C drivers for devices which can trigger SMBus Host Notify will have | |
239 | client->irq assigned to a Host Notify IRQ if noone else specified an other. | |
240 | ||
241 | There is currently no way to retrieve the data parameter from the client. | |
e456cd37 | 242 | |
1da177e4 LT |
243 | |
244 | Packet Error Checking (PEC) | |
245 | =========================== | |
1a31a88f | 246 | |
1da177e4 LT |
247 | Packet Error Checking was introduced in Revision 1.1 of the specification. |
248 | ||
1a31a88f DB |
249 | PEC adds a CRC-8 error-checking byte to transfers using it, immediately |
250 | before the terminating STOP. | |
1da177e4 LT |
251 | |
252 | ||
253 | Address Resolution Protocol (ARP) | |
254 | ================================= | |
1a31a88f | 255 | |
1da177e4 LT |
256 | The Address Resolution Protocol was introduced in Revision 2.0 of |
257 | the specification. It is a higher-layer protocol which uses the | |
258 | messages above. | |
259 | ||
260 | ARP adds device enumeration and dynamic address assignment to | |
261 | the protocol. All ARP communications use slave address 0x61 and | |
262 | require PEC checksums. | |
263 | ||
264 | ||
b5527a77 JD |
265 | SMBus Alert |
266 | =========== | |
267 | ||
268 | SMBus Alert was introduced in Revision 1.0 of the specification. | |
269 | ||
270 | The SMBus alert protocol allows several SMBus slave devices to share a | |
271 | single interrupt pin on the SMBus master, while still allowing the master | |
272 | to know which slave triggered the interrupt. | |
273 | ||
274 | This is implemented the following way in the Linux kernel: | |
ccf988b6 | 275 | |
b5527a77 | 276 | * I2C bus drivers which support SMBus alert should call |
ed680522 | 277 | i2c_new_smbus_alert_device() to install SMBus alert support. |
b5527a77 JD |
278 | * I2C drivers for devices which can trigger SMBus alerts should implement |
279 | the optional alert() callback. | |
280 | ||
281 | ||
1da177e4 LT |
282 | I2C Block Transactions |
283 | ====================== | |
1a31a88f | 284 | |
95b83774 LC |
285 | The following I2C block transactions are similar to the SMBus Block Read |
286 | and Write operations, except these do not have a Count byte. They are | |
287 | supported by the SMBus layer and are described here for completeness, but | |
288 | they are *NOT* defined by the SMBus specification. | |
1a31a88f | 289 | |
1da177e4 LT |
290 | I2C block transactions do not limit the number of bytes transferred |
291 | but the SMBus layer places a limit of 32 bytes. | |
292 | ||
293 | ||
3c13f1fb LC |
294 | I2C Block Read |
295 | ============== | |
296 | ||
297 | Implemented by i2c_smbus_read_i2c_block_data() | |
1da177e4 | 298 | |
ccf988b6 MCC |
299 | This command reads a block of bytes from a device, from a |
300 | designated register that is specified through the Comm byte:: | |
1da177e4 | 301 | |
ccf988b6 MCC |
302 | S Addr Wr [A] Comm [A] |
303 | S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P | |
1da177e4 | 304 | |
a1681781 | 305 | Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK |
1da177e4 LT |
306 | |
307 | ||
3c13f1fb LC |
308 | I2C Block Write |
309 | =============== | |
310 | ||
311 | Implemented by i2c_smbus_write_i2c_block_data() | |
1da177e4 | 312 | |
ccf988b6 | 313 | The opposite of the Block Read command, this writes bytes to |
1da177e4 LT |
314 | a device, to a designated register that is specified through the |
315 | Comm byte. Note that command lengths of 0, 2, or more bytes are | |
316 | supported as they are indistinguishable from data. | |
317 | ||
ccf988b6 MCC |
318 | :: |
319 | ||
320 | S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P | |
a1681781 JD |
321 | |
322 | Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |