ext4: indicate via a block bitmap read is prefetched via a tracepoint
[linux-block.git] / Documentation / i2c / smbus-protocol.rst
CommitLineData
f6fcefa1
LC
1==================
2The SMBus Protocol
3==================
1a31a88f 4
1da177e4
LT
5The following is a summary of the SMBus protocol. It applies to
6all revisions of the protocol (1.0, 1.1, and 2.0).
7Certain protocol features which are not supported by
8this package are briefly described at the end of this document.
9
10Some adapters understand only the SMBus (System Management Bus) protocol,
11which is a subset from the I2C protocol. Fortunately, many devices use
12only the same subset, which makes it possible to put them on an SMBus.
1a31a88f 13
1da177e4
LT
14If you write a driver for some I2C device, please try to use the SMBus
15commands if at all possible (if the device uses only that subset of the
16I2C protocol). This makes it possible to use the device driver on both
17SMBus adapters and I2C adapters (the SMBus command set is automatically
18translated to I2C on I2C adapters, but plain I2C commands can not be
19handled at all on most pure SMBus adapters).
20
1a31a88f
DB
21Below is a list of SMBus protocol operations, and the functions executing
22them. Note that the names used in the SMBus protocol specifications usually
23don't match these function names. For some of the operations which pass a
24single data byte, the functions using SMBus protocol operation names execute
25a different protocol operation entirely.
26
a1681781
JD
27Each transaction type corresponds to a functionality flag. Before calling a
28transaction function, a device driver should always check (just once) for
29the corresponding functionality flag to ensure that the underlying I2C
924fbb4d
LC
30adapter supports the transaction in question. See :doc:`functionality` for
31the details.
a1681781 32
1da177e4
LT
33
34Key to symbols
35==============
36
ccf988b6 37=============== =============================================================
026c0fe6
LC
38S Start condition
39P Stop condition
40Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0.
9e89d618 41A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit
026c0fe6 42Addr (7 bits) I2C 7 bit address. Note that this can be expanded as usual to
1da177e4 43 get a 10 bit I2C address.
026c0fe6 44Comm (8 bits) Command byte, a data byte which often selects a register on
1da177e4 45 the device.
026c0fe6 46Data (8 bits) A plain data byte. Sometimes, I write DataLow, DataHigh
1da177e4 47 for 16 bit data.
026c0fe6 48Count (8 bits) A data byte containing the length of a block operation.
1da177e4 49
026c0fe6 50[..] Data sent by I2C device, as opposed to data sent by the host
ccf988b6
MCC
51 adapter.
52=============== =============================================================
1da177e4
LT
53
54
67c2e665
JD
55SMBus Quick Command
56===================
1da177e4 57
ccf988b6 58This sends a single bit to the device, at the place of the Rd/Wr bit::
1da177e4 59
a5765124 60 S Addr Rd/Wr [A] P
1da177e4 61
a1681781
JD
62Functionality flag: I2C_FUNC_SMBUS_QUICK
63
1da177e4 64
3c13f1fb
LC
65SMBus Receive Byte
66==================
67
68Implemented by i2c_smbus_read_byte()
1da177e4
LT
69
70This reads a single byte from a device, without specifying a device
71register. Some devices are so simple that this interface is enough; for
72others, it is a shorthand if you want to read the same register as in
ccf988b6 73the previous SMBus command::
1da177e4 74
ccf988b6 75 S Addr Rd [A] [Data] NA P
1da177e4 76
a1681781
JD
77Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
78
1da177e4 79
3c13f1fb
LC
80SMBus Send Byte
81===============
82
83Implemented by i2c_smbus_write_byte()
1da177e4 84
1a31a88f
DB
85This operation is the reverse of Receive Byte: it sends a single byte
86to a device. See Receive Byte for more information.
1da177e4 87
ccf988b6
MCC
88::
89
90 S Addr Wr [A] Data [A] P
1da177e4 91
a1681781
JD
92Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
93
1da177e4 94
3c13f1fb
LC
95SMBus Read Byte
96===============
97
98Implemented by i2c_smbus_read_byte_data()
1da177e4
LT
99
100This reads a single byte from a device, from a designated register.
ccf988b6 101The register is specified through the Comm byte::
1da177e4 102
ccf988b6 103 S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
1da177e4 104
a1681781
JD
105Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA
106
1da177e4 107
3c13f1fb
LC
108SMBus Read Word
109===============
110
111Implemented by i2c_smbus_read_word_data()
1da177e4 112
1a31a88f 113This operation is very like Read Byte; again, data is read from a
1da177e4 114device, from a designated register that is specified through the Comm
ccf988b6 115byte. But this time, the data is a complete word (16 bits)::
1da177e4 116
ccf988b6 117 S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
1da177e4 118
a1681781
JD
119Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA
120
b36cbb70 121Note the convenience function i2c_smbus_read_word_swapped() is
06a67848
JC
122available for reads where the two data bytes are the other way
123around (not SMBus compliant, but very popular.)
124
1da177e4 125
3c13f1fb
LC
126SMBus Write Byte
127================
128
129Implemented by i2c_smbus_write_byte_data()
1da177e4
LT
130
131This writes a single byte to a device, to a designated register. The
132register is specified through the Comm byte. This is the opposite of
1a31a88f 133the Read Byte operation.
1da177e4 134
ccf988b6
MCC
135::
136
137 S Addr Wr [A] Comm [A] Data [A] P
1da177e4 138
a1681781
JD
139Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA
140
1da177e4 141
3c13f1fb
LC
142SMBus Write Word
143================
144
145Implemented by i2c_smbus_write_word_data()
1da177e4 146
1a31a88f 147This is the opposite of the Read Word operation. 16 bits
414a5964 148of data are written to a device, to the designated register that is
c7148b05 149specified through the Comm byte::
1da177e4 150
ccf988b6 151 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
1da177e4 152
a1681781
JD
153Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA
154
b36cbb70 155Note the convenience function i2c_smbus_write_word_swapped() is
06a67848
JC
156available for writes where the two data bytes are the other way
157around (not SMBus compliant, but very popular.)
158
1da177e4 159
3c13f1fb
LC
160SMBus Process Call
161==================
1da177e4
LT
162
163This command selects a device register (through the Comm byte), sends
ccf988b6 16416 bits of data to it, and reads 16 bits of data in return::
1da177e4 165
ccf988b6
MCC
166 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
167 S Addr Rd [A] [DataLow] A [DataHigh] NA P
1da177e4 168
a1681781
JD
169Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
170
1da177e4 171
3c13f1fb
LC
172SMBus Block Read
173================
174
175Implemented by i2c_smbus_read_block_data()
1da177e4 176
ccf988b6 177This command reads a block of up to 32 bytes from a device, from a
1da177e4
LT
178designated register that is specified through the Comm byte. The amount
179of data is specified by the device in the Count byte.
180
ccf988b6
MCC
181::
182
183 S Addr Wr [A] Comm [A]
184 S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
1da177e4 185
a1681781
JD
186Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA
187
1da177e4 188
3c13f1fb
LC
189SMBus Block Write
190=================
191
192Implemented by i2c_smbus_write_block_data()
1da177e4 193
ccf988b6 194The opposite of the Block Read command, this writes up to 32 bytes to
1da177e4
LT
195a device, to a designated register that is specified through the
196Comm byte. The amount of data is specified in the Count byte.
197
ccf988b6
MCC
198::
199
200 S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
1da177e4 201
a1681781
JD
202Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
203
1da177e4 204
1a31a88f
DB
205SMBus Block Write - Block Read Process Call
206===========================================
1da177e4 207
1a31a88f
DB
208SMBus Block Write - Block Read Process Call was introduced in
209Revision 2.0 of the specification.
1da177e4
LT
210
211This command selects a device register (through the Comm byte), sends
ccf988b6 2121 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return::
1da177e4 213
ccf988b6
MCC
214 S Addr Wr [A] Comm [A] Count [A] Data [A] ...
215 S Addr Rd [A] [Count] A [Data] ... A P
1da177e4 216
a1681781
JD
217Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL
218
1da177e4
LT
219
220SMBus Host Notify
221=================
222
223This command is sent from a SMBus device acting as a master to the
224SMBus host acting as a slave.
225It is the same form as Write Word, with the command code replaced by the
226alerting device's address.
227
ccf988b6
MCC
228::
229
230 [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
1da177e4 231
e456cd37 232This is implemented in the following way in the Linux kernel:
ccf988b6 233
4d5538f5
BT
234* I2C bus drivers which support SMBus Host Notify should report
235 I2C_FUNC_SMBUS_HOST_NOTIFY.
236* I2C bus drivers trigger SMBus Host Notify by a call to
237 i2c_handle_smbus_host_notify().
238* I2C drivers for devices which can trigger SMBus Host Notify will have
239 client->irq assigned to a Host Notify IRQ if noone else specified an other.
240
241There is currently no way to retrieve the data parameter from the client.
e456cd37 242
1da177e4
LT
243
244Packet Error Checking (PEC)
245===========================
1a31a88f 246
1da177e4
LT
247Packet Error Checking was introduced in Revision 1.1 of the specification.
248
1a31a88f
DB
249PEC adds a CRC-8 error-checking byte to transfers using it, immediately
250before the terminating STOP.
1da177e4
LT
251
252
253Address Resolution Protocol (ARP)
254=================================
1a31a88f 255
1da177e4
LT
256The Address Resolution Protocol was introduced in Revision 2.0 of
257the specification. It is a higher-layer protocol which uses the
258messages above.
259
260ARP adds device enumeration and dynamic address assignment to
261the protocol. All ARP communications use slave address 0x61 and
262require PEC checksums.
263
264
b5527a77
JD
265SMBus Alert
266===========
267
268SMBus Alert was introduced in Revision 1.0 of the specification.
269
270The SMBus alert protocol allows several SMBus slave devices to share a
271single interrupt pin on the SMBus master, while still allowing the master
272to know which slave triggered the interrupt.
273
274This is implemented the following way in the Linux kernel:
ccf988b6 275
b5527a77 276* I2C bus drivers which support SMBus alert should call
ed680522 277 i2c_new_smbus_alert_device() to install SMBus alert support.
b5527a77
JD
278* I2C drivers for devices which can trigger SMBus alerts should implement
279 the optional alert() callback.
280
281
1da177e4
LT
282I2C Block Transactions
283======================
1a31a88f 284
95b83774
LC
285The following I2C block transactions are similar to the SMBus Block Read
286and Write operations, except these do not have a Count byte. They are
287supported by the SMBus layer and are described here for completeness, but
288they are *NOT* defined by the SMBus specification.
1a31a88f 289
1da177e4
LT
290I2C block transactions do not limit the number of bytes transferred
291but the SMBus layer places a limit of 32 bytes.
292
293
3c13f1fb
LC
294I2C Block Read
295==============
296
297Implemented by i2c_smbus_read_i2c_block_data()
1da177e4 298
ccf988b6
MCC
299This command reads a block of bytes from a device, from a
300designated register that is specified through the Comm byte::
1da177e4 301
ccf988b6
MCC
302 S Addr Wr [A] Comm [A]
303 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
1da177e4 304
a1681781 305Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK
1da177e4
LT
306
307
3c13f1fb
LC
308I2C Block Write
309===============
310
311Implemented by i2c_smbus_write_i2c_block_data()
1da177e4 312
ccf988b6 313The opposite of the Block Read command, this writes bytes to
1da177e4
LT
314a device, to a designated register that is specified through the
315Comm byte. Note that command lengths of 0, 2, or more bytes are
316supported as they are indistinguishable from data.
317
ccf988b6
MCC
318::
319
320 S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
a1681781
JD
321
322Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK