Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | Kernel driver i2c-i801 |
2 | ||
3 | Supported adapters: | |
4 | * Intel 82801AA and 82801AB (ICH and ICH0 - part of the | |
5 | '810' and '810E' chipsets) | |
6 | * Intel 82801BA (ICH2 - part of the '815E' chipset) | |
7 | * Intel 82801CA/CAM (ICH3) | |
7edcb9ab OR |
8 | * Intel 82801DB (ICH4) (HW PEC supported) |
9 | * Intel 82801EB/ER (ICH5) (HW PEC supported) | |
1da177e4 LT |
10 | * Intel 6300ESB |
11 | * Intel 82801FB/FR/FW/FRW (ICH6) | |
a980a99a JG |
12 | * Intel 82801G (ICH7) |
13 | * Intel 631xESB/632xESB (ESB2) | |
14 | * Intel 82801H (ICH8) | |
d28dc711 | 15 | * Intel 82801I (ICH9) |
c429a247 SH |
16 | * Intel EP80579 (Tolapai) |
17 | * Intel 82801JI (ICH10) | |
e30d9859 | 18 | * Intel 5/3400 Series (PCH) |
662cda8a | 19 | * Intel 6 Series (PCH) |
e30d9859 | 20 | * Intel Patsburg (PCH) |
662cda8a | 21 | * Intel DH89xxCC (PCH) |
6e2a851e | 22 | * Intel Panther Point (PCH) |
062737fb | 23 | * Intel Lynx Point (PCH) |
4a8f1ddd | 24 | * Intel Lynx Point-LP (PCH) |
c2db409c | 25 | * Intel Avoton (SOC) |
a3fc0ff0 | 26 | * Intel Wellsburg (PCH) |
f39901c1 | 27 | * Intel Coleto Creek (PCH) |
b299de83 | 28 | * Intel Wildcat Point (PCH) |
afc65924 | 29 | * Intel Wildcat Point-LP (PCH) |
1b31e9b7 | 30 | * Intel BayTrail (SOC) |
3e27a844 | 31 | * Intel Sunrise Point-H (PCH) |
e07bc679 | 32 | Datasheets: Publicly available at the Intel website |
1da177e4 | 33 | |
55fee8d7 DW |
34 | On Intel Patsburg and later chipsets, both the normal host SMBus controller |
35 | and the additional 'Integrated Device Function' controllers are supported. | |
36 | ||
1da177e4 | 37 | Authors: |
1da177e4 | 38 | Mark Studebaker <mdsxyz123@yahoo.com> |
7c81c60f | 39 | Jean Delvare <jdelvare@suse.de> |
1da177e4 LT |
40 | |
41 | ||
42 | Module Parameters | |
43 | ----------------- | |
44 | ||
adff687d JD |
45 | * disable_features (bit vector) |
46 | Disable selected features normally supported by the device. This makes it | |
47 | possible to work around possible driver or hardware bugs if the feature in | |
48 | question doesn't work as intended for whatever reason. Bit values: | |
636752bc DK |
49 | 0x01 disable SMBus PEC |
50 | 0x02 disable the block buffer | |
51 | 0x08 disable the I2C block read functionality | |
52 | 0x10 don't use interrupts | |
1da177e4 LT |
53 | |
54 | ||
55 | Description | |
56 | ----------- | |
57 | ||
58 | The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA), | |
c429a247 | 59 | ICH3 (82801CA/CAM) and later devices (PCH) are Intel chips that are a part of |
1da177e4 LT |
60 | Intel's '810' chipset for Celeron-based PCs, '810E' chipset for |
61 | Pentium-based PCs, '815E' chipset, and others. | |
62 | ||
63 | The ICH chips contain at least SEVEN separate PCI functions in TWO logical | |
64 | PCI devices. An output of lspci will show something similar to the | |
65 | following: | |
66 | ||
67 | 00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01) | |
68 | 00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01) | |
69 | 00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01) | |
70 | 00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01) | |
71 | 00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01) | |
72 | ||
73 | The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial | |
74 | Controller. | |
75 | ||
1da177e4 LT |
76 | The ICH chips are quite similar to Intel's PIIX4 chip, at least in the |
77 | SMBus controller. | |
78 | ||
1da177e4 LT |
79 | |
80 | Process Call Support | |
81 | -------------------- | |
82 | ||
83 | Not supported. | |
84 | ||
85 | ||
86 | I2C Block Read Support | |
87 | ---------------------- | |
88 | ||
6342064c | 89 | I2C block read is supported on the 82801EB (ICH5) and later chips. |
1da177e4 LT |
90 | |
91 | ||
92 | SMBus 2.0 Support | |
93 | ----------------- | |
94 | ||
95 | The 82801DB (ICH4) and later chips support several SMBus 2.0 features. | |
96 | ||
099ab118 | 97 | |
636752bc DK |
98 | Interrupt Support |
99 | ----------------- | |
100 | ||
101 | PCI interrupt support is supported on the 82801EB (ICH5) and later chips. | |
102 | ||
103 | ||
099ab118 JD |
104 | Hidden ICH SMBus |
105 | ---------------- | |
106 | ||
107 | If your system has an Intel ICH south bridge, but you do NOT see the | |
108 | SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the | |
109 | BIOS to enable it, it means it has been hidden by the BIOS code. Asus is | |
110 | well known for first doing this on their P4B motherboard, and many other | |
111 | boards after that. Some vendor machines are affected as well. | |
112 | ||
113 | The first thing to try is the "i2c_ec" ACPI driver. It could be that the | |
114 | SMBus was hidden on purpose because it'll be driven by ACPI. If the | |
115 | i2c_ec driver works for you, just forget about the i2c-i801 driver and | |
116 | don't try to unhide the ICH SMBus. Even if i2c_ec doesn't work, you | |
117 | better make sure that the SMBus isn't used by the ACPI code. Try loading | |
118 | the "fan" and "thermal" drivers, and check in /proc/acpi/fan and | |
119 | /proc/acpi/thermal_zone. If you find anything there, it's likely that | |
120 | the ACPI is accessing the SMBus and it's safer not to unhide it. Only | |
121 | once you are certain that ACPI isn't using the SMBus, you can attempt | |
122 | to unhide it. | |
123 | ||
124 | In order to unhide the SMBus, we need to change the value of a PCI | |
125 | register before the kernel enumerates the PCI devices. This is done in | |
126 | drivers/pci/quirks.c, where all affected boards must be listed (see | |
127 | function asus_hides_smbus_hostbridge.) If the SMBus device is missing, | |
128 | and you think there's something interesting on the SMBus (e.g. a | |
129 | hardware monitoring chip), you need to add your board to the list. | |
130 | ||
131 | The motherboard is identified using the subvendor and subdevice IDs of the | |
132 | host bridge PCI device. Get yours with "lspci -n -v -s 00:00.0": | |
133 | ||
134 | 00:00.0 Class 0600: 8086:2570 (rev 02) | |
135 | Subsystem: 1043:80f2 | |
136 | Flags: bus master, fast devsel, latency 0 | |
137 | Memory at fc000000 (32-bit, prefetchable) [size=32M] | |
138 | Capabilities: [e4] #09 [2106] | |
139 | Capabilities: [a0] AGP version 3.0 | |
140 | ||
141 | Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043 | |
142 | (Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic | |
143 | names for the bridge ID and the subvendor ID in include/linux/pci_ids.h, | |
144 | and then add a case for your subdevice ID at the right place in | |
145 | drivers/pci/quirks.c. Then please give it very good testing, to make sure | |
146 | that the unhidden SMBus doesn't conflict with e.g. ACPI. | |
147 | ||
148 | If it works, proves useful (i.e. there are usable chips on the SMBus) | |
149 | and seems safe, please submit a patch for inclusion into the kernel. | |
150 | ||
151 | Note: There's a useful script in lm_sensors 2.10.2 and later, named | |
152 | unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to | |
153 | temporarily unhide the SMBus without having to patch and recompile your | |
154 | kernel. It's very convenient if you just want to check if there's | |
155 | anything interesting on your hidden ICH SMBus. | |
156 | ||
157 | ||
1da177e4 LT |
158 | ********************** |
159 | The lm_sensors project gratefully acknowledges the support of Texas | |
160 | Instruments in the initial development of this driver. | |
161 | ||
162 | The lm_sensors project gratefully acknowledges the support of Intel in the | |
163 | development of SMBus 2.0 / ICH4 features of this driver. |