projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| a8bfeceb ZRNCB |
1 | Kernel driver tps40422 |
| 2 | ====================== | |
| 3 | ||
| 4 | Supported chips: | |
| 1f234ff1 | 5 | |
| a8bfeceb | 6 | * TI TPS40422 |
| 1f234ff1 | 7 | |
| a8bfeceb | 8 | Prefix: 'tps40422' |
| 1f234ff1 | 9 | |
| a8bfeceb | 10 | Addresses scanned: - |
| 1f234ff1 | 11 | |
| f12d634f | 12 | Datasheet: https://www.ti.com/lit/gpn/tps40422 |
| a8bfeceb ZRNCB |
13 | |
| 14 | Author: Zhu Laiwen <richard.zhu@nsn.com> | |
| 15 | ||
| 16 | ||
| 17 | Description | |
| 18 | ----------- | |
| 19 | ||
| 20 | This driver supports TI TPS40422 Dual-Output or Two-Phase Synchronous Buck | |
| 21 | Controller with PMBus | |
| 22 | ||
| 23 | The driver is a client driver to the core PMBus driver. | |
| 7ebd8b66 | 24 | Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers. |
| a8bfeceb ZRNCB |
25 | |
| 26 | ||
| 27 | Usage Notes | |
| 28 | ----------- | |
| 29 | ||
| 30 | This driver does not auto-detect devices. You will have to instantiate the | |
| ccf988b6 | 31 | devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for |
| a8bfeceb ZRNCB |
32 | details. |
| 33 | ||
| 34 | ||
| 35 | Platform data support | |
| 36 | --------------------- | |
| 37 | ||
| 38 | The driver supports standard PMBus driver platform data. | |
| 39 | ||
| 40 | ||
| 41 | Sysfs entries | |
| 42 | ------------- | |
| 43 | ||
| 44 | The following attributes are supported. | |
| 45 | ||
| 1f234ff1 | 46 | ======================= ======================================================= |
| a8bfeceb ZRNCB |
47 | in[1-2]_label "vout[1-2]" |
| 48 | in[1-2]_input Measured voltage. From READ_VOUT register. | |
| 49 | in[1-2]_alarm voltage alarm. | |
| 50 | ||
| 51 | curr[1-2]_input Measured current. From READ_IOUT register. | |
| 52 | curr[1-2]_label "iout[1-2]" | |
| 53 | curr1_max Maximum current. From IOUT_OC_WARN_LIMIT register. | |
| 1f234ff1 MCC |
54 | curr1_crit Critical maximum current. From IOUT_OC_FAULT_LIMIT |
| 55 | register. | |
| a8bfeceb ZRNCB |
56 | curr1_max_alarm Current high alarm. From IOUT_OC_WARN_LIMIT status. |
| 57 | curr1_crit_alarm Current critical high alarm. From IOUT_OC_FAULT status. | |
| 58 | curr2_alarm Current high alarm. From IOUT_OC_WARNING status. | |
| 59 | ||
| 1f234ff1 MCC |
60 | temp1_input Measured temperature. From READ_TEMPERATURE_2 register |
| 61 | on page 0. | |
| a8bfeceb ZRNCB |
62 | temp1_max Maximum temperature. From OT_WARN_LIMIT register. |
| 63 | temp1_crit Critical high temperature. From OT_FAULT_LIMIT register. | |
| 64 | temp1_max_alarm Chip temperature high alarm. Set by comparing | |
| 1f234ff1 MCC |
65 | READ_TEMPERATURE_2 on page 0 with OT_WARN_LIMIT if |
| 66 | TEMP_OT_WARNING status is set. | |
| a8bfeceb | 67 | temp1_crit_alarm Chip temperature critical high alarm. Set by comparing |
| 1f234ff1 MCC |
68 | READ_TEMPERATURE_2 on page 0 with OT_FAULT_LIMIT if |
| 69 | TEMP_OT_FAULT status is set. | |
| 70 | temp2_input Measured temperature. From READ_TEMPERATURE_2 register | |
| 71 | on page 1. | |
| a8bfeceb | 72 | temp2_alarm Chip temperature alarm on page 1. |
| 1f234ff1 | 73 | ======================= ======================================================= |